On Wed, Jul 11, 2018 at 02:59:03PM -0700, Paulo Zanoni wrote:
> Do like the other functions and check for the ISR bits. We have plans
> to add a few more checks in this code in the next patches, that's why
> it's a little more verbose than it could be.
>
> v2: Rebase.
>
> Cc: Animesh Manna
>
On Wed, 2018-07-11 at 22:33 -0700, Tarun Vyas wrote:
> In commit "drm/i915: Wait for PSR exit before checking for vblank
> evasion", the idea was to limit the PSR IDLE checks when PSR is
> actually supported. While CAN_PSR does do that check, it doesn't
> applies on a per-crtc basis.
On Thu, 2018-07-12 at 16:26 -0700, Rodrigo Vivi wrote:
> On Wed, Jul 04, 2018 at 05:31:21PM -0700, Dhinakaran Pandiyan wrote:
> >
> > This allows to read i915_edp_psr_status from tests without
> > triggering
> > any AUX communication. Take this opportunity to move this under the
> > eDP-1
On 2018.07.12 20:36:03 +, Bloomfield, Jon wrote:
> > -Original Message-
> > From: Chris Wilson
> > Sent: Thursday, July 12, 2018 11:53 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Chris Wilson ; Zhenyu Wang
> > ; Bloomfield, Jon ;
> > Joonas Lahtinen ; Matthew Auld
> >
> >
== Series Details ==
Series: linux-next: build failure after merge of the drm-intel tree (rev2)
URL : https://patchwork.freedesktop.org/series/42839/
State : failure
== Summary ==
Applying: linux-next: build failure after merge of the drm-intel tree
Using index info to reconstruct a base
Hi all,
[Dave cc'd because this will probably turn up in the drm tree soon.]
After merging the drm-intel tree, today's linux-next build (x86_64
allmodconfig) failed like this:
drivers/gpu/drm/i915/gvt/kvmgt.c: In function 'gvt_dma_map_page':
drivers/gpu/drm/i915/gvt/kvmgt.c:188:17: error: 'pfn'
On 2018.07.12 17:53:30 +0200, Micha?? Winiarski wrote:
> gvt_pin_guest_page extracted some of the gvt_dma_map_page functionality:
> commit 79e542f5af79 ("drm/i915/kvmgt: Support setting dma map for huge pages")
>
> And yet, part of it was reintroduced in:
> commit 39b4cbadb9a9 ("drm/i915/kvmgt:
On 7/12/2018 3:59 AM, Tvrtko Ursulin wrote:
From: John Harrison
Improve the timeline legend to show actual context colours.
v2: (Tvrtko Ursulin)
* Commit msg.
* Tweak layout for more compactness and more readability.
Signed-off-by: Tvrtko Ursulin
Cc: John Harrison
Cc: Tvrtko Ursulin
On 7/12/2018 3:59 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
We add stripes for different stages of request execution so it is easier
to follow one context in the multi-colour mode.
Vertical stripe pattern indicates pipeline "blockages" - requests waiting
for dependencies before they are
On 7/12/2018 3:59 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
John reports that on a long runnning systems the huge disparity between
kernel context and user context id's causes all interesting colours to be
clustered too close together.
Fix this by assigning colours to seen contexts
On 7/12/2018 3:59 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
vis library has a limited precision compared to our trace data which
prevents zooming into the timeline and seeing the fine detail.
Scale the HTML view by a thousand to work around it.
v2: Rebase for time axis changes.
On Wed, Jul 11, 2018 at 02:59:02PM -0700, Paulo Zanoni wrote:
> Use the hardcoded tables provided by our spec.
>
> v2:
> - SSC stays disabled.
> - Use intel_port_is_tc().
>
> Cc: Anusha Srivatsa
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 22
Em Qui, 2018-06-28 às 15:35 -0700, Manasi Navare escreveu:
> This patch adds the remaining register definitions and bit fields
> required for MG PHy DDI buffer initializations and voltage
> swing programming for MG PHy DDI ports.
>
> While at it this patch also fixes the naming for previously
On Thu, Jul 12, 2018 at 11:28:25PM +, De Marchi, Lucas wrote:
> On Thu, 2018-07-12 at 16:06 -0700, Rodrigo Vivi wrote:
> > On Thu, Jul 12, 2018 at 02:02:51PM -0700, Lucas De Marchi wrote:
> > > After disabling resource streamer on ICL (due to it actually not
> > > existing there), I got
== Series Details ==
Series: i915/intel_tv_get_modes: fix strncpy truncation warning (rev2)
URL : https://patchwork.freedesktop.org/series/46314/
State : failure
== Summary ==
Applying: i915/intel_tv_get_modes: fix strncpy truncation warning
Using index info to reconstruct a base tree...
M
On Thu, 2018-07-12 at 16:06 -0700, Rodrigo Vivi wrote:
> On Thu, Jul 12, 2018 at 02:02:51PM -0700, Lucas De Marchi wrote:
> > After disabling resource streamer on ICL (due to it actually not
> > existing there), I got feedback that there have been some experimental
> > patches for mesa to use it,
On Wed, Jul 04, 2018 at 05:31:21PM -0700, Dhinakaran Pandiyan wrote:
> This allows to read i915_edp_psr_status from tests without triggering
> any AUX communication. Take this opportunity to move this under the
> eDP-1 connector directory as the status we print is of the sink.
>
> Cc: Rodrigo
On Thu, Jul 12, 2018 at 02:02:51PM -0700, Lucas De Marchi wrote:
> After disabling resource streamer on ICL (due to it actually not
> existing there), I got feedback that there have been some experimental
> patches for mesa to use it, but nothing ever landed nor shipped.
>
> This is a tentative
On Thu, Jul 12, 2018 at 09:20:27PM +0100, Chris Wilson wrote:
> After aborting a module load, we may try and disable guc before we have
> finished setting it. Long term plan is to ensure perfect onion unwind,
> but in the short term we want to fix the oops to re-enable
> drv_module_reload.
>
> [
On 12/07/18 14:02, Lucas De Marchi wrote:
After disabling resource streamer on ICL (due to it actually not
existing there), I got feedback that there have been some experimental
patches for mesa to use it, but nothing ever landed nor shipped.
This is a tentative to remove it from kernel
Ville Syrjälä wrote on Thu, Jul 12, 2018:
> On Thu, Jul 12, 2018 at 03:55:26PM +0200, Dominique Martinet wrote:
> > This could either be 'this commit' as a whole or if you look only at the
> > commit message 'this strncpy fix' from the title (which is arguably the
> > same), and both
Ville Syrjälä wrote on Thu, Jul 12, 2018:
> On Wed, Jul 11, 2018 at 09:46:15AM +0200, Dominique Martinet wrote:
> > This is effectively no-op as the next line writes a nul at the final
>
> What is "This". Please write self contained commit messages.
This could either be 'this commit' as a whole
Change it to use strlcpy instead
Signed-off-by: Dominique Martinet
---
drivers/gpu/drm/i915/intel_tv.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index b55b5c157e38..25fee7dba7e2 100644
---
On 7/12/2018 5:42 AM, Tvrtko Ursulin wrote:
On 12/07/2018 11:59, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
It is possible to customize the axis display so change it to display
timestamps in seconds on the major axis (with six decimal spaces) and
relative millisecond offsets on the minor
== Series Details ==
Series: Kill resource streamer (rev2)
URL : https://patchwork.freedesktop.org/series/46224/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4479 -> Patchwork_9640 =
== Summary - SUCCESS ==
No regressions found.
External URL:
== Series Details ==
Series: Kill resource streamer (rev2)
URL : https://patchwork.freedesktop.org/series/46224/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
Okay!
Commit: drm/i915: kill resource streamer
Em Sex, 2018-06-08 às 00:49 +0100, Chris Wilson escreveu:
> Quoting Paulo Zanoni (2018-06-08 00:07:00)
> > static void
> > skl_print_wm_changes(const struct drm_atomic_state *state)
> > {
> > @@ -5381,7 +5370,10 @@ static void skl_initial_wm(struct
> > intel_atomic_state *state,
> > if
After disabling resource streamer on ICL (due to it actually not
existing there), I got feedback that there have been some experimental
patches for mesa to use it, but nothing ever landed nor shipped.
This is a tentative to remove it from kernel keeping the uapi defines
around for compatibility.
== Series Details ==
Series: drm/i915/guc: Protect against NULL client dereference in error path
URL : https://patchwork.freedesktop.org/series/46436/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4479 -> Patchwork_9639 =
== Summary - SUCCESS ==
No regressions found.
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, July 12, 2018 11:53 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Zhenyu Wang
> ; Bloomfield, Jon ;
> Joonas Lahtinen ; Matthew Auld
>
> Subject: [PATCH 3/6] drm/i915/gtt: Disable read-only support under GVT
>
>
After aborting a module load, we may try and disable guc before we have
finished setting it. Long term plan is to ensure perfect onion unwind,
but in the short term we want to fix the oops to re-enable
drv_module_reload.
[ 317.401239] BUG: unable to handle kernel NULL pointer dereference at
== Series Details ==
Series: series starting with [1/6] drm/i915/gtt: Add read only pages to
gen8_pte_encode (rev2)
URL : https://patchwork.freedesktop.org/series/46432/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4479 -> Patchwork_9638 =
== Summary - SUCCESS ==
No
== Series Details ==
Series: series starting with [1/6] drm/i915/gtt: Add read only pages to
gen8_pte_encode (rev2)
URL : https://patchwork.freedesktop.org/series/46432/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gtt: Add read only pages to gen8_pte_encode
== Series Details ==
Series: series starting with [1/6] drm/i915/gtt: Add read only pages to
gen8_pte_encode (rev2)
URL : https://patchwork.freedesktop.org/series/46432/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7f97b3f09826 drm/i915/gtt: Add read only pages to
== Series Details ==
Series: series starting with [1/6] drm/i915/gtt: Add read only pages to
gen8_pte_encode
URL : https://patchwork.freedesktop.org/series/46432/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4479 -> Patchwork_9637 =
== Summary - SUCCESS ==
No
On gen8 and onwards, we can mark GPU accesses through the ppGTT as being
read-only, that is cause any GPU write onto that page to be discarded
(not triggering a fault). This is all that we need to finally support
the read-only flag for userptr!
v2: Check default address space for read only
== Series Details ==
Series: series starting with [1/6] drm/i915/gtt: Add read only pages to
gen8_pte_encode
URL : https://patchwork.freedesktop.org/series/46432/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gtt: Add read only pages to gen8_pte_encode
Okay!
== Series Details ==
Series: series starting with [1/6] drm/i915/gtt: Add read only pages to
gen8_pte_encode
URL : https://patchwork.freedesktop.org/series/46432/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
14eaf2339094 drm/i915/gtt: Add read only pages to gen8_pte_encode
Quoting Chris Wilson (2018-07-12 19:53:15)
> @@ -789,10 +789,12 @@ i915_gem_userptr_ioctl(struct drm_device *dev,
> return -EFAULT;
>
> if (args->flags & I915_USERPTR_READ_ONLY) {
> - /* On almost all of the current hw, we cannot tell the GPU
> that a
> -
On Thu, Jul 12, 2018 at 04:40:03PM +0100, Chris Wilson wrote:
> As we want to make the buffers active on the GPU before removing their
> fence, an operational GPU (not wedged!) is required.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Ville Syrjälä
> ---
> tests/gem_unfence_active_buffers.c
On Thu, Jul 12, 2018 at 04:37:08PM +0100, Chris Wilson wrote:
> As we need GEM and the GPU to do a GPGPU fill, we should check that it
> is operable before using -- skipping rather than failing when the device
> is wedged.
>
> Signed-off-by: Chris Wilson
Series is
Reviewed-by: Ville Syrjälä
>
On Thu, Jul 12, 2018 at 04:38:49PM +0100, Chris Wilson wrote:
> As render copy wants to use the GPU, we should make sure it is not
> wedged first.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Ville Syrjälä
> ---
> tests/gem_render_copy_redux.c | 1 +
> 1 file changed, 1 insertion(+)
>
>
On gen8 and onwards, we can mark GPU accesses through the ppGTT as being
read-only, that is cause any GPU write onto that page to be discarded
(not triggering a fault). This is all that we need to finally support
the read-only flag for userptr!
Testcase: igt/gem_userptr_blits/readonly*
GVT is not propagating the PTE bits, and is always setting the
read-write bit, thus breaking read-only support.
Signed-off-by: Chris Wilson
Cc: Zhenyu Wang
Cc: Jon Bloomfield
Cc: Joonas Lahtinen
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++--
1 file changed, 6
From: Jon Bloomfield
Hook up the flags to allow read-only ppGTT mappings for gen8+
v2: Include a selftest to check that writes to a readonly PTE are
dropped
v3: Don't duplicate cpu_check() as we can just reuse it, and even worse
don't wholesale copy the theory-of-operation comment from
If the user has created a read-only object, they should not be allowed
to circumvent the write protection by using a GGTT mmapping. Deny it.
Also most machines do not support read-only GGTT PTEs, so again we have
to reject attempted writes. Fortunately, this is known a priori, so we
can at least
If the user created a read-only object, they should not be allowed to
circumvent the write protection using the pwrite ioctl.
Signed-off-by: Chris Wilson
Cc: Jon Bloomfield
Cc: Joonas Lahtinen
Cc: Matthew Auld
Reviewed-by: Jon Bloomfield
Reviewed-by: Joonas Lahtinen
Reviewed-by: Matthew
From: Jon Bloomfield
We can set a bit inside the ppGTT PTE to indicate a page is read-only;
writes from the GPU will be discarded. We can use this to protect pages
and in particular support read-only userptr mappings (necessary for
importing PROT_READ vma).
Signed-off-by: Jon Bloomfield
== Series Details ==
Series: drm/i915: Interactive RPS mode (rev4)
URL : https://patchwork.freedesktop.org/series/46334/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4479 -> Patchwork_9636 =
== Summary - SUCCESS ==
No regressions found.
External URL:
== Series Details ==
Series: drm/i915: Interactive RPS mode (rev4)
URL : https://patchwork.freedesktop.org/series/46334/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Interactive RPS mode
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3655:16: warning: expression
== Series Details ==
Series: drm/i915: Interactive RPS mode (rev4)
URL : https://patchwork.freedesktop.org/series/46334/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
bfc0fb4a0c59 drm/i915: Interactive RPS mode
-:24: ERROR:GIT_COMMIT_ID: Please use git commit description style
RPS provides a feedback loop where we use the load during the previous
evaluation interval to decide whether to up or down clock the GPU
frequency. Our responsiveness is split into 3 regimes, a high and low
plateau with the intent to keep the gpu clocked high to cover occasional
stalls under high
On Thu, 12 Jul 2018 17:31:14 +0200, Chris Wilson
wrote:
Quoting Chris Wilson (2018-05-29 15:54:12)
Quoting Michal Wajdeczko (2018-05-28 18:16:18)
> SOFT_SCRATCH(15) is used by GuC for sending MMIO GuC events to host
and
> those events are now handled by
On Thu, Jul 12, 2018 at 07:03:58PM +0200, Daniel Vetter wrote:
> On Thu, Jul 12, 2018 at 6:24 PM, Lucas De Marchi
> wrote:
> > On Thu, Jul 12, 2018 at 05:04:03PM +0200, Daniel Vetter wrote:
> >> On Mon, Jul 09, 2018 at 09:22:21AM -0700, Lucas De Marchi wrote:
> >> > Instead of defining all
On Thu, Jul 12, 2018 at 6:24 PM, Lucas De Marchi
wrote:
> On Thu, Jul 12, 2018 at 05:04:03PM +0200, Daniel Vetter wrote:
>> On Mon, Jul 09, 2018 at 09:22:21AM -0700, Lucas De Marchi wrote:
>> > Instead of defining all registers twice, define just a PCH_GPIO_BASE
>> > that has the same address as
== Series Details ==
Series: drm/i915/kvmgt: Fix compilation error
URL : https://patchwork.freedesktop.org/series/46413/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4477 -> Patchwork_9635 =
== Summary - SUCCESS ==
No regressions found.
External URL:
Quoting Michał Winiarski (2018-07-12 16:53:30)
> gvt_pin_guest_page extracted some of the gvt_dma_map_page functionality:
> commit 79e542f5af79 ("drm/i915/kvmgt: Support setting dma map for huge pages")
>
> And yet, part of it was reintroduced in:
> commit 39b4cbadb9a9 ("drm/i915/kvmgt: Check the
Hi Uma,
On Tue, Jun 12, 2018 at 04:01:31AM +, Shankar, Uma wrote:
>
>
> >-Original Message-
> >From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
> >Alexandru-Cosmin Gheorghe
> >Sent: Monday, June 11, 2018 3:47 PM
> >To: Shankar, Uma
> >Cc:
On Thu, Jul 12, 2018 at 05:04:03PM +0200, Daniel Vetter wrote:
> On Mon, Jul 09, 2018 at 09:22:21AM -0700, Lucas De Marchi wrote:
> > Instead of defining all registers twice, define just a PCH_GPIO_BASE
> > that has the same address as PCH_GPIO_A and use that to calculate all
> > the others. This
== Series Details ==
Series: drm/i915/kvmgt: Fix compilation error
URL : https://patchwork.freedesktop.org/series/46413/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
930c096d74cb drm/i915/kvmgt: Fix compilation error
-:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped
gvt_pin_guest_page extracted some of the gvt_dma_map_page functionality:
commit 79e542f5af79 ("drm/i915/kvmgt: Support setting dma map for huge pages")
And yet, part of it was reintroduced in:
commit 39b4cbadb9a9 ("drm/i915/kvmgt: Check the pfn got from vfio_pin_pages")
Causing kvmgt part to no
As we want to make the buffers active on the GPU before removing their
fence, an operational GPU (not wedged!) is required.
Signed-off-by: Chris Wilson
---
tests/gem_unfence_active_buffers.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/gem_unfence_active_buffers.c
As render copy wants to use the GPU, we should make sure it is not
wedged first.
Signed-off-by: Chris Wilson
---
tests/gem_render_copy_redux.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/gem_render_copy_redux.c b/tests/gem_render_copy_redux.c
index 27098ea6d..a861862d0 100644
---
To inject a hang, we execute a spinning batch. This means we require GEM
to be operation before the hang, so check.
Signed-off-by: Chris Wilson
---
lib/igt_gt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/igt_gt.c b/lib/igt_gt.c
index 89b318ae6..86c6e1972 100644
--- a/lib/igt_gt.c
As we need GEM and the GPU to do a GPGPU fill, we should check that it
is operable before using -- skipping rather than failing when the device
is wedged.
Signed-off-by: Chris Wilson
---
tests/gem_gpgpu_fill.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/gem_gpgpu_fill.c
== Series Details ==
Series: drm/i915: Add Exec param to control data port coherency. (rev6)
URL : https://patchwork.freedesktop.org/series/40181/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4476 -> Patchwork_9634 =
== Summary - SUCCESS ==
No regressions found.
On Thu, 2018-07-12 at 07:54 -0600, Jens Axboe wrote:
>
> Thanks for your invaluable and useful feedback, sharing your vast
> experience in patchsets with dependencies.
I've probably more experience sending patchsets
with dependencies across subsystems than anyone.
There is no single style that
Quoting Chris Wilson (2018-05-29 15:54:12)
> Quoting Michal Wajdeczko (2018-05-28 18:16:18)
> > SOFT_SCRATCH(15) is used by GuC for sending MMIO GuC events to host and
> > those events are now handled by intel_guc_to_host_event_handler_mmio().
> >
> > We should not try to read it on MMIO action
== Series Details ==
Series: drm/i915: Add Exec param to control data port coherency. (rev6)
URL : https://patchwork.freedesktop.org/series/40181/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Add IOCTL Param to control data port coherency.
== Series Details ==
Series: drm/i915: Add Exec param to control data port coherency. (rev6)
URL : https://patchwork.freedesktop.org/series/40181/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ad63bf48d85e drm/i915: Add IOCTL Param to control data port coherency.
-:15:
The patch adds a parameter to control the data port coherency functionality
on a per-context level. When the IOCTL is called, a command to switch data
port coherency state is added to the ordered list. All prior requests are
executed on old coherency settings, and all exec requests after the IOCTL
On Mon, Jul 09, 2018 at 09:22:21AM -0700, Lucas De Marchi wrote:
> Instead of defining all registers twice, define just a PCH_GPIO_BASE
> that has the same address as PCH_GPIO_A and use that to calculate all
> the others. This also brings VLV and !HAS_GMCH_DISPLAY in line, doing
> the same thing.
On Thu, Jul 12, 2018 at 03:26:41PM +0100, Chris Wilson wrote:
> Quoting Jakub Bartmiński (2018-07-12 15:07:18)
> > Some functions used within mock selftests may expect platform-dependent
> > automatic modparams parameters to have already been resolved, resulting
> > in failed assertions.
> >
== Series Details ==
Series: series starting with [1/2] drm/i915: Keep local modparams copy for mock
selftests
URL : https://patchwork.freedesktop.org/series/46398/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4475 -> Patchwork_9633 =
== Summary - SUCCESS ==
No
On Tuesday 10 July 2018 02:18 AM, Sean Paul wrote:
On Wed, Jun 27, 2018 at 02:10:02PM +0530, Ramalingam C wrote:
Implements a sequence of enabling and disabling the HDCP2.2
(auth and encryption).
This is really hard to review, since all I see are stubs. I'd much rather have
each patch do
Quoting Michał Winiarski (2018-07-12 14:12:48)
> On Thu, Jul 12, 2018 at 11:58:30AM +0100, Chris Wilson wrote:
> > If we fail the module load, we may try and cleanup before we even
> > allocate the GuC clients. KISS in order to try and re-enable
> > drv_module_reload for BAT.
> >
> > Testcase:
On Tuesday 10 July 2018 02:01 AM, Sean Paul wrote:
On Wed, Jun 27, 2018 at 02:09:55PM +0530, Ramalingam C wrote:
For upcoming implementation of HDCP2.2 in I915, important variable
required for HDCP2.2 are defined.
Please just introduce them when you use them. I can't provide useful review on
Quoting Michał Winiarski (2018-07-12 13:48:10)
> Let's reorder things so that we can do onion teardown rather than double
> goto.
>
> References: b96f6ebfd024 ("drm/i915: Correctly handle error path in
> i915_gem_init_hw")
> Signed-off-by: Michał Winiarski
> Cc: Michal Wajdeczko
> Cc: Sagar
On Tuesday 10 July 2018 02:14 AM, Sean Paul wrote:
On Wed, Jun 27, 2018 at 02:10:01PM +0530, Ramalingam C wrote:
When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is
enabled.
Just squash this into patch 11, no need for a separate patch.
Doing it in the next version of the
On Tuesday 10 July 2018 02:14 AM, Sean Paul wrote:
On Wed, Jun 27, 2018 at 02:10:00PM +0530, Ramalingam C wrote:
Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled.
v2:
Included few optimization suggestions [Chris
Quoting Jakub Bartmiński (2018-07-12 15:07:18)
> Some functions used within mock selftests may expect platform-dependent
> automatic modparams parameters to have already been resolved, resulting
> in failed assertions.
> Backing up the modparams before mock selftests and manually setting
>
Quoting Chris Wilson (2018-07-12 12:20:13)
> From: Michał Winiarski
>
> Since:
> 0d4b78b3d2c0 ("drm/i915/guc: Assert we have the doorbell before setting it
> up")
>
> We have asserts in GuC doorbell related functions, which is a good thing.
> Unfortunately, we were using those to check whether
On Thu, Jul 12, 2018 at 03:55:26PM +0200, Dominique Martinet wrote:
> Ville Syrjälä wrote on Thu, Jul 12, 2018:
> > On Wed, Jul 11, 2018 at 09:46:15AM +0200, Dominique Martinet wrote:
> > > This is effectively no-op as the next line writes a nul at the final
> >
> > What is "This". Please write
From: Michal Wajdeczko
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index aebe0469ddaa..3e4e128237ac 100644
---
Some functions used within mock selftests may expect platform-dependent
automatic modparams parameters to have already been resolved, resulting
in failed assertions.
Backing up the modparams before mock selftests and manually setting
offending parameters inside the affected selftests should fix
== Series Details ==
Series: drm/i915: Tidy error handling in i915_gem_init_hw
URL : https://patchwork.freedesktop.org/series/46393/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4475 -> Patchwork_9632 =
== Summary - SUCCESS ==
No regressions found.
External URL:
On 7/12/18 12:45 AM, Joe Perches wrote:
> On Wed, 2018-07-11 at 20:50 +0200, Daniel Vetter wrote:
>> On Wed, Jul 11, 2018 at 8:30 PM, Jens Axboe wrote:
>>> On 7/11/18 10:45 AM, Tejun Heo wrote:
On Wed, Jul 11, 2018 at 09:40:58AM -0700, Tejun Heo wrote:
> On Mon, Jul 09, 2018 at
== Series Details ==
Series: drm/i915: Tidy error handling in i915_gem_init_hw
URL : https://patchwork.freedesktop.org/series/46393/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5a23ed1e4a1a drm/i915: Tidy error handling in i915_gem_init_hw
-:12: WARNING:COMMIT_LOG_LONG_LINE:
== Series Details ==
Series: drm/i915: Remove unused engine->cleanup
URL : https://patchwork.freedesktop.org/series/46392/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4475 -> Patchwork_9631 =
== Summary - SUCCESS ==
No regressions found.
External URL:
== Series Details ==
Series: drm/i915: Bump priority of clean up work
URL : https://patchwork.freedesktop.org/series/46390/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4475 -> Patchwork_9630 =
== Summary - SUCCESS ==
No regressions found.
External URL:
On Thu, Jul 12, 2018 at 11:58:30AM +0100, Chris Wilson wrote:
> If we fail the module load, we may try and cleanup before we even
> allocate the GuC clients. KISS in order to try and re-enable
> drv_module_reload for BAT.
>
> Testcase: igt/drv_module_reload/basic-reload-inject
> Signed-off-by:
== Series Details ==
Series: drm/i915/selftests: Fixup GuC FW negative test
URL : https://patchwork.freedesktop.org/series/46388/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4475 -> Patchwork_9629 =
== Summary - SUCCESS ==
No regressions found.
External URL:
On 12/07/18 14:42, Neil Armstrong wrote:
> Hi Lee,
>
> On 12/07/2018 14:26, Lee Jones wrote:
>> On Wed, 04 Jul 2018, Neil Armstrong wrote:
>>
>>> Hi All,
>>>
>>> The new Google "Fizz" Intel-based ChromeOS device is gaining CEC support
>>> through it's Embedded Controller, to enable the Linux CEC
Quoting Michał Winiarski (2018-07-12 13:48:10)
> Let's reorder things so that we can do onion teardown rather than double
> goto.
>
> References: b96f6ebfd024 ("drm/i915: Correctly handle error path in
> i915_gem_init_hw")
> Signed-off-by: Michał Winiarski
> Cc: Michal Wajdeczko
> Cc: Sagar
On Thu, Jul 12, 2018 at 09:41:07AM +0100, Chris Wilson wrote:
> Quoting Chris Wilson (2018-07-12 09:36:33)
> > Signed-off-by: Chris Wilson
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 5 +
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> >
Quoting Michał Winiarski (2018-07-12 13:44:15)
> There's nothing there. Last vfunc got removed along with gen8 legacy
> ringbuffer submission.
Honestly it's gt.cleanup_engine that is the unwanted vfunc.
engine->cleanup is the right layer, esp as we do not plan to have a single
class of engine in
== Series Details ==
Series: drm/i915/selftests: Fixup GuC FW negative test
URL : https://patchwork.freedesktop.org/series/46388/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f9b5ed208b2f drm/i915/selftests: Fixup GuC FW negative test
-:10: WARNING:COMMIT_LOG_LONG_LINE:
Let's reorder things so that we can do onion teardown rather than double
goto.
References: b96f6ebfd024 ("drm/i915: Correctly handle error path in
i915_gem_init_hw")
Signed-off-by: Michał Winiarski
Cc: Michal Wajdeczko
Cc: Sagar Arun Kamble
---
drivers/gpu/drm/i915/i915_gem.c | 10 +++---
== Series Details ==
Series: drm/i915/guc: Skip cleaning up the doorbells on error-before-allocate
URL : https://patchwork.freedesktop.org/series/46382/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4475 -> Patchwork_9628 =
== Summary - SUCCESS ==
No regressions found.
There's nothing there. Last vfunc got removed along with gen8 legacy
ringbuffer submission.
Signed-off-by: Michał Winiarski
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c| 3 ---
drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ---
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
3
1 - 100 of 187 matches
Mail list logo
