== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev3)
URL : https://patchwork.freedesktop.org/series/84620/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9463 -> Patchwork_19089
Summary
On 2020.12.08 12:29:06 +0200, Jani Nikula wrote:
> For a long time now we've had a build option in i915 to ensure the
> headers in the driver are self-contained, i.e. they include and forward
> declare everything they need. Finally fix the gvt headers that aren't,
> and remove them from the
== Series Details ==
Series: series starting with [1/3] drm/i915/gt: stop ignoring read with
wa_masked_field_set
URL : https://patchwork.freedesktop.org/series/84714/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9463_full -> Patchwork_19087_full
== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev3)
URL : https://patchwork.freedesktop.org/series/84620/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9ae32f4f2eb1 drm/i915/pxp: Introduce Intel PXP component
-:111:
From: Anshuman Gupta
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PAVP session is enabled.
2. Buffer object is protected.
v2:
- Rebased to libva_cp-drm-tip_tgl_cp tree.
- Used gen fb obj
From: Vitaly Lubart
Export PAVP client to work with i915_cp driver,
for binding it uses kernel component framework.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/Kconfig | 2 +
drivers/misc/mei/Makefile | 1 +
drivers/misc/mei/pxp/Kconfig |
Implement the functions to allow PXP to send a GPU command, in
order to terminate the hardware session, so hardware can recycle
this session slot for the next usage.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 156
During the power event S3+ sleep/resume, hardware will lose all the
encryption keys for every hardware session, even though the
software session state was marked as alive after resume. So to
handle such case, PXP should terminate all the hardware sessions
and cleanup all the software states after
From: Bommu Krishnaiah
This api allow user mode to create Protected buffer and context creation.
Signed-off-by: Bommu Krishnaiah
Cc: Telukuntla Sreedhar
Cc: Kondapally Kalyan
Cc: Gupta Anshuman
Cc: Huang Sean Z
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 ++--
Create the arbitrary session, with the fixed session id 0xf, after
system boot, for the case that application allocates the protected
buffer without establishing any protection session. Because the
hardware requires at least one alive session for protected buffer
creation. This arbitrary session
Implement the funcs to create the TEE channel, so kernel can
send the TEE commands directly to TEE for creating the arbitrary
(defualt) session.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/Makefile| 3 +-
drivers/gpu/drm/i915/i915_drv.c | 1 +
Create the irq worker that serves as callback handler, those
callback stubs should be called while the hardware key teardown
occurs.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 4 +
drivers/gpu/drm/i915/i915_reg.h | 3 +-
Set the KCR init during the boot time, which is
required by hardware, to allow us doing further
protection operation such as sending commands to
GPU or TEE.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 8
drivers/gpu/drm/i915/pxp/intel_pxp.h | 6 ++
2
Implement the intel_pxp_gem_object_status() to allow i915 display
querying the current PXP session state. In the design, display
should not perform protection flip on the protected buffers if
there is no PXP session alive.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/pxp/intel_pxp.c |
Teardown is triggered when the display topology changes and no
long meets the secure playback requirement, and hardware trashes
all the encryption keys for display. So as a result, PXP should
handle such case and terminate the type0 sessions, which including
arb session
Signed-off-by: Huang, Sean
PXP (Protected Xe Path) is an i915 componment, available on GEN12+,
that helps to establish the hardware protected session and manage
the status of the alive software session, as well as its life cycle.
This patch series is to allow the kernel space to create and
manage a single hardware session
PXP is an i915 componment, that helps to establish the hardware
protected session and manage the status of the alive software
session, as well as its life cycle.
This patch series is to allow the kernel space to create and
manage a single hardware session (a.k.a default session or
arbitrary
From: Bommu Krishnaiah
Same old gem_create but with now with extensions support. This is needed
to support various upcoming usecases. For now we use the extensions
mechanism to support PAVP.
Signed-off-by: Bommu Krishnaiah
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
== Series Details ==
Series: series starting with [1/4] drm/i915: refactor cursor code out of
i915_display.c
URL : https://patchwork.freedesktop.org/series/84712/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9463_full -> Patchwork_19086_full
== Series Details ==
Series: series starting with [1/3] drm/i915/gt: stop ignoring read with
wa_masked_field_set
URL : https://patchwork.freedesktop.org/series/84714/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9463 -> Patchwork_19087
== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev2)
URL : https://patchwork.freedesktop.org/series/84620/
State : failure
== Summary ==
Applying: drm/i915/pxp: Introduce Intel PXP component
Applying: drm/i915/pxp: set KCR reg init during the boot time
PXP (Protected Xe Path) is an i915 componment, available on GEN12+,
that helps to establish the hardware protected session and manage
the status of the alive software session, as well as its life cycle.
This patch series is to allow the kernel space to create and
manage a single hardware session
PXP is an i915 componment, that helps to establish the hardware
protected session and manage the status of the alive software
session, as well as its life cycle.
This patch series is to allow the kernel space to create and
manage a single hardware session (a.k.a default session or
arbitrary
From: Bommu Krishnaiah
This api allow user mode to create Protected buffer and context creation.
Signed-off-by: Bommu Krishnaiah
Cc: Telukuntla Sreedhar
Cc: Kondapally Kalyan
Cc: Gupta Anshuman
Cc: Huang Sean Z
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 ++--
From: Anshuman Gupta
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PAVP session is enabled.
2. Buffer object is protected.
v2:
- Rebased to libva_cp-drm-tip_tgl_cp tree.
- Used gen fb obj
During the power event S3+ sleep/resume, hardware will lose all the
encryption keys for every hardware session, even though the
software session state was marked as alive after resume. So to
handle such case, PXP should terminate all the hardware sessions
and cleanup all the software states after
Implement the intel_pxp_gem_object_status() to allow i915 display
querying the current PXP session state. In the design, display
should not perform protection flip on the protected buffers if
there is no PXP session alive.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/pxp/intel_pxp.c |
From: Vitaly Lubart
Export PAVP client to work with i915_cp driver,
for binding it uses kernel component framework.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/Kconfig | 2 +
drivers/misc/mei/Makefile | 1 +
drivers/misc/mei/pxp/Kconfig |
Create the irq worker that serves as callback handler, those
callback stubs should be called while the hardware key teardown
occurs.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 4 +
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
From: Bommu Krishnaiah
Same old gem_create but with now with extensions support. This is needed
to support various upcoming usecases. For now we use the extensions
mechanism to support PAVP.
Signed-off-by: Bommu Krishnaiah
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Teardown is triggered when the display topology changes and no
long meets the secure playback requirement, and hardware trashes
all the encryption keys for display. So as a result, PXP should
handle such case and terminate the type0 sessions, which including
arb session
Signed-off-by: Huang, Sean
Implement the funcs to create the TEE channel, so kernel can
send the TEE commands directly to TEE for creating the arbitrary
(defualt) session.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/Makefile| 3 +-
drivers/gpu/drm/i915/i915_drv.c | 1 +
Create the arbitrary session, with the fixed session id 0xf, after
system boot, for the case that application allocates the protected
buffer without establishing any protection session. Because the
hardware requires at least one alive session for protected buffer
creation. This arbitrary session
Implement the functions to allow PXP to send a GPU command, in
order to terminate the hardware session, so hardware can recycle
this session slot for the next usage.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 156
Set the KCR init during the boot time, which is
required by hardware, to allow us doing further
protection operation such as sending commands to
GPU or TEE.
Signed-off-by: Huang, Sean Z
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 8
drivers/gpu/drm/i915/pxp/intel_pxp.h | 6 ++
2
== Series Details ==
Series: series starting with [1/4] drm/i915: refactor cursor code out of
i915_display.c
URL : https://patchwork.freedesktop.org/series/84712/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9463 -> Patchwork_19086
> As we only have a singleton session support in this series, maybe this patch
> is not needed?
We still need this patch even for single session. The reason is during the
power event or teardown event hardware will lost all the encryption key.
During this flow we need to gracefully send out the
I have removed the dead code that specific for multi-session, and will upload
the new version soon.
-Original Message-
From: Joonas Lahtinen
Sent: Monday, December 7, 2020 4:01 AM
To: Huang, Sean Z ; Intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC-v1 08/16] drm/i915/pxp:
Thanks, Yes for single session there is no ioctl exposed so I correct the
commit description.
Best regards,
Sean
-Original Message-
From: Joonas Lahtinen
Sent: Monday, December 7, 2020 3:56 AM
To: Huang, Sean Z ; Intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC-v1 07/16]
== Series Details ==
Series: series starting with [1/4] drm/i915: refactor cursor code out of
i915_display.c
URL : https://patchwork.freedesktop.org/series/84712/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b87be3dc234f drm/i915: refactor cursor code out of i915_display.c
The use of "masked" in this function is due to its history. Once upon a
time it received a mask and a value as parameter. Since
commit eeec73f8a4a4 ("drm/i915/gt: Skip rmw for masked registers")
that is not true anymore and now there is a clear and a set parameter.
Depending on the case, that can
When using masked registers, there is nothing to clear since a masked
register has the mask in the upper 16b: we can just write to the
location we want and use the mask to control what bits we are writing
to.
However that doesn't mean we don't want to read back the register and
check the value
Document what a masked register is according to bspec so we avoid
developers using the wrong functions to implement WAs.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
From: Dave Airlie
This just refactors out the fdi code to a separate file.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 684 +-
drivers/gpu/drm/i915/display/intel_display.h | 10 +
From: Dave Airlie
This pulls a large chunk of the pll calculation code out of
intel_display.c to a new file.
One function makse sense to be an inline, otherwise this
is pretty much a straight copy cover. also all the
remaining hooks for g45 and older end up the same now.
Fixed one , instead of
From: Dave Airlie
There may be more crtc code that can be pulled out, but this
is a good start.
RFC: maybe call the new file something different
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/display/intel_crtc.c| 951
From: Dave Airlie
This file is a monster, let's start simple, the cursor plane code
seems pretty standalone, and splits out easily enough.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/display/intel_cursor.c | 817
Recent events led me to notice a 20k loc file that seems excessive.
If a new driver came along and asked to merge this monster I'd say no,
so why has the in tree code gotten this bad. Standards are clearly
not being kept once code is merged, which doesn't bode well for the
future.
Anyways, as an
Hi Joonas,
> I think this should just be intel_pxp_sm_init() and then do whatever it needs
> to initialize. Also as we plan on having only a single session, I don't see
> why would we want a separate session management file/header.
> So I would be inclined to just inline the KCR_INIT macro
Hi Joonas,
Yes, I have removed this commit for single session patch series.
-Original Message-
From: Joonas Lahtinen
Sent: Monday, December 7, 2020 3:52 AM
To: Huang, Sean Z ; Intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC-v1 06/16] drm/i915/pxp: Implement funcs to
== Series Details ==
Series: linux-next: build failure after merge of the drm tree
URL : https://patchwork.freedesktop.org/series/84709/
State : failure
== Summary ==
Applying: linux-next: build failure after merge of the drm tree
Using index info to reconstruct a base tree...
M
Hi all,
After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
drivers/gpu/drm/i915/gt/intel_mocs.c: In function 'get_mocs_settings':
drivers/gpu/drm/i915/gt/intel_mocs.c:363:22: error: 'GEN11_NUM_MOCS_ENTRIES'
undeclared (first use in this function); did
== Series Details ==
Series: drm/i915: refactor cursor code out of i915_display.c
URL : https://patchwork.freedesktop.org/series/84707/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9463 -> Patchwork_19084
Summary
---
== Series Details ==
Series: drm/i915: refactor cursor code out of i915_display.c
URL : https://patchwork.freedesktop.org/series/84707/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c5d8edc678f0 drm/i915: refactor cursor code out of i915_display.c
-:24:
From: Dave Airlie
This file is a monster, let's start simple, the cursor plane code
seems pretty standalone, and splits out easily enough.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/display/intel_cursor.c | 837
== Series Details ==
Series: drm/i915/gt: Disable preparser around MI_SEMAPHORE_WAIT
URL : https://patchwork.freedesktop.org/series/84699/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9462_full -> Patchwork_19082_full
== Series Details ==
Series: series starting with [1/3] drm/i915: Remove livelock from
"do_idle_maps" vtd w/a
URL : https://patchwork.freedesktop.org/series/84706/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9463 -> Patchwork_19083
Tigerlake is plagued by spontaneous DMAR faults [reason 7, next page
table ptr is invalid] which lead to GPU hangs. These faults occur when
an iommu map is immediately reused. Adding further clflushes and
barriers around either the GTT PTE or iommu PTE updates do not prevent
the faults. So far the
Now that the only user of the uninterruptible wait was eliminated,
remove the support.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
A call to wait for the GT to idle from inside the put_pages fallback is
prone to cause an uninterruptible livelock. As it does not provide
adequate serialisation with new requests, simply fallback to a trial
sleep.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 25
== Series Details ==
Series: drm/dsc, drm/dp, and /drm/i915: rc model size updates
URL : https://patchwork.freedesktop.org/series/84685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9461_full -> Patchwork_19081_full
On Tue, Dec 08, 2020 at 02:33:54PM +0200, Jani Nikula wrote:
> The VBT fields match the DPCD data, so use the same helper.
>
> Cc: Manasi Navare
> Cc: Vandita Kulkarni
> Signed-off-by: Jani Nikula
Only for DSI so far right?
In that case looks good
Reviewed-by: Manasi Navare
Manasi
> ---
On Tue, Dec 08, 2020 at 02:33:52PM +0200, Jani Nikula wrote:
> Move the intialization of the rc_model_size from the common code into
> encoder code, allowing different encoders to specify the size according
> to their needs. Keep using the hard coded value in the encoders for now
> to make this a
Hi Joonas,
> This should really have its own function intel_pxp_context_foobar() that is
> called from this point.
DONE, remove global_state_attacked and flag_display_hm_surface_keys from this
patch and only added them if necessary.
> Also, as you see "ctx_mutex" is tautology and "mutex" is
== Series Details ==
Series: drm/i915/gt: Disable preparser around MI_SEMAPHORE_WAIT
URL : https://patchwork.freedesktop.org/series/84699/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9462 -> Patchwork_19082
Summary
Quoting Chris Wilson (2020-12-08 18:57:02)
> @@ -5015,6 +5010,7 @@ gen11_emit_fini_breadcrumb_rcs(struct i915_request
> *request, u32 *cs)
>
> static u32 *gen12_emit_preempt_busywait(struct i915_request *request, u32
> *cs)
> {
> + *cs++ = gen12_preparser_disable(true); /*
W/a 1607297627 requires us to prevent new DMA requests once the CS
enters RDOP. The recommendation is to suspend the CS preparser around
MI_SEMAPHORE_WAIT.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 5 +
== Series Details ==
Series: drm/dsc, drm/dp, and /drm/i915: rc model size updates
URL : https://patchwork.freedesktop.org/series/84685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9461 -> Patchwork_19081
Summary
---
Matthew postulated that we should be able to hit a race in
__i915_vm_close() between the RCU object free and vma unbind viz
GEM_BUG_ON(!list_empty(>bound_list));
due to the effect of leaving the vma on the list if we are unable to
obtain the kref to the object. Let's try and find that race.
== Series Details ==
Series: drm/dsc, drm/dp, and /drm/i915: rc model size updates
URL : https://patchwork.freedesktop.org/series/84685/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm/dsc, drm/dp, and /drm/i915: rc model size updates
URL : https://patchwork.freedesktop.org/series/84685/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e40fcc2fb88c drm/dsc: use rc_model_size from DSC config for PPS
d3786025b31c drm/i915/dsc:
== Series Details ==
Series: series starting with [01/20] drm/i915/gem: Drop false
!i915_vma_is_closed assertion (rev2)
URL : https://patchwork.freedesktop.org/series/84649/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9458_full -> Patchwork_19080_full
== Series Details ==
Series: drm/i915/gvt: make headers self-contained
URL : https://patchwork.freedesktop.org/series/84678/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9458_full -> Patchwork_19079_full
Summary
---
== Series Details ==
Series: series starting with [01/20] drm/i915/gem: Drop false
!i915_vma_is_closed assertion (rev2)
URL : https://patchwork.freedesktop.org/series/84649/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9458 -> Patchwork_19080
On 07/12/2020 19:38, Chris Wilson wrote:
Closed vma are protected by the GT wakeref held as we lookup the vma, so
we know that the vma will not be freed as we process it for the execbuf.
Instead we expect to catch the closed status of the context, and simply
allow the close-race on an
== Series Details ==
Series: series starting with [01/20] drm/i915/gem: Drop false
!i915_vma_is_closed assertion (rev2)
URL : https://patchwork.freedesktop.org/series/84649/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit
Stop overriding the VBT defined value for rc_model_size.
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index
The VBT fields match the DPCD data, so use the same helper.
Cc: Manasi Navare
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
Add a helper for calculating the rc buffer size from the DCPD offsets
DP_DSC_RC_BUF_BLK_SIZE and DP_DSC_RC_BUF_SIZE.
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Manasi Navare
Cc: Vandita Kulkarni
Reviewed-by: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_dsc.c | 27
Move the intialization of the rc_model_size from the common code into
encoder code, allowing different encoders to specify the size according
to their needs. Keep using the hard coded value in the encoders for now
to make this a non-functional change.
Cc: Manasi Navare
Cc: Vandita Kulkarni
The rc_model_size is specified in the DSC config, and the hardware
programming should respect that instead of hard coding a value of 8192.
Regardless, the rc_model_size in DSC config is currently hard coded to
the same value, so this should have no impact, other than allowing the
use of other
The PPS is supposed to reflect the DSC config instead of hard coding the
rc_model_size. Make it so.
Currently all users of drm_dsc_pps_payload_pack() hard code the size to
8192 also in the DSC config, so this change should have no impact, other
than allowing the drivers to use other sizes as
For whatever reason this old series was never merged. Please let's get
this done.
For i915 DP this still needs a patch to start using the model size from
DPCD.
BR,
Jani.
Jani Nikula (6):
drm/dsc: use rc_model_size from DSC config for PPS
drm/i915/dsc: configure hardware using specified
== Series Details ==
Series: drm/i915/gvt: make headers self-contained
URL : https://patchwork.freedesktop.org/series/84678/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9458 -> Patchwork_19079
Summary
---
Refactor the allocation such that we utilise just enough memory pressure
to invoke the shrinker, and just enough processes to spread across the
CPUs and contend on the shrinker.
Signed-off-by: Chris Wilson
---
tests/i915/gem_shrink.c | 11 ++-
1 file changed, 6 insertions(+), 5
Hi Chris,
> - /* Check results match the legacy GET_PARAM (where we can). */
> + /* Confirm the individual engines exist with EXECBUFFER2 */
> for (i = 0; i < engines->num_engines; i++) {
> struct drm_i915_engine_info *engine =
> (struct
We assume that the contents of the HWSP are lost across suspend, and so
upon resume we must restore critical values such as the timeline seqno.
Keep track of every timeline allocated that uses the HWSP as its storage
and so we can then reset all seqno values by walking that list.
Signed-off-by:
Quoting Tvrtko Ursulin (2020-12-08 11:18:56)
>
> On 08/12/2020 11:04, Petri Latvala wrote:
> > On Mon, Dec 07, 2020 at 04:11:50PM +, Chris Wilson wrote:
> >> Simplify the cross-check by asserting that the existence of an engine in
> >> the list matches the existence of the engine as reported
On 08/12/2020 11:04, Petri Latvala wrote:
On Mon, Dec 07, 2020 at 04:11:50PM +, Chris Wilson wrote:
Simplify the cross-check by asserting that the existence of an engine in
the list matches the existence of the engine as reported by GETPARAM.
By using the comparison, we check both
On Mon, Dec 07, 2020 at 04:11:50PM +, Chris Wilson wrote:
> Simplify the cross-check by asserting that the existence of an engine in
> the list matches the existence of the engine as reported by GETPARAM.
> By using the comparison, we check both directions at once.
>
> Signed-off-by: Chris
On Tue, 08 Dec 2020, Ankit Nautiyal wrote:
> This patch series attempts to add support for a DP-HDMI2.1 Protocol
> Convertor. The VESA spec for the HDMI2.1 PCON are proposed in Errata
> E5 to DisplayPort_v2.0:
> https://vesa.org/join-vesamemberships/member-downloads/?action=stamp=42299
> The
Add necessary #includes and forward declarations to make the header
compile on its own.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 1 -
drivers/gpu/drm/i915/gvt/gvt.h | 4
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/Makefile
Add necessary #includes and forward declarations to make the header
compile on its own.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 3 +--
drivers/gpu/drm/i915/gvt/mpt.h | 2 ++
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Makefile
Add necessary #includes and forward declarations to make the header
compile on its own.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile| 3 +--
drivers/gpu/drm/i915/gvt/scheduler.h | 5 +
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git
Add necessary #includes and forward declarations to make the header
compile on its own.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 1 -
drivers/gpu/drm/i915/gvt/mmio_context.h | 11 +++
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git
Add necessary #includes and forward declarations to make the header
compile on its own.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile| 1 -
drivers/gpu/drm/i915/gvt/interrupt.h | 5 -
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git
Add necessary #includes and forward declarations to make the header
compile on its own.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 1 -
drivers/gpu/drm/i915/gvt/gtt.h | 11 ++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git
Add necessary #includes and forward declarations to make the header
compile on its own.
While at it, also remove a useless forward declaration.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 1 -
drivers/gpu/drm/i915/gvt/fb_decoder.h | 6 --
2 files changed, 4
Remove unused declaration.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 1 -
drivers/gpu/drm/i915/gvt/execlist.h | 3 ---
2 files changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index e5574e506a5c..40253c45f705 100644
For a long time now we've had a build option in i915 to ensure the
headers in the driver are self-contained, i.e. they include and forward
declare everything they need. Finally fix the gvt headers that aren't,
and remove them from the exclude list.
Please use the CONFIG_DRM_I915_WERROR=y config
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