> From: Alex Williamson
> Sent: Thursday, June 1, 2023 1:22 AM
> > Now, I intend to disallow it. If compat mode user binds the devices
> > to different containers, it shall be able to do hot reset as it can use
> > group fd to prove ownership. But if using the zero-length array, it
> > would be
For modifier not supporting async flip, print the modifier and display
version. Helps in reading the error message.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git
On Wed, 31 May 2023 16:56:34 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh,
> Instead of aged_tail use an iterator that starts from the hw_tail and
> goes backward until the oa_buffer.tail looking for valid reports.
Hmm I don't think this description is correct. All this patch is doing is
the
On Wed, 31 May 2023 16:56:33 -0700, Umesh Nerlige Ramappa wrote:
>
> ggtt offset for hw_tail is not required for the calculations, so drop
> it.
>
> Signed-off-by: Umesh Nerlige Ramappa
> ---
> drivers/gpu/drm/i915/i915_perf.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff
On Wed, 31 May 2023 16:56:32 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh,
> On DG2, capturing OA reports while running heavy render workloads
> sometimes results in invalid OA reports where 64-byte chunks inside
> reports have stale values. Under memory pressure, high OA sampling rates
>
== Series Details ==
Series: Avoid reading OA reports before they land
URL : https://patchwork.freedesktop.org/series/118678/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13210 -> Patchwork_118678v1
Summary
---
== Series Details ==
Series: Avoid reading OA reports before they land
URL : https://patchwork.freedesktop.org/series/118678/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: HuC loading and authentication for MTL (rev7)
URL : https://patchwork.freedesktop.org/series/117080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13210 -> Patchwork_117080v7
Summary
== Series Details ==
Series: drm/i915: HuC loading and authentication for MTL (rev7)
URL : https://patchwork.freedesktop.org/series/117080/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: HuC loading and authentication for MTL (rev7)
URL : https://patchwork.freedesktop.org/series/117080/
State : warning
== Summary ==
Error: dim checkpatch failed
db328ae23aa3 drm/i915/uc: perma-pin firmwares
-:124: ERROR:SPACING: space prohibited before
== Series Details ==
Series: mtl: add support for pmdemand (rev10)
URL : https://patchwork.freedesktop.org/series/116949/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13210 -> Patchwork_116949v10
Summary
---
== Series Details ==
Series: mtl: add support for pmdemand (rev10)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: mtl: add support for pmdemand (rev10)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim checkpatch failed
b714d57c5518 drm/i915: fix the derating percentage for MTL
be6708c171e2 drm/i915: update the QGV point frequency
== Series Details ==
Series: drm/i915: sync I915_PMU_MAX_GTS to I915_MAX_GT
URL : https://patchwork.freedesktop.org/series/118672/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13210 -> Patchwork_118672v1
Summary
---
== Series Details ==
Series: drm/i915: sync I915_PMU_MAX_GTS to I915_MAX_GT
URL : https://patchwork.freedesktop.org/series/118672/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118660/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13210 -> Patchwork_118660v1
Summary
---
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118660/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118660/
State : warning
== Summary ==
Error: dim checkpatch failed
d46f34f8bb0e drm/i915: Allow user to set cache at BO creation
-:28: WARNING:COMMIT_LOG_LONG_LINE:
== Series Details ==
Series: drm/i915_drm.h: fix a typo (rev2)
URL : https://patchwork.freedesktop.org/series/118479/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13200_full -> Patchwork_118479v2_full
Summary
---
On 5/25/2023 4:48 PM, Teres Alexis, Alan Previn wrote:
Considering the only request i have below is touching up of existing comments
(as
far as this patch is concerned), and since the rest of the code looks good,
here is
my R-b - but i hope you can anwser my newbie question at the bottom:
On 5/26/2023 3:57 PM, Teres Alexis, Alan Previn wrote:
On Fri, 2023-05-05 at 09:04 -0700, Ceraolo Spurio, Daniele wrote:
Add a new debugfs to dump information about the GSC. This includes:
alan:snip
Actually everything looks good except for a couple of questions + asks - hope
we can close
On Wed, May 31, 2023 at 08:02:14PM +0530, Tejas Upadhyay wrote:
> Wa_14016712196 implementation for mtl
Since this isn't one of the trivial "write XXX to register YYY"
workarounds, you might want to give a brief description of what we're
being directed to do. E.g.,
"Wa_14016712196 asks us to
== Series Details ==
Series: drm/i915/gt: Add workaround 14016712196 (rev3)
URL : https://patchwork.freedesktop.org/series/117661/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13210 -> Patchwork_117661v3
Summary
---
== Series Details ==
Series: HDCP Cleanup (rev4)
URL : https://patchwork.freedesktop.org/series/117938/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13200_full -> Patchwork_117938v4_full
Summary
---
**SUCCESS**
On DG2, capturing OA reports while running heavy render workloads
sometimes results in invalid OA reports where 64-byte chunks inside
reports have stale values. Under memory pressure, high OA sampling rates
(13.3 us) and heavy render workload, occasionally, the OA HW TAIL
pointer does not progress
Instead of aged_tail use an iterator that starts from the hw_tail and
goes backward until the oa_buffer.tail looking for valid reports.
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_perf.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git
ggtt offset for hw_tail is not required for the calculations, so drop
it.
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_perf.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index
Fix OA issue seen on DG2 where parts of OA reports are zeroed out or
have stale values. This was due to the fact that rewind logic was not
being run when the tail pointer was aged. The series drops the complex
aging/aged logic and just checks the reports for validity.
rev1 -
Follow the same logic as DG2, so just a meu binary with no version number.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan Previn
Reviewed-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
Before we add the second step of the MTL HuC auth (via GSC), we need to
have the ability to differentiate between them. To do so, the huc
authentication check is duplicated for GuC and GSC auth, with
GSC-enabled binaries being considered fully authenticated only after
the GSC auth step.
To report
The full authentication via the GSC requires an heci packet submission
to the GSC FW via the GSC CS. The GSC has new PXP command for this
(literally called NEW_HUC_AUTH).
The intel_huc_auth function is also updated to handle both authentication
types.
v2: check that the GuC auth for clear media
On MTL, for obvious reasons, HuC is only available on the media tile.
We already disable SW support for HuC on the root gt due to the
absence of VCS engines, but we also need to update the getparam to point
to the HuC struct in the media GT.
Signed-off-by: Daniele Ceraolo Spurio
Cc: John
In the previous patch we extracted the offset of the legacy-style HuC
binary located within the GSC-enabled blob, so now we can use that to
load the HuC via DMA if the fuse is set that way.
Note that we now need to differentiate between "GSC-enabled binary" and
"loaded by GSC", so the former case
Now that each FW has its own reserved area, we can keep them always
pinned and skip the pin/unpin dance on reset. This will make things
easier for the 2-step HuC authentication, which requires the FW to be
pinned in GGTT after the xfer is completed.
Since the vma is now valid for a long time and
The new binaries that support the 2-step authentication contain the
legacy-style binary, which we can use for loading the HuC via DMA. To
find out where this is located in the image, we need to parse the
manifest of the GSC-enabled HuC binary. The manifest consist of a
partition header followed by
The HuC loading and authentication flow is once again changing and a new
"clear-media only" authentication step is introduced. The flow is as
follows:
1) The HuC is loaded via DMA - same as all non-GSC HuC binaries.
2) The HuC is authenticated by the GuC - this is the same step as
performed for
From: Mika Kahola
MTL introduces a new way to instruct the PUnit with
power and bandwidth requirements of DE. Add the functionality
to program the registers and handle waits using interrupts.
The current wait time for timeouts is programmed for 10 msecs to
factor in the worst case scenarios.
>From MTL onwards, we need to find the best QGV point based on
the required data rate and pass the peak BW of that point to
the punit to lock the corresponding QGV point.
v1: Fix for warning from kernel test robot
Bspec: 64636
Reported-by: kernel test robot
Closes:
MTL uses the peak BW of a QGV point to lock the required QGV
point instead of the QGV index. Instead of passing the deratedbw
of the selected bw_info, return the index to the selected
bw_info so that either deratedbw or peakbw can be used based on
the platform.
v2: use idx to store index returned
Extract intel_bw_check_qgv_points() from intel_bw_atomic_check
to facilitate future platform variations in handling SAGV
configurations.
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_bw.c | 235 +---
1 file
In MTL onwards, pcode locks the GV point based on the peak BW
of a QGV point. So store the peak BW of all the QGV points.
v2: use DIV_ROUND_CLOSEST() for the peakBW calculation
Bspec: 64636
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
>From MTL onwwards, pcode locks the QGV point based on peak BW of
the intended QGV point passed by the driver. So the peak BW
calculation must match the value expected by the pcode. Update
the calculations as per the Bspec.
v2: use DIV_ROUND_* macro for the calculations (Ville)
v3: Use only
Follow the values from bspec for the percentage overhead for
efficiency in MTL BW calculations.
Bspec: 64631
Signed-off-by: Vinod Govindapillai
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
SAGV configuration support for MTL
v2: added one missing patch in the previous version
v3: chekcpatch warning fixes
update index handling for the icl/tgl QGV point handling
program pmdemand code simplified
v4: update to debufs and pipe values pmdemand regiters
removed the macro
Hi Matt,
On Wed, May 31, 2023 at 03:07:22PM -0700, Matt Atwood wrote:
> On Wed, May 31, 2023 at 11:48:33PM +0200, Andi Shyti wrote:
> > Hi Matt,
> >
> > On Wed, May 31, 2023 at 02:35:47PM -0700, Matt Atwood wrote:
> > > Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
> >
On Wed, May 31, 2023 at 11:48:33PM +0200, Andi Shyti wrote:
> Hi Matt,
>
> On Wed, May 31, 2023 at 02:35:47PM -0700, Matt Atwood wrote:
> > Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
> > values to be different.
> >
> > Cc: Tvrtko Ursulin
> > Cc: Umesh Nerlige
== Series Details ==
Series: drm/i915: No 10bit gamma on desktop gen3 parts
URL : https://patchwork.freedesktop.org/series/118651/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13209 -> Patchwork_118651v1
Summary
---
Hi Matt,
On Wed, May 31, 2023 at 02:35:47PM -0700, Matt Atwood wrote:
> Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
> values to be different.
>
> Cc: Tvrtko Ursulin
> Cc: Umesh Nerlige Ramappa
> Cc: Ashutosh Dixit
> Signed-off-by: Matt Atwood
> ---
>
Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
values to be different.
Cc: Tvrtko Ursulin
Cc: Umesh Nerlige Ramappa
Cc: Ashutosh Dixit
Signed-off-by: Matt Atwood
---
drivers/gpu/drm/i915/i915_pmu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 5/30/23 01:39, Dmitry Osipenko wrote:
> Change locking policy of mmap() callback, making exporters responsible
> for handling dma-buf reservation locking. Previous locking policy stated
> that dma-buf is locked for both importers and exporters by the dma-buf
> core, which caused a deadlock
== Series Details ==
Series: drm/i915: Init DDI ports based on port_mask (rev3)
URL : https://patchwork.freedesktop.org/series/117641/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13208 -> Patchwork_117641v3
Summary
== Series Details ==
Series: drm/i915: Init DDI ports based on port_mask (rev3)
URL : https://patchwork.freedesktop.org/series/117641/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Init DDI ports based on port_mask (rev3)
URL : https://patchwork.freedesktop.org/series/117641/
State : warning
== Summary ==
Error: dim checkpatch failed
67cd6af1981f drm/i915: Remove bogus DDI-F from hsw/bdw output init
a501e7fc9ff2 drm/i915: Introduce
== Series Details ==
Series: drm/i915: Remove unreachable code (rev2)
URL : https://patchwork.freedesktop.org/series/86479/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CC [M]
On Fri, May 26, 2023 at 10:04:27AM +0800, Baolu Lu wrote:
> On 5/25/23 9:02 PM, Liu, Yi L wrote:
> > > It's possible that requirement
> > > might be relaxed in the new DMA ownership model, but as it is right
> > > now, the code enforces that requirement and any new discussion about
> > > what
On 5/30/2023 5:33 PM, Teres Alexis, Alan Previn wrote:
On Fri, 2023-05-26 at 17:52 -0700, Ceraolo Spurio, Daniele wrote:
The full authentication via the GSC requires an heci packet submission
to the GSC FW via the GSC CS. The GSC has new PXP command for this
(literally called NEW_HUC_AUTH).
Hi Tejas,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Tejas-Upadhyay/drm-i915-gt-Add-workaround-14016712196/20230531-222808
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
On Tue, 30 May 2023 04:23:12 +
"Liu, Yi L" wrote:
> > From: Alex Williamson
> > Sent: Thursday, May 25, 2023 4:20 AM
> >
> > On Mon, 22 May 2023 04:57:51 -0700
> > Yi Liu wrote:
> >
> > > This is the way user to invoke hot-reset for the devices opened by cdev
> > > interface. User
On Thu, 25 May 2023, Gustavo Sousa wrote:
> Quoting Jani Nikula (2023-05-25 18:06:53-03:00)
>>Use localized __diag_push(), __diag_ignore_all() with rationale, and
>>__diag_pop() for specific initializations instead of blanket disabling
>>of -Woverride-init across several files.
>>
== Series Details ==
Series: drm/i915/gvt: remove unused variable gma_bottom in command parser (rev2)
URL : https://patchwork.freedesktop.org/series/118512/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13207 -> Patchwork_118512v2
From: Fei Yang
This series introduce a new extension for GEM_CREATE,
1. end support for set caching ioctl [PATCH 1/2]
2. add set_pat extension for gem_create [PATCH 2/2]
v2: drop one patch that was merged separately
commit 341ad0e8e254 ("drm/i915/mtl: Add PTE encode function")
v3: rebased
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a
Hi John,
On Wed, May 31, 2023 at 08:59:42AM -0700, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> There were a bunch of defines and structures left over from an API
> update a very long time ago. Remove them.
>
> Signed-off-by: John Harrison
> ---
>
== Series Details ==
Series: drm/i915/gvt: remove unused variable gma_bottom in command parser (rev2)
URL : https://patchwork.freedesktop.org/series/118512/
State : warning
== Summary ==
Error: dim checkpatch failed
c6878ab01be9 drm/i915/gvt: remove unused variable gma_bottom in command
== Series Details ==
Series: s/ADL/ALDERLAKE
URL : https://patchwork.freedesktop.org/series/118596/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13207 -> Patchwork_118596v1
Summary
---
**SUCCESS**
No regressions
Hi Tejas,
On Wed, May 31, 2023 at 08:02:14PM +0530, Tejas Upadhyay wrote:
> Wa_14016712196 implementation for mtl
>
> Bspec: 72197
>
> V3:
> - Wrap dummy pipe control stuff in API - Andi
> V2:
> - Fix kernel test robot warnings
>
> Closes:
>
== Series Details ==
Series: s/ADL/ALDERLAKE
URL : https://patchwork.freedesktop.org/series/118596/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: s/ADL/ALDERLAKE
URL : https://patchwork.freedesktop.org/series/118596/
State : warning
== Summary ==
Error: dim checkpatch failed
4fc3d4f72d67 drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step
-:7: WARNING:TYPO_SPELLING: 'platfrom' may be misspelled
Hi Yang,
kernel test robot noticed the following build warnings:
[auto build test WARNING on next-20230530]
url:
https://github.com/intel-lab-lkp/linux/commits/Yang-Li/drm-i915-remove-unreachable-code/20230531-101832
base: next-20230530
patch link:
https://lore.kernel.org/r
From: John Harrison
There were a bunch of defines and structures left over from an API
update a very long time ago. Remove them.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 33 -
1 file changed, 33 deletions(-)
diff --git
== Series Details ==
Series: drm/i915/pxp: Fix size_t format specifier in gsccs_send_message()
URL : https://patchwork.freedesktop.org/series/118593/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13206 -> Patchwork_118593v1
Hi Yang,
kernel test robot noticed the following build errors:
[auto build test ERROR on next-20230530]
url:
https://github.com/intel-lab-lkp/linux/commits/Yang-Li/drm-i915-remove-unreachable-code/20230531-101832
base: next-20230530
patch link:
https://lore.kernel.org/r
== Series Details ==
Series: drm/i915/pxp: Fix size_t format specifier in gsccs_send_message()
URL : https://patchwork.freedesktop.org/series/118593/
State : warning
== Summary ==
Error: dim checkpatch failed
702a41400915 drm/i915/pxp: Fix size_t format specifier in gsccs_send_message()
-:18:
On Tue, 30 May 2023, Jani Nikula wrote:
> Rebase of https://patchwork.freedesktop.org/series/116813/
>
> Move struct drm_edid conversions forward.
>
> There are still some drm_edid_raw() stragglers, but this nudges things
> forward nicely.
>
> Jani Nikula (13):
> drm/edid: parse display info
Wa_14016712196 implementation for mtl
Bspec: 72197
V3:
- Wrap dummy pipe control stuff in API - Andi
V2:
- Fix kernel test robot warnings
Closes:
https://lore.kernel.org/oe-kbuild-all/202305121525.3ewdgoby-...@intel.com/
Signed-off-by: Tejas Upadhyay
---
From: Ville Syrjälä
Apparently desktop gen3 parts don't support the
10bit gamma mode at all. Stop claiming otherwise.
As is the case with pipe A on gen3 mobile parts, the
PIPECONF gamma mode bit can be set but it has no
effect on the output.
PNV seems to be the only slight exception, but
From: Ville Syrjälä
The SDVO code already warns when the port in question doesn't
actually support SDVO. Let's make that also bail the encoder
registration like the generic assert_port_valid() we added.
And add a similar thing for g4x HDMI, mainly because on g4x
itsefl port D only supports DP
From: Ville Syrjälä
Make HSW/BDW use port_mask for output probing as well.
To achieve that the strap checks are moved into
intel_ddi_init() itself. Or should we move them to the
runtime port_mask init instead? Maybe not since the hardware
is still there, just not connected to anything.
v2:
From: Ville Syrjälä
Instead of listing every platform's possible DDI outputs
in intel_setup_outputs() just loop over the new port_mask
to achieve the same thing.
HSW/BDW were left as is since they still look at the straps
as well.
DSI is still a mess. For now just check for the relevant
From: Ville Syrjälä
Sprinkle in some BUILD_BUG_ON()s to make sure some of
the bitmasks used in the device info have enough bits.
Do we have a better place for this sort of stuff?
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_device_info.c | 4
1 file changed, 4
From: Ville Syrjälä
HSW/BDW don't have DDI-F so don't go looking for one.
Seems to have been accidentally left behind when the
skl+ stuff got split out in commit 097d9e902068
("drm/i915/display: remove strap checks from gen 9").
Reviewed-by: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
Sprinkle some asserts to catch any mishaps in the port_mask
vs. output init.
For DDI/DP/HDMI/SDVO I decided that we want to bail out for
an invalid port since those are the encoder types where
we might want consider driving the whole thing from the VBT
child device list, and
From: Ville Syrjälä
Declare the available DVO/SDVO/HDMI/DP/DDI ports in the
device info. The other outputs (LVDS/TV/DSI/VGA) are left
out since for most of them we don't consider them as "ports".
DSI we should probably perhaps include somehow in the device
info. Just not sure how. Or we just
From: Ville Syrjälä
Introduce port_mask into the device info and utilize it
it initalize DDI ports instead of hand rolling each
intel_ddi_init() call per platform+port.
This is an intermediate step towards initializing
DDI/DP/HDMI/DSI ports purely based on VBT information.
v2: rebased due to
== Series Details ==
Series: drm/i915/gt: Fix recent kCFI violations
URL : https://patchwork.freedesktop.org/series/118591/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13206 -> Patchwork_118591v1
Summary
---
== Series Details ==
Series: drm/i915/gt: Fix recent kCFI violations
URL : https://patchwork.freedesktop.org/series/118591/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/gt: Fix recent kCFI violations
URL : https://patchwork.freedesktop.org/series/118591/
State : warning
== Summary ==
Error: dim checkpatch failed
566454e9806c drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode
callbacks
-:20:
== Series Details ==
Series: drm/i915/selftest/gsc: Ensure GSC Proxy init completes before selftests
(rev2)
URL : https://patchwork.freedesktop.org/series/117713/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13206 -> Patchwork_117713v2
== Series Details ==
Series: drm/i915/selftest/gsc: Ensure GSC Proxy init completes before selftests
(rev2)
URL : https://patchwork.freedesktop.org/series/117713/
State : warning
== Summary ==
Error: dim checkpatch failed
35fe6f671494 drm/i915/selftest/gsc: Ensure GSC Proxy init completes
> -Original Message-
> From: Andi Shyti
> Sent: Wednesday, May 31, 2023 5:45 PM
> To: Hajda, Andrzej
> Cc: Upadhyay, Tejas ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH V2] drm/i915/gt: Add workaround
> 14016712196
>
> Hi Andrzej,
>
> > > @@ -218,6 +242,16
Hi Carl,
On Wed, May 31, 2023 at 12:24:07PM +, Zhang, Carl wrote:
> Hi Andi & Fei,
> We verified your change by UMD change:
> 1. implement the uAPI by
>
> https://github.com/intel/media-driver/commit/92c00a857433ebb34ec575e9834f473c6fcb6341
> 2. old kernel may not support new uAPI, so UMD
Hi Andi & Fei,
We verified your change by UMD change:
1. implement the uAPI by
https://github.com/intel/media-driver/commit/92c00a857433ebb34ec575e9834f473c6fcb6341
2. old kernel may not support new uAPI, so UMD try the interface firstly, if it
failed, will fallback to older interfaces
Hi Andrzej,
> > @@ -218,6 +242,16 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32
> > mode)
> > u32 flags = 0;
> > u32 *cs, count;
> > + /* Wa_14016712196 */
> > + if (IS_MTL_GRAPHICS_STEP(engine->i915, M, STEP_A0, STEP_B0) ||
> > +
On 17.05.2023 15:22, Tejas Upadhyay wrote:
Wa_14016712196 implementation for mtl
Bspec: 72197
V2:
- Fix kernel test robot warnings
Reported-by: kernel test robot
I do not think robot reported lack of this wa :), putting lkp in
changelog should be enough.
Closes:
> -Original Message-
> From: Intel-gfx On Behalf Of
> Chaitanya Kumar Borah
> Sent: Monday, May 29, 2023 9:08 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Roper, Matthew D
> Subject: [Intel-gfx] [PATCH v2] drm/i915/display: Set correct voltage level
> for 480MHz CDCLK
>
> According
Hi Carl,
On Wed, May 24, 2023 at 01:02:55PM -0700, fei.y...@intel.com wrote:
> From: Fei Yang
>
> To comply with the design that buffer objects shall have immutable
> cache setting through out their life cycle, {set, get}_caching ioctl's
> are no longer supported from MTL onward. With that
Hi Tejas,
> >
> > I'm wondering, though, if we can put both dummy pipe and real pipe in the
> > same command and advance the ring only once at the end... nevermind.
>
> As we have conditional ring increments, we cant decide ring size at start in
> ring begin for whole bunch at once. Though
> -Original Message-
> From: Andi Shyti
> Sent: Wednesday, May 31, 2023 2:36 AM
> To: Upadhyay, Tejas
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH V2] drm/i915/gt: Add workaround
> 14016712196
>
> Hi Tejas,
>
> On Wed, May 17, 2023 at 06:52:30PM +0530,
> -Original Message-
> From: Andi Shyti
> Sent: Wednesday, May 31, 2023 2:42 AM
> To: Upadhyay, Tejas
> Cc: intel-gfx@lists.freedesktop.org; Wilson, Chris P
>
> Subject: Re: [Intel-gfx] [PATCH V2] drm/i915/gem: Use large rings for
> compute contexts
>
> Hi Tejas,
>
> Just one
== Series Details ==
Series: drm/i915: HuC loading and authentication for MTL (rev6)
URL : https://patchwork.freedesktop.org/series/117080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13204 -> Patchwork_117080v6
Summary
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