== Series Details ==
Series: drm/i915/gvt: remove unused variable gma_bottom in command parser (rev2)
URL : https://patchwork.freedesktop.org/series/118512/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13207_full -> Patchwork_118512v2_full
== Series Details ==
Series: s/ADL/ALDERLAKE
URL : https://patchwork.freedesktop.org/series/118596/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13207_full -> Patchwork_118596v1_full
Summary
---
**FAILURE**
== Series Details ==
Series: dim: Disallow remote branch deletions with 'dim push'
URL : https://patchwork.freedesktop.org/series/118744/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/118744/revisions/1/mbox/ not
applied
Applying: dim: Disallow
An inadvertent 'dim push -d' can delete remote branches. Disallow such
remote branch deletions.
Signed-off-by: Ashutosh Dixit
---
dim | 6 ++
1 file changed, 6 insertions(+)
diff --git a/dim b/dim
index 126568e..e5899e6 100755
--- a/dim
+++ b/dim
@@ -1029,6 +1029,12 @@ function
On Thu, 01 Jun 2023 17:40:18 -0700, Andi Shyti wrote:
>
Hi Andi,
> On Thu, Jun 01, 2023 at 05:23:24PM -0700, Dixit, Ashutosh wrote:
> > On Thu, 01 Jun 2023 11:30:44 -0700, Dixit, Ashutosh wrote:
> > >
> > > On Thu, 01 Jun 2023 11:22:18 -0700, Dixit, Ashutosh wrote:
> > > >
> > > > On Wed, 31 May
== Series Details ==
Series: drm/i915/display: Print usefull information on error (rev3)
URL : https://patchwork.freedesktop.org/series/118685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13218 -> Patchwork_118685v3
For modifier not supporting async flip, print the modifier and display
version. Helps in reading the error message.
v2: Reframe the error message (Jani)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++
1 file changed, 6 insertions(+), 4
== Series Details ==
Series: drm/i915/pxp: Fix size_t format specifier in gsccs_send_message()
URL : https://patchwork.freedesktop.org/series/118593/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13206_full -> Patchwork_118593v1_full
Hi Nathan,
On Tue, May 30, 2023 at 11:24:37AM -0700, Nathan Chancellor wrote:
> Hi all,
>
> This series fixes a few clang kernel Control Flow Integrity (kCFI)
> violations that appear after commit 9275277d5324 ("drm/i915: use
> pat_index instead of cache_level"). They were found between run time
Hi Arnd,
On Thu, Jun 01, 2023 at 10:00:27PM +, Teres Alexis, Alan Previn wrote:
> On Thu, 2023-06-01 at 23:36 +0200, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > While 'unsigned long' needs the %ld format string, size_t needs the %z
> > modifier:
>
> alan:snip
>
>
> > +++
Hi Ashutosh,
On Thu, Jun 01, 2023 at 05:23:24PM -0700, Dixit, Ashutosh wrote:
> On Thu, 01 Jun 2023 11:30:44 -0700, Dixit, Ashutosh wrote:
> >
> > On Thu, 01 Jun 2023 11:22:18 -0700, Dixit, Ashutosh wrote:
> > >
> > > On Wed, 31 May 2023 14:35:47 -0700, Matt Atwood wrote:
> > > >
> > >
> > > Hi
On Thu, 01 Jun 2023 11:30:44 -0700, Dixit, Ashutosh wrote:
>
> On Thu, 01 Jun 2023 11:22:18 -0700, Dixit, Ashutosh wrote:
> >
> > On Wed, 31 May 2023 14:35:47 -0700, Matt Atwood wrote:
> > >
> >
> > Hi Matt,
> >
> > > Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
> > >
== Series Details ==
Series: drm/i915/pxp: use correct format string for size_t
URL : https://patchwork.freedesktop.org/series/118731/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118731v1
Summary
== Series Details ==
Series: drm/i915/pxp: use correct format string for size_t
URL : https://patchwork.freedesktop.org/series/118731/
State : warning
== Summary ==
Error: dim checkpatch failed
f813cf5d141a drm/i915/pxp: use correct format string for size_t
-:13: WARNING:BAD_FIXES_TAG: Please
== Series Details ==
Series: drm/i915/display: Extract display init from
intel_device_info_runtime_init
URL : https://patchwork.freedesktop.org/series/118730/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118730v1
== Series Details ==
Series: drm/i915/display: Extract display init from
intel_device_info_runtime_init
URL : https://patchwork.freedesktop.org/series/118730/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: drm/i915/display: Extract display init from
intel_device_info_runtime_init
URL : https://patchwork.freedesktop.org/series/118730/
State : warning
== Summary ==
Error: dim checkpatch failed
7e88c49f41ae drm/i915/display: Extract display init from
On Wed, 2023-05-31 at 16:54 -0700, Ceraolo Spurio, Daniele wrote:
> The full authentication via the GSC requires an heci packet submission
> to the GSC FW via the GSC CS. The GSC has new PXP command for this
> (literally called NEW_HUC_AUTH).
> The intel_huc_auth function is also updated to handle
== Series Details ==
Series: drm/i915/pxp: Optimize GET_PARAM:PXP_STATUS
URL : https://patchwork.freedesktop.org/series/118723/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118723v1
Summary
---
On 5/29/2023 4:49 AM, Suraj Kandpal wrote:
Modify intel_gsc_send_sync() to take into account header_out
and addr_out so as to use them to verify the message send status.
Cc: Daniele Ceraolo Spurio
Cc: Alan Previn
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
I think this patch should
On 5/29/2023 4:49 AM, Suraj Kandpal wrote:
Allocate a multipage object that can be used for input
and output for intel_hdcp_gsc_message so that corruption of
output message can be avoided by the current overwriting method.
--v2
-Change approach from allocating two objects to just one
== Series Details ==
Series: drm/i915: Fix error handling if driver creation fails during probe
URL : https://patchwork.freedesktop.org/series/118722/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118722v1
== Series Details ==
Series: drm/i915: Fix error handling if driver creation fails during probe
URL : https://patchwork.freedesktop.org/series/118722/
State : warning
== Summary ==
Error: dim checkpatch failed
69336201b326 drm/i915: Fix error handling if driver creation fails during probe
== Series Details ==
Series: drm/i915/gt: Fix recent kCFI violations
URL : https://patchwork.freedesktop.org/series/118591/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13206_full -> Patchwork_118591v1_full
Summary
== Series Details ==
Series: mtl: add support for pmdemand (rev12)
URL : https://patchwork.freedesktop.org/series/116949/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_116949v12
Summary
---
On Thu, 2023-06-01 at 23:36 +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> While 'unsigned long' needs the %ld format string, size_t needs the %z
> modifier:
alan:snip
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> @@ -143,7 +143,7 @@ gsccs_send_message(struct intel_pxp *pxp,
>
== Series Details ==
Series: mtl: add support for pmdemand (rev12)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim checkpatch failed
8ae8740d3ed0 drm/i915: fix the derating percentage for MTL
277951603ecd drm/i915: update the QGV point frequency
== Series Details ==
Series: mtl: add support for pmdemand (rev12)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
From: Arnd Bergmann
While 'unsigned long' needs the %ld format string, size_t needs the %z
modifier:
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c: In function 'gsccs_send_message':
include/drm/drm_print.h:456:39: error: format '%ld' expects argument of type
'long int', but argument 4 has type
== Series Details ==
Series: drm/i915/pxp/mtl: intel_pxp_init_hw needs runtime-pm inside pm-complete
URL : https://patchwork.freedesktop.org/series/118714/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118714v1
== Series Details ==
Series: drm/i915/selftest/gsc: Ensure GSC Proxy init completes before selftests
(rev2)
URL : https://patchwork.freedesktop.org/series/117713/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13206_full -> Patchwork_117713v2_full
Moving display-specific runtime info initialization into display/ makes
the display code more self-contained and also makes it easier to call
from the Xe driver.
Cc: Jani Nikula
Signed-off-by: Matt Roper
---
.../drm/i915/display/intel_display_device.c | 124 +
== Series Details ==
Series: drm/i915/gt: limit lmem allocation size to succeed on SmallBars
URL : https://patchwork.freedesktop.org/series/118711/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118711v1
On 5/31/2023 16:54, Daniele Ceraolo Spurio wrote:
In the previous patch we extracted the offset of the legacy-style HuC
binary located within the GSC-enabled blob, so now we can use that to
load the HuC via DMA if the fuse is set that way.
Note that we now need to differentiate between
On 5/31/2023 16:54, Daniele Ceraolo Spurio wrote:
Before we add the second step of the MTL HuC auth (via GSC), we need to
have the ability to differentiate between them. To do so, the huc
authentication check is duplicated for GuC and GSC auth, with
GSC-enabled binaries being considered fully
On 5/31/2023 16:54, Daniele Ceraolo Spurio wrote:
In the previous patch we extracted the offset of the legacy-style HuC
binary located within the GSC-enabled blob, so now we can use that to
load the HuC via DMA if the fuse is set that way.
Note that we now need to differentiate between
On 5/31/2023 16:54, Daniele Ceraolo Spurio wrote:
The new binaries that support the 2-step authentication contain the
legacy-style binary, which we can use for loading the HuC via DMA. To
find out where this is located in the image, we need to parse the
manifest of the GSC-enabled HuC binary.
== Series Details ==
Series: drm/i915: No 10bit gamma on desktop gen3 parts (rev2)
URL : https://patchwork.freedesktop.org/series/118651/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118651v2
Summary
On 24.05.2023 21:19, Vinay Belgaumkar wrote:
Hang and heartbeat subtests are not supported with GuC submission
enabled.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/gem_ctx_persistence.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff
== Series Details ==
Series: drm/i915/gt: Add workaround 14016712196 (rev5)
URL : https://patchwork.freedesktop.org/series/117661/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_117661v5
Summary
---
== Series Details ==
Series: drm/i915/display: Print usefull information on error (rev2)
URL : https://patchwork.freedesktop.org/series/118685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118685v2
On Thu, Jun 01, 2023 at 11:22:18AM -0700, Dixit, Ashutosh wrote:
On Wed, 31 May 2023 14:35:47 -0700, Matt Atwood wrote:
Hi Matt,
Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
values to be different.
Cc: Tvrtko Ursulin
Cc: Umesh Nerlige Ramappa
Cc: Ashutosh
On Thu, 01 Jun 2023 11:22:18 -0700, Dixit, Ashutosh wrote:
>
> On Wed, 31 May 2023 14:35:47 -0700, Matt Atwood wrote:
> >
>
> Hi Matt,
>
> > Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
> > values to be different.
Also, we can't be so sure so as to be able to say
== Series Details ==
Series: drm/i915/mtl: Reset only one lane in case of MFD (rev2)
URL : https://patchwork.freedesktop.org/series/118308/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13217 -> Patchwork_118308v2
Summary
On 5/25/2023 11:25 AM, Kamil Konieczny wrote:
Hi Vinay,
On 2023-05-24 at 12:19:06 -0700, Vinay Belgaumkar wrote:
Hang and heartbeat subtests are not supported with GuC submission
enabled.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/gem_ctx_persistence.c | 32
On Wed, 31 May 2023 14:35:47 -0700, Matt Atwood wrote:
>
Hi Matt,
> Set I915_PMU_MAX_GTS to value in I915_MAX_GT, theres no reason for these
> values to be different.
>
> Cc: Tvrtko Ursulin
> Cc: Umesh Nerlige Ramappa
> Cc: Ashutosh Dixit
I don't believe the mailer actually Cc'd us. I just
On Wed, May 31, 2023 at 09:13:02PM -0700, Dixit, Ashutosh wrote:
On Wed, 31 May 2023 16:56:34 -0700, Umesh Nerlige Ramappa wrote:
Hi Umesh,
Instead of aged_tail use an iterator that starts from the hw_tail and
goes backward until the oa_buffer.tail looking for valid reports.
Hmm I don't
Quoting Matt Roper (2023-06-01 14:38:04-03:00)
>If i915_driver_create() fails to create a valid 'i915' object, we
>should just disable the PCI device and return immediately without trying
>to call i915_probe_error() that relies on a valid i915 pointer.
>
>Fixes: 12e6f6dc78e4 ("drm/i915/display:
After recent discussions with Mesa folks, it was requested
that we optimize i915's GET_PARAM for the PXP_STATUS without
changing the UAPI spec.
This patch adds this additional optimizations:
- If any PXP initializatoin flow failed, then ensure that
we catch it so that we can change the
Hi Matt,
> > > > --- a/drivers/gpu/drm/i915/i915_pmu.h
> > > > +++ b/drivers/gpu/drm/i915/i915_pmu.h
> > > > @@ -38,7 +38,7 @@ enum {
> > > > __I915_NUM_PMU_SAMPLERS
> > > > };
> > > >
> > > > -#define I915_PMU_MAX_GTS 2
> > > > +#define I915_PMU_MAX_GTS 4
> > >
> > > right! Why not
If i915_driver_create() fails to create a valid 'i915' object, we
should just disable the PCI device and return immediately without trying
to call i915_probe_error() that relies on a valid i915 pointer.
Fixes: 12e6f6dc78e4 ("drm/i915/display: Handle GMD_ID identification in display
code")
On Thu, 1 Jun 2023 19:14:50 +0200 Andrzej Hajda wrote:
> Ping on the series, everything reviewed.
> Eric, Dave, Jakub, could you take patches 1-4 via net tree?
Sure thing, would you mind reposting them separately?
Easier for us to apply and it's been over a month since posting,
a fresh run of
On 08.05.2023 19:16, Andrzej Hajda wrote:
On 05.05.2023 22:06, Rodrigo Vivi wrote:
On Thu, May 04, 2023 at 06:27:53PM +0200, Andrzej Hajda wrote:
Hi maintainers of net and i915,
On 25.04.2023 00:05, Andrzej Hajda wrote:
This is revived patchset improving ref_tracker library and converting
On 5/30/2023 8:02 AM, Thomas Zimmermann wrote:
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Msm does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can
== Series Details ==
Series: drm/fbdev: Remove DRM's helpers for fbdev I/O (rev5)
URL : https://patchwork.freedesktop.org/series/117671/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13204_full -> Patchwork_117671v5_full
SAGV configuration support for MTL
v2: added one missing patch in the previous version
v3: chekcpatch warning fixes
update index handling for the icl/tgl QGV point handling
program pmdemand code simplified
v4: update to debufs and pipe values pmdemand regiters
removed the macro
From: Mika Kahola
MTL introduces a new way to instruct the PUnit with
power and bandwidth requirements of DE. Add the functionality
to program the registers and handle waits using interrupts.
The current wait time for timeouts is programmed for 10 msecs to
factor in the worst case scenarios.
MTL uses the peak BW of a QGV point to lock the required QGV
point instead of the QGV index. Instead of passing the deratedbw
of the selected bw_info, return the index to the selected
bw_info so that either deratedbw or peakbw can be used based on
the platform.
v2: use idx to store index returned
>From MTL onwards, we need to find the best QGV point based on
the required data rate and pass the peak BW of that point to
the punit to lock the corresponding QGV point.
v1: Fix for warning from kernel test robot
Bspec: 64636
Reported-by: kernel test robot
Closes:
Extract intel_bw_check_qgv_points() from intel_bw_atomic_check
to facilitate future platform variations in handling SAGV
configurations.
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_bw.c | 235 +---
1 file
In MTL onwards, pcode locks the GV point based on the peak BW
of a QGV point. So store the peak BW of all the QGV points.
v2: use DIV_ROUND_CLOSEST() for the peakBW calculation
Bspec: 64636
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
>From MTL onwwards, pcode locks the QGV point based on peak BW of
the intended QGV point passed by the driver. So the peak BW
calculation must match the value expected by the pcode. Update
the calculations as per the Bspec.
v2: use DIV_ROUND_* macro for the calculations (Ville)
v3: Use only
Follow the values from bspec for the percentage overhead for
efficiency in MTL BW calculations.
Bspec: 64631
Signed-off-by: Vinod Govindapillai
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
== Series Details ==
Series: drm/i915/display: pre-initialize some values in probe_gmdid_display()
URL : https://patchwork.freedesktop.org/series/118690/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13215 -> Patchwork_118690v1
In the case of failed suspend flow or cases where the kernel does not go
into full suspend but goes from suspend_prepare back to resume_complete,
we get called for a pm_complete but without runtime_pm guaranteed.
Thus, ensure we take the runtime_pm when calling intel_pxp_init_hw
from within
On Thu, 2023-06-01 at 11:34 -0300, Gustavo Sousa wrote:
> Hi, Vinod.
>
> I have some comments for this version, please see them below. With those
> fixed,
>
> Acked-by: Gustavo Sousa
>
> Quoting Vinod Govindapillai (2023-06-01 09:19:23-03:00)
> > From: Mika Kahola
> >
> > MTL introduces a
On 01.06.2023 13:09, Tejas Upadhyay wrote:
For mtl, workaround suggests that, SW insert a
dummy PIPE_CONTROL prior to PIPE_CONTROL which
contains a post sync: Timestamp or Write Immediate.
Bspec: 72197
V5:
- Remove ret variable - Andi
V4:
- Update commit message, avoid returing cs -
In case system is short on mappable memory (256MB on SmallBar) allocation
of two 1GB buffers will fail.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8300
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +--
1 file changed, 9 insertions(+), 2
> -Original Message-
> From: Intel-gfx On Behalf Of
> Andrzej Hajda
> Sent: Thursday, June 1, 2023 6:14 PM
> To: Andi Shyti ; Intel GFX g...@lists.freedesktop.org>; DRI Devel
> Cc: Chris Wilson ; sta...@vger.kernel.org; Dan
> Carpenter ; Andi Shyti
> Subject: Re: [Intel-gfx] [PATCH]
Hi Tejas,
> > > @@ -1530,8 +1530,8 @@ static int live_busywait_preempt(void *arg)
> > > struct drm_i915_gem_object *obj;
> > > struct i915_vma *vma;
> > > enum intel_engine_id id;
> > > - int err = -ENOMEM;
> > > u32 *map;
> > > + int err;
>
> We could
Hi, Vinod.
I have some comments for this version, please see them below. With those
fixed,
Acked-by: Gustavo Sousa
Quoting Vinod Govindapillai (2023-06-01 09:19:23-03:00)
>From: Mika Kahola
>
>MTL introduces a new way to instruct the PUnit with
>power and bandwidth requirements of DE. Add the
On Thu, 1 Jun 2023 06:06:17 +
"Liu, Yi L" wrote:
> > From: Jason Gunthorpe
> > Sent: Thursday, June 1, 2023 3:00 AM
> >
> > On Fri, May 26, 2023 at 10:04:27AM +0800, Baolu Lu wrote:
> > > On 5/25/23 9:02 PM, Liu, Yi L wrote:
> > > > > It's possible that requirement
> > > > > might be
On Thu, 01 Jun 2023, Arun R Murthy wrote:
> For modifier not supporting async flip, print the modifier and display
> version. Helps in reading the error message.
>
> v2: Reframe the error message (Jani)
>
> Signed-off-by: Arun R Murthy
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 10
Hi Dave & Daniel,
One fix appeared this morning, related to OA API for
non-power-of-two reports.
Full CI results not in yet, BAT is looking good so please check
before pulling the trigger.
Regards, Joonas
***
drm-intel-fixes-2023-06-01:
- Fix for OA reporting to allow detecting
== Series Details ==
Series: series starting with [v5,01/13] fbdev: Add Kconfig options to select
different fb_ops helpers
URL : https://patchwork.freedesktop.org/series/118574/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13204_full -> Patchwork_118574v1_full
Regression found:
#1
Test case: igt@runner@aborted
boards impacted: multiple
Logs:
https://intel-gfx-ci.01.org/tree/linux-next/next-20230601/bat-mtlp-6/boot0.txt
Already existing issue: -NA-
Next Steps: Bisecting in progress
Linux-kernel tag:
https://git.kernel.org/pub/scm/linux/kernel/git
On 26.05.2023 14:41, Andi Shyti wrote:
kernel_context() returns an error pointer. Use pointer-error
conversion functions to evaluate its return value, rather than
checking for a '0' return.
Fixes: eb5c10cbbc2f ("drm/i915: Remove I915_USER_PRIORITY_SHIFT")
Reported-by: Dan Carpenter
On Thu, 2023-06-01 at 13:13 +0300, Mika Kahola wrote:
> In case when only two or less transmit lanes are owned such as MFD
> (DP-alt with x2 lanes) we need to reset only one data lane (lane0).
> With only x2 lanes we don't need to poll for the phy current
> status on both data lanes since only the
From: Mika Kahola
MTL introduces a new way to instruct the PUnit with
power and bandwidth requirements of DE. Add the functionality
to program the registers and handle waits using interrupts.
The current wait time for timeouts is programmed for 10 msecs to
factor in the worst case scenarios.
>From MTL onwards, we need to find the best QGV point based on
the required data rate and pass the peak BW of that point to
the punit to lock the corresponding QGV point.
v1: Fix for warning from kernel test robot
Bspec: 64636
Reported-by: kernel test robot
Closes:
MTL uses the peak BW of a QGV point to lock the required QGV
point instead of the QGV index. Instead of passing the deratedbw
of the selected bw_info, return the index to the selected
bw_info so that either deratedbw or peakbw can be used based on
the platform.
v2: use idx to store index returned
In MTL onwards, pcode locks the GV point based on the peak BW
of a QGV point. So store the peak BW of all the QGV points.
v2: use DIV_ROUND_CLOSEST() for the peakBW calculation
Bspec: 64636
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
Extract intel_bw_check_qgv_points() from intel_bw_atomic_check
to facilitate future platform variations in handling SAGV
configurations.
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_bw.c | 235 +---
1 file
>From MTL onwwards, pcode locks the QGV point based on peak BW of
the intended QGV point passed by the driver. So the peak BW
calculation must match the value expected by the pcode. Update
the calculations as per the Bspec.
v2: use DIV_ROUND_* macro for the calculations (Ville)
v3: Use only
Follow the values from bspec for the percentage overhead for
efficiency in MTL BW calculations.
Bspec: 64631
Signed-off-by: Vinod Govindapillai
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
SAGV configuration support for MTL
v2: added one missing patch in the previous version
v3: chekcpatch warning fixes
update index handling for the icl/tgl QGV point handling
program pmdemand code simplified
v4: update to debufs and pipe values pmdemand regiters
removed the macro
Hi Dave and Daniel,
here's the weekly PR for drm-misc-next. There's support for some new
panels; some improvements to bridge drivers. The code around show_fdinfo
can now be shared among DRM drivers. Fbdev emulation got improved file
I/O code. Plus the usual fixes.
Best regards
Thomas
For mtl, workaround suggests that, SW insert a
dummy PIPE_CONTROL prior to PIPE_CONTROL which
contains a post sync: Timestamp or Write Immediate.
Bspec: 72197
V5:
- Remove ret variable - Andi
V4:
- Update commit message, avoid returing cs - Andi/Matt
V3:
- Wrap dummy pipe control stuff in
== Series Details ==
Series: drm/i915: Use 18 fast wake AUX sync len (rev2)
URL : https://patchwork.freedesktop.org/series/118517/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13203_full -> Patchwork_118517v2_full
Summary
For modifier not supporting async flip, print the modifier and display
version. Helps in reading the error message.
v2: Reframe the error message (Jani)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++
1 file changed, 6 insertions(+), 4
In case when only two or less transmit lanes are owned such as MFD
(DP-alt with x2 lanes) we need to reset only one data lane (lane0).
With only x2 lanes we don't need to poll for the phy current
status on both data lanes since only the owned data lane will respond.
v2: Find better naming for
On Thu, Jun 01, 2023 at 02:45:18PM +0530, Tejas Upadhyay wrote:
> For mtl, workaround suggests that, SW insert a
> dummy PIPE_CONTROL prior to PIPE_CONTROL which
> contains a post sync: Timestamp or Write Immediate.
>
> Bspec: 72197
>
> V4:
> - Update commit message, avoid returing cs -
== Series Details ==
Series: drm/display & drm/i915: more struct drm_edid conversions (rev2)
URL : https://patchwork.freedesktop.org/series/116813/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13203_full -> Patchwork_116813v2_full
On Tue, May 30, 2023 at 05:12:24PM +0200, Thomas Zimmermann wrote:
> Use the regular fbdev helpers for framebuffer I/O instead of DRM's
> helpers. Tegra does not use damage handling, so DRM's fbdev helpers
> are mere wrappers around the fbdev code.
>
> By using fbdev helpers directly within each
On Thu, 01 Jun 2023, Arun R Murthy wrote:
> For modifier not supporting async flip, print the modifier and display
> version. Helps in reading the error message.
>
> Signed-off-by: Arun R Murthy
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 10 ++
> 1 file changed, 6
For mtl, workaround suggests that, SW insert a
dummy PIPE_CONTROL prior to PIPE_CONTROL which
contains a post sync: Timestamp or Write Immediate.
Bspec: 72197
V4:
- Update commit message, avoid returing cs - Andi/Matt
V3:
- Wrap dummy pipe control stuff in API - Andi
V2:
- Fix kernel test
When intel_display_device_probe() (and, subsequently,
probe_gmdid_display()) returns, the caller expects ver, rel and step
to be initialized. Since there's no way to check that there was a
failure and no_display was returned without some further refactoring,
pre-initiliaze all these values to
== Series Details ==
Series: Do not access i915_gem_object members from frontbuffer tracking (rev2)
URL : https://patchwork.freedesktop.org/series/118475/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13202_full -> Patchwork_118475v2_full
== Series Details ==
Series: drm/i915: Use 18 fast wake fast wake AUX sync len
URL : https://patchwork.freedesktop.org/series/118504/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13202_full -> Patchwork_118504v1_full
== Series Details ==
Series: drm/i915/display: Print usefull information on error
URL : https://patchwork.freedesktop.org/series/118685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13210 -> Patchwork_118685v1
Summary
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