From: Chris Wilson
Enforce that an mmap of a dmabuf is always using MAP_SHARED so that all
access (both read and writes) using the device memory and not a local
copy-on-write page in system memory.
Signed-off-by: Chris Wilson
Signed-off-by: Andi Shyti
---
drivers/dma-buf/dma-buf.c | 15
Hi John,
> > > > - mmio_invalidate_full(gt);
> > > > + if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc)) {
> > > > + if (intel_guc_is_ready(guc))
> > > > + intel_guc_invalidate_tlb_full(guc);
> > > > + }
tem.
>
> Fixes: d6c531ab4820 ("drm/i915: Invalidate the TLBs on each GT")
> Signed-off-by: Chris Wilson
> Signed-off-by: Jonathan Cavitt
> CC: Matt Roper
> CC: Andi Shyti
> Reviewed-by: Andi Shyti
pushed to drm-intel-gt-next.
Thank you,
Andi
Hi,
[...]
> > +static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
> > +{
> > + struct drm_i915_private *i915 = ggtt->vm.i915;
> > + struct intel_gt *gt;
> > +
> > + if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
> > + gen8_ggtt_invalidate(ggtt);
> > +
> > +
Hi Jani,
> > Consider multi-gt support when cancelling all tlb invalidations on
> > suspend, and when submitting tlb invalidations on resume.
> >
> > Suggested-by: Tvrtko Ursulin
> > Signed-off-by: Fei Yang
> > Signed-off-by: Jonathan Cavitt
> > CC: John Harrison
>
> I guess I'm wondering
Hi,
> Possible regressions
>
> • igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a3:
> □ shard-dg2: PASS -> INCOMPLETE
I believe this is not caused by this patch. I'm going to push it.
Andi
Hi Jani,
On Mon, Oct 02, 2023 at 11:47:04AM +0300, Jani Nikula wrote:
> Since gt0 == i915->gt[0], just drop the former.
>
> Signed-off-by: Jani Nikula
Looks correct!
Reviewed-by: Andi Shyti
Thanks,
Andi
Hi Jani,
On Mon, Oct 02, 2023 at 11:47:03AM +0300, Jani Nikula wrote:
> Convert i915->gt0 to a pointer, and allocate it dynamically.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Andi Shyti
Thanks,
Andi
Hi Jani,
On Mon, Oct 02, 2023 at 11:47:02AM +0300, Jani Nikula wrote:
> Have to give up the const on i915 pointer, but it's not big of a deal
> considering non-const i915 gets passed all over the place.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Andi Shyti
Thanks,
Andi
Hi Jani,
> adding a few folks in Cc for some extra eyes on this series.
>
> On Mon, Oct 02, 2023 at 11:47:01AM +0300, Jani Nikula wrote:
> > Chopping up [1] to more digestable pieces. Start off with nuking
> > i915->gt0.
> >
> > [1] https://patchwork.freedesktop.org/series/124418/
> >
> > Jani
>
> Signed-off-by: Chris Wilson
> Signed-off-by: Jonathan Cavitt
> CC: Matt Roper
> CC: Andi Shyti
Reviewed-by: Andi Shyti
As Nirmoy has been needing this on a different context, could you
please send just this one as a separate e-mail?
This should also fix d6c531ab4820 ("drm/i
Hi Jani,
adding a few folks in Cc for some extra eyes on this series.
On Mon, Oct 02, 2023 at 11:47:01AM +0300, Jani Nikula wrote:
> Chopping up [1] to more digestable pieces. Start off with nuking
> i915->gt0.
>
> [1] https://patchwork.freedesktop.org/series/124418/
>
> Jani Nikula (3):
>
Hi Nirmoy,
On Mon, Oct 02, 2023 at 02:20:32PM +0200, Nirmoy Das wrote:
> Don't return early if one of the GT doesn't require
> any flushing.
>
> Fixes: d6c531ab4820 ("drm/i915: Invalidate the TLBs on each GT")
> Cc: Chris Wilson
> Cc: Fei Yang
> Cc: Mauro Ca
Hi Matt,
> > While discussing with Nirmoy offline about this other way for
> > fixing lock contention, he was a bit sceptical about it.
> >
> > But why not? We know that if we fall into this case it's because
> > some hardware component has forgotten to release the lock within
> > 100ms. So that
Hi Nirmoy,
On Thu, Sep 28, 2023 at 03:00:13PM +0200, Nirmoy Das wrote:
> Move early resume functions of gt to a proper file.
>
> Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
Andi
it?
Open for opinions or profligate rejections :-)
I'm also curious to see what CI has to say about.
[*] https://patchwork.freedesktop.org/series/124397/
Signed-off-by: Andi Shyti
Cc: Nirmoy Das
Cc: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 46 --
1 file
Hi,
> + do {
> + /*
> + * Starting with MTL, we need to coordinate not only with other
> + * driver threads, but also with hardware/firmware agents. A
> + * dedicated locking register is used.
> + */
> + if
c(Matt)
> s/intel_gt_mcr_lock_clear/intel_gt_mcr_lock_sanitize
>
> Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
Andi
ts.
> > >
> > > v2: reset on resume not in intel_gt_init().
> > > v3: do the reset on intel_gt_resume_early()
> > >
> > > Signed-off-by: Nirmoy Das
> > In the previous version I added my r-b here.
> I moved code to different function so wanted t
Hi Nirmoy,
On Wed, Sep 27, 2023 at 11:03:55PM +0200, Nirmoy Das wrote:
> Move early resume functions of gt to a proper file.
>
> Signed-off-by: Nirmoy Das
> ---
> drivers/gpu/drm/i915/gt/intel_gt_pm.c | 6 ++
> drivers/gpu/drm/i915/gt/intel_gt_pm.h | 1 +
>
> process by other agents.
>
> v2: reset on resume not in intel_gt_init().
> v3: do the reset on intel_gt_resume_early()
>
> Signed-off-by: Nirmoy Das
In the previous version I added my r-b here. Please consider it
for the next version:
Reviewed-by: Andi Shyti
Even
Hi Nirmoy,
your client is still missing my e-mails? :)
> +void intel_gt_mcr_lock_reset(struct intel_gt *gt)
> +{
> + unsigned long __flags;
> +
> + lockdep_assert_not_held(>uncore->lock);
> +
> + spin_lock_irqsave(>mcr_lock, __flags);
> +
> + if (GRAPHICS_VER_FULL(gt->i915) >=
From: Nirmoy Das
Commit f1530f912ed8 ("drm/i915/gt: Apply workaround 22016122933
correctly") adds the workaround only in non media GT's, which is
GT-0 in case of MTL. It turns out that we need to apply it in
both the GT's.
Signed-off-by: Nirmoy Das
Signed-off-by: Andi Shyti
Cc
Hi Nirmoy,
> + /*
> + * For the media GT, this ring fault register is not replicated,
> + * so don't do multicast/replicated register read/write operation on it.
> + */
thanks!
Andi
Hi Nirmoy,
[...]
> +void intel_gt_mcr_lock_reset(struct intel_gt *gt)
> +{
> + unsigned long __flags;
> +
> + lockdep_assert_not_held(>uncore->lock);
> +
> + spin_lock_irqsave(>mcr_lock, __flags);
> +
> + if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
> +
can occur in this
> process by other agents.
>
> Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
Andi
ot;MEDIA_VER(i915) >= 13"(Matt)
> improve comment.
>
> Signed-off-by: Nirmoy Das
> Reviewed-by: Matt Roper
Reviewed-by: Andi Shyti
Andi
Hi Nirmoy,
On Tue, Sep 26, 2023 at 11:58:02PM +0200, Nirmoy Das wrote:
> On MTL GEN12_RING_FAULT_REG is not replicated so don't
> do mcr based operation for this register.
>
> v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
>
> Signed-off-by: Nirmoy Das
This looks very good!
> - if
Cc: Aravind Iddamsetty
> Cc: Rob Clark
> Cc: Andi Shyti
> Cc: Tejas Upadhyay
> Reviewed-by: Andi Shyti # v1
> Reviewed-by: Aravind Iddamsetty # v2
Reviewed-by: Andi Shyti
Andi
Hi Nirmoy,
On Tue, Sep 26, 2023 at 10:37:35AM +0200, Nirmoy Das wrote:
> Implement a way to update GGTT using MI_UPDATE_GTT command
> when possible for MTL as a suggested work around for HW bugs,
> Wa_13010847436 and Wa_14019519902.
>
> 1st patch improve pm wakeref handeling which needed as we
>
Hi Nirmoy,
...
> > PIPE_CONTROL_FLUSH_L3 is not needed for aux invalidation
> > so don't set that.
> >
> > Fixes: 78a6ccd65fa3 ("drm/i915/gt: Ensure memory quiesced before
> > invalidation")
> > Cc: Jonathan Cavitt
> > Cc: Andi Shyti
&g
Hi Nirmoy,
On Tue, Sep 26, 2023 at 04:24:01PM +0200, Nirmoy Das wrote:
> PIPE_CONTROL_FLUSH_L3 is not needed for aux invalidation
> so don't set that.
>
> Fixes: 78a6ccd65fa3 ("drm/i915/gt: Ensure memory quiesced before
> invalidation")
> Cc: Jonathan Cavitt
>
; * Fix timeouts which are now in us. (Andi)
> * Update one comment as a drive by. (Andi)
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Chris Wilson
> Cc: Paul Gortmaker
> Cc: Sebastian Andrzej Siewior
> Cc: Andi Shyti
Reviewed-by: Andi Shyti
Thanks,
Andi
Hi Tvrtko,
> Commit ade8a0f59844 ("drm/i915: Make all GPU resets atomic") added a
> preempt disable section over the hardware reset callback to prepare the
> driver for being able to reset from atomic contexts.
>
> In retrospect I can see that the work item at a time was about removing
> the
Hi Jani,
> >>struct i915_vma *vma, *next;
> >>unsigned long freed_pages = 0;
> >>intel_wakeref_t wakeref;
> >> + struct intel_gt *gt;
> >> + int i;
> >
> > the trend is to use 'unsigned int' here and I've seen it
> > reviewed. Personally, if I really have to express a preference, I
Hi Tvrtko,
On Mon, Sep 25, 2023 at 03:28:27PM +0100, Tvrtko Ursulin wrote:
>
> On 25/09/2023 15:14, Andi Shyti wrote:
> > Hi Tvrtko,
> >
> > On Wed, Sep 20, 2023 at 09:57:15AM +0100, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin
> > >
> &
' here and I've seen it
reviewed. Personally, if I really have to express a preference, I
prefer 'int' because it's a bit safer, generally I don't really
mind :)
The rest looks good.
Reviewed-by: Andi Shyti
Andi
and just add the
> 'ignore' flag to the debug level one instead (which will therefore not
> appear by default but will still show up in CI runs).
>
> Signed-off-by: John Harrison
Reviewed-by: Andi Shyti
Andi
Hi Jani,
On Thu, Sep 21, 2023 at 07:06:37PM +0300, Jani Nikula wrote:
> Just let the compiler decide what's best. Turns out absolutely nothing
> changes in the output with the inlines removed.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Andi Shyti
Andi
Cc: Radhakrishna Sripada
as this isn't merged yet:
Reviewed-by: Andi Shyti
Andi
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Cc: Rodrigo Vivi
> Cc: Tvrtko Ursulin
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: Chris Wilson
> Cc: John Harrison
> Cc: Andi Shyti
> Cc: Matthew Brost
> Cc: intel-gfx@lists.freedesktop.org
> Cc: dri-de...@lists
e region.
>
> v2:
> * Only account against the active region.
> * Use DMA_RESV_USAGE_BOOKKEEP when testing for active. (Tejas)
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Aravind Iddamsetty
> Cc: Rob Clark
> Cc: Andi Shyti
> Cc: Tejas Upadhyay
> Revi
Hi Jani,
[...]
> > * upon acquiring the wakeref.
> > */
> > mutex_lock_nested(>mutex, SINGLE_DEPTH_NESTING);
> > - if (!atomic_read(>count)) {
> > - int err;
> >
> > - rpm_get(wf);
> > + if (likely(!atomic_read(>count))) {
>
> Adding the likely should be
ctly"). We see that
> there's already an implicit dependency on the i915_drv.h that we need to
> address too.
>
> Cc: Andi Shyti
> Cc: Fei Yang
> Cc: Jonathan Cavitt
> Cc: Matt Roper
> Signed-off-by: Jani Nikula
Reviewed-by: Andi Shyti
Andi
tel_gt_bind_context_set_ready(gt, gt);
}
I always had a personal dislike of booleans in arguments as they
mean very little to whoever reads them. On the other hand, set
ready to "false" is more meaningful than set unready. Your
choice.
Reviewed-by: Andi Shyti
Andi
Hi Nirmoy,
[...]
> > GEM_BUG_ON(!llist_empty(>barrier_tasks));
> > cleanup_status_page(engine);
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> > b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> > index a7e677598004..a8f527fab0f0 100644
> > ---
_14019519902.
>
> Signed-off-by: Nirmoy Das
> Reviewed-by: Oak Zeng
Reviewed-by: Andi Shyti
Andi
utex lock. It is a circular lock. So hold the GT/blitter engine wakeref
> before calling mutex_lock, to fix the circular lock.
>
> Signed-off-by: Nirmoy Das
> Signed-off-by: Oak Zeng
> Acked-by: Oak Zeng
Reviewed-by: Andi Shyti
Andi
Hi Nirmoy,
On Mon, Sep 18, 2023 at 07:02:53PM +0200, Nirmoy Das wrote:
> Implement a way to iterate over sgt with pre-initialized
> sgt_iter state.
>
> Signed-off-by: Nirmoy Das
> Reviewed-by: Oak Zeng
Reviewed-by: Andi Shyti
Andi
;
> Signed-off-by: Nirmoy Das
> Reviewed-by: Oak Zeng
Reviewed-by: Andi Shyti
Thanks,
Andi
Hi Nirmoy,
[...]
> ce = create_kernel_context(engine);
> if (IS_ERR(ce))
> return PTR_ERR(ce);
> + /*
> + * Create a separate pinned context for GGTT update with blitter engine
> + * if a platform require such service. MI_UPDATE_GTT works on other
> +
nathan Cavitt
> Cc: Andi Shyti
> Cc: # v5.8+
> Cc: Nirmoy Das
> Cc: Andrzej Hajda
> Cc: Tvrtko Ursulin
> Cc: Matt Roper
> Cc: Lucas De Marchi
> Cc: Tejas Upadhyay
> Cc: Prathap Kumar Valsan
> Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
and I believe
Tested-by: Tapani Pälli
Thanks,
Andi
Hi Andrzej,
On Tue, Sep 12, 2023 at 09:35:21AM +0200, Andrzej Hajda wrote:
> Some DG2 firmware locks this register for modification. Using wa_add
> with read_mask 0 allows to skip checks of such registers.
>
> Signed-off-by: Andrzej Hajda
Reviewed-by: Andi Shyti
Andi
> ---
Hi Dan,
> Possible regressions
>
> • igt@gem_ccs@ctrl-surf-copy-new-ctx:
>
> □ shard-mtlp: NOTRUN -> SKIP
> • igt@gen9_exec_parse@allowed-all:
>
> □ shard-apl: PASS -> INCOMPLETE
I believe these failures are not caused by this patch. I had to
retrigger the tests because the
orkaround was added later it wasn't
checking whether obj had a valid value or not, leading to a
potential segfault.
Thanks for fixing it!
Reviewed-by: Andi Shyti
Andi
> /*
>* Wa_22016122933: For Media version 13.0, all Media GT shared
>
Hi Rodrigo and Nirmoy,
On Thu, Sep 07, 2023 at 09:47:19AM -0400, Rodrigo Vivi wrote:
> On Thu, Sep 07, 2023 at 02:58:08PM +0200, Andi Shyti wrote:
> > From: Tvrtko Ursulin
> >
> > Walk all GTs when doing the respective bits of drop_caches work.
> >
> > Signed-o
[...]
> +/**
> + * __for_each_daddr_next - iterates over the device addresses with
> pre-initialized iterator.
> + * @__dp:Device address (output)
> + * @__iter: 'struct sgt_iter' (iterator state, external)
> + * @__step: step size
> + */
> +#define __for_each_daddr_next(__dp, __iter,
Hi Nirmoy,
On Wed, Sep 06, 2023 at 01:31:20PM +0200, Nirmoy Das wrote:
> Implement GGTT update method with blitter command, MI_UPDATE_GTT
> and install those handlers if a platform requires that.
>
> v2: Make sure we hold the GT wakeref and Blitter engine wakeref before
> we call
Hi Nirmoy,
[...]
> + /* mark the bind context's availability status */
> + bool bind_context_ready;
Do we need some locking here?
> /**
>* pinned_contexts_list: List of pinned contexts. This list is only
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
>
From: Tvrtko Ursulin
Walk all GTs when doing the respective bits of drop_caches work.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Andi Shyti
---
Hi,
I'm proposing this new version of the series I sent here[*].
Patch 1 from that series is not necessary so taht I'm going to
propose
> - ret = gt_drop_caches(to_gt(i915), val);
> - if (ret)
> - return ret;
> + for_each_gt(i915, i, gt) {
argh... I forgot to add this change before formatting the patch
- for_each_gt(i915, i, gt) {
+ for_each_gt(gt, i915, i) {
Will resend.
Andi
being used
> for soft-rc6).
>
> Signed-off-by: Chris Wilson
> Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
Andi
From: Tvrtko Ursulin
Walk all GTs when doing the respective bits of drop_caches work.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Andi Shyti
---
Hi,
I'm proposing this new version of the series I sent here[*].
Patch 1 from that series is not necessary so taht I'm going to
propose
Hi Nirmoy,
please ignore this series... I'm going to send Tvrtko's original
work. The changes in patch 1 are not required.
Thank you!
Andi
On Thu, Sep 07, 2023 at 11:04:33AM +0200, Nirmoy Das wrote:
>
> On 9/5/2023 9:36 PM, Andi Shyti wrote:
> > In preparation for multi-gt ca
> > Meteorlake has been very usable for a while now, all of uapi changes
> > related to fundamental platform usage have been finalized and all
> > required firmware blobs are available. Recent CI results have also
> > been healthy, so we're ready to drop the force_probe requirement and
> > enable
Hi Radhakrishna,
On Tue, Sep 05, 2023 at 12:36:24PM -0700, Radhakrishna Sripada wrote:
> Meteorlake has been very usable for a while now, all of uapi changes
> related to fundamental platform usage have been finalized and all
> required firmware blobs are available. Recent CI results have also
>
Hi John,
> > > > > > static void guc_cancel_busyness_worker(struct intel_guc *guc)
> > > > > > {
> > > > > > - cancel_delayed_work_sync(>timestamp.work);
> > > > > > + /*
> > > > > > +* When intel_gt_reset was called, task will hold a lock.
> > > > > > +* To cacel delayed work
When the user sends the drop caches command through the debugfs
interface, do it on all the GT's, rather than just the root GT.
Based on a patch by Tvrtko.
Signed-off-by: Andi Shyti
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 18 --
1 file changed, 12
In preparation for multi-gt cache flushing debugfs interface,
split the cache dropping function and gt idling.
Based on a patch by Tvrtko.
Signed-off-by: Andi Shyti
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 32 +
1 file changed, 24 insertions
Hi,
this bit of code escaped the multi-gt wave from a couple of years
ago.
Andi
Andi Shyti (2):
drm/i915: Split gt cache flushing and gt idling functions
drm/i915: When asked to drop the cache, do it per GT
drivers/gpu/drm/i915/i915_debugfs.c | 44 +
1 file
bug calls already comport with this: 207 DRM_DEV_DEBUG,
> 1288 drm_dbg. Clean up the remainders, in maintainer sized chunks.
>
> No functional changes.
>
> Signed-off-by: Jim Cromie
Reviewed-by: Andi Shyti
Andi
Hi Jonathan,
> Possible regressions
>
> • igt@i915_selftest@live@gt_lrc:
>
> □ bat-dg1-5: PASS -> ABORT
>
> □ fi-rkl-11600: PASS -> INCOMPLETE
>
> □ bat-adlm-1: PASS -> ABORT
>
> □ fi-tgl-1115g4: PASS -> INCOMPLETE
>
> □ bat-rpls-1: PASS -> ABORT
looks
Hi Jonathan,
On Mon, Aug 28, 2023 at 12:28:52PM -0700, Jonathan Cavitt wrote:
> The thread_global_copy subtest of the live migrate selftest creates a
> large number of threads and waits 10ms for them all to start. This is
> not enough time to wait for the threaded tasks to start, as some may
>
tead of waiting a flat 10ms for the threads to start, wait 10ms per
> thread. This grants enough of a buffer for each thread to wait for
> additional ring space when needed.
>
> Signed-off-by: Jonathan Cavitt
Reviewed-by: Andi Shyti
Andi
> ---
> drivers/gpu/drm/i915/gt/selftest_migrate.
Hi,
> > > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > > b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > > index a0e3ef1c65d2..600388c849f7 100644
> > > > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > > +++
ines.
>
> Fixes: bcb9aa45d5a0 ("Revert "drm/i915: Hold reference to intel_context over
> life of i915_request"")
> Signed-off-by: Chris Wilson
> Signed-off-by: Andrzej Hajda
> Reviewed-by: Andi Shyti
applied to drm-intel-gt-next.
Thanks,
Andi
On Mon, Aug 28, 2023 at 08:16:35PM +0200, Nirmoy Das wrote:
>
> On 8/28/2023 8:34 AM, Tejas Upadhyay wrote:
> > Now this workaround is permanent workaround on MTL and DG2,
> > earlier we used to apply on MTL A0 step only.
> > VLK-45480
>
> Please remove the internal VLK reference. Otherwise this
igned-off-by: Tejas Upadhyay
I read your patch yesterday, but forgot to tag it...
Reviewed-by: Andi Shyti
Thank you,
Andi
> Possible regressions
>
> • igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-6:
> □ bat-adlp-11: NOTRUN -> FAIL
mmmhhh... this failure doesn't look related. Would you mind
restarting the tests?
Andi
if reset is in progress.
I liked the previous commit, it just needed to be wrapped (not in
the dmesg copy-paste part).
> Signed-off-by: Zhanjun Dong
> Cc: John Harrison
> Cc: Andi Shyti
> Cc: Daniel Vetter
> ---
> drivers/gpu/drm/i915/gt/uc/intel_gu
Hi Jonathan,
> + /* Wa_16018031267, Wa_16018063123 */
> + if (engine->class == COPY_ENGINE_CLASS &&
> + NEEDS_FASTCOLOR_BLT_WABB(i915))
maybe we should have something like
gt_needs_wa_XXX(struct intel_gt *gt)
engine_needs_wa_XXX(struct intel_engine_ce *engine)
Hi Jonathan,
few little things...
On Wed, Aug 23, 2023 at 11:51:03AM -0700, Jonathan Cavitt wrote:
> From: Nirmoy Das
>
> Apply WABB blit for Wa_16018031267 / Wa_16018063123.
> Additionally, update the lrc selftest to exercise the new
> WABB changes.
>
> Signed-off-by: Jonathan Cavitt
>
Hi Jonathan,
> > The hangcheck live selftest contains duplicate declarations of some
> > functions that already exist in igt_spinner.c, such as the creation and
> > deconstruction of a spinning batch buffer (spinner) that hangs an engine.
> > It's undesireable to have such code duplicated, as the
building blocks and name the parameters from/until
>rather than begin/fixed. (Jani)
> - Fix usage examples in comment.
>
> Cc: Gustavo Sousa
> Cc: Tvrtko Ursulin
> Cc: Andi Shyti
> Cc: Jani Nikula
> Signed-off-by: Matt Roper
Reviewed-by: Andi Shyti
Andi
IS_GT_IP_RANGE() that can
>be used for either GFX or MEDIA checks.
>
> v3:
> - Switch back to separate macros for gfx and media. (Jani)
> - Move macro to intel_gt.h. (Andi)
>
> Cc: Gustavo Sousa
> Cc: Tvrtko Ursulin
> Cc: Jani Nikula
> Cc: Andi Shyti
> Signed-off-by: Matt Roper
Reviewed-by: Andi Shyti
Andi
Zhanjun Dong
> Cc: John Harrison
> Cc: Andi Shyti
> Cc: Daniel Vetter
> ---
There is no changelog here :/
Can you please add the changelog after the '---' section?
The commit log has changed and...
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 11 ++-
> 1
From: Jonathan Cavitt
The hangcheck live selftest contains duplicate declarations of some
functions that already exist in igt_spinner.c, such as the creation and
deconstruction of a spinning batch buffer (spinner) that hangs an engine.
It's undesireable to have such code duplicated, as the
ops... sorry... too many patches sent... please, ignore!
Andi
On Fri, Aug 18, 2023 at 09:42:48PM +0200, Andi Shyti wrote:
> From: Nirmoy Das
>
> Implement GGTT update method with blitter command, MI_UPDATE_GTT
> and install those handlers if a platform requires that.
>
> Sig
From: Nirmoy Das
MTL can hang because of a HW bug while parallel reading/writing
from/to LMEM/GTTMMADR BAR so try to reduce GGTT update
related pci transactions with blitter command as recommended
for Wa_22018444074.
To issue blitter commands, the driver must be primed to receive
requests.
From: Nirmoy Das
Implement GGTT update method with blitter command, MI_UPDATE_GTT
and install those handlers if a platform requires that.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 189 +++
1 file changed, 189 insertions(+)
diff --git
From: Jonathan Cavitt
The hangcheck live selftest contains duplicate declarations of some
functions that already exist in igt_spinner.c, such as the creation and
deconstruction of a spinning batch buffer (spinner) that hangs an engine.
It's undesireable to have such code duplicated, as the
From: Nirmoy Das
Create a separate blitter context if a platform requires
GGTT updates using MI_UPDATE_GTT blitter command.
Subsequent patch will introduce methods to update
GGTT using this blitter context and MI_UPDATE_GTT blitter
command.
Signed-off-by: Nirmoy Das
---
Hi Jonathan,
On Tue, Aug 15, 2023 at 09:53:44AM -0700, Jonathan Cavitt wrote:
> Align igt_spinner_create_request with the hang_create_request
> implementation in selftest_hangcheck.c.
>
> Signed-off-by: Jonathan Cavitt
Acked-by: Andi Shyti
Andi
> ---
> drivers/gpu/
],
> -intel_gt_next_invalidate_tlb_full(vm->gt));
> + intel_gt_next_invalidate_tlb_full(gt));
ops!
Reviewed-by: Andi Shyti
Thank you!
Andi
Hi Jonathan,
pushed in drm-intel-gt-next.
I added two links to the commit logs: the first one refers to
this series, while the second refers to the series sent to CI
which includes the rebase conflict fix.
Hope this is fine.
Thanks,
Andi
On Tue, Aug 01, 2023 at 08:32:39AM -0700, Jonathan
On Mon, Aug 07, 2023 at 12:46:46PM -0700, John Harrison wrote:
> On 8/3/2023 06:28, Andi Shyti wrote:
> > Hi John,
> >
> > On Wed, Aug 02, 2023 at 11:49:40AM -0700, john.c.harri...@intel.com wrote:
> > > From: John Harrison
> > >
> > > It was n
Shyti
Signed-off-by: Andi Shyti
Link:
https://patchwork.freedesktop.org/patch/msgid/20230801153242.2445478-4-jonathan.cav...@intel.com
---
drivers/gpu/drm/i915/gt/intel_gt.c| 5 +++--
drivers/gpu/drm/i915/gt/intel_gt.h| 6 ++
drivers/gpu/drm/i915/gt/intel_lrc.c | 7
-by: Matt Roper
Signed-off-by: Jonathan Cavitt
Acked-by: Fei Yang
Reviewed-by: Andi Shyti
Acked-by: Tvrtko Ursulin
Signed-off-by: Andi Shyti
Link:
https://patchwork.freedesktop.org/patch/msgid/20230801153242.2445478-3-jonathan.cav...@intel.com
---
drivers/gpu/drm/i915/display
Hi Jonathan,
I'm just sending to CI this series because I had to fix a rebase
conflict.
Andi
Jonathan Cavitt (3):
drm/i915/gt: Simplify shmem_create_from_object map_type selection
drm/i915: Make i915_coherent_map_type GT-centric
drm/i915/gt: Apply workaround 22016122933 correctly
can be safely dropped and simplified.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Jonathan Cavitt
Reviewed-by: Tvrtko Ursulin
Reviewed-by: Andi Shyti
Signed-off-by: Andi Shyti
Link:
https://patchwork.freedesktop.org/patch/msgid/20230801153242.2445478-2-jonathan.cav...@intel.com
---
drivers
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