Ensure that the new dbuf state is not null. If so, throw
an error, discontinue to allocate ddb and return.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/skl_watermark.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
b/drivers
From: Radhakrishna Sripada
C10 phys uses direct mapping internally for voltage and pre-emphasis levels.
Program the levels directly to the fields in the VDR Registers.
Bspec: 65449
Cc: Imre Deak
Cc: Mika Kahola
Cc: Uma Shankar
Signed-off-by: Clint Taylor
Signed-off-by: Radhakrishna Sripada
From: Radhakrishna Sripada
XELPDP has C10 and C20 phys from Synopsys to drive displays. Each phy
has a dedicated PIPE 5.2 Message bus for configuration. This message
bus is used to configure the phy internal registers.
Bspec: 64599, 65100, 65101, 67610, 67636
Cc: Mika Kahola
Cc: Imre Deak
Cc
with something more general purpose.
Bspec: 64568
Cc: Imre Deak
Cc: Mika Kahola
Cc: Uma Shankar
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 168 ++-
drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 +
drivers/gpu/drm/i915/display
signals.
Note: PHY lane 0 is always used for PLL programming.
Bspec: 64568, 64539, 67636
Cc: Mika Kahola
Cc: Imre Deak
Cc: Uma Shankar
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 516 +-
drivers/gpu/drm/i915/display/intel_cx0_phy.h
From: Radhakrishna Sripada
Add sequences for C10 phy enable/disable phy lane reset,
powerdown change sequence and phy lane programming.
Bspec: 64539, 67636, 65451, 65450, 64568
Cc: Imre Deak
Cc: Mika Kahola
Cc: Uma Shankar
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Mika Kahola (v9
PHY programming support for message bus and phy programming.
Updates for HDMI programming and vswing tables.
Radhakrishna Sripada (5):
drm/i915/mtl: Add Support for C10,C20 PHY Message Bus
drm/i915/mtl: Add PLL programming support for C10 phy
drm/i915/mtl: Add support for C10 phy
with something more general purpose.
Bspec: 64568
Cc: Imre Deak
Cc: Mika Kahola
Cc: Uma Shankar
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 168 ++-
drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 +
drivers/gpu/drm/i915/display
signals.
Note: PHY lane 0 is always used for PLL programming.
Bspec: 64568, 64539, 67636
Cc: Mika Kahola
Cc: Imre Deak
Cc: Uma Shankar
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 516 +-
drivers/gpu/drm/i915/display/intel_cx0_phy.h
From: Radhakrishna Sripada
C10 phys uses direct mapping internally for voltage and pre-emphasis levels.
Program the levels directly to the fields in the VDR Registers.
Bspec: 65449
Cc: Imre Deak
Cc: Mika Kahola
Cc: Uma Shankar
Signed-off-by: Clint Taylor
Signed-off-by: Radhakrishna Sripada
From: Radhakrishna Sripada
Add sequences for C10 phy enable/disable phy lane reset,
powerdown change sequence and phy lane programming.
Bspec: 64539, 67636, 65451, 65450, 64568
Cc: Imre Deak
Cc: Mika Kahola
Cc: Uma Shankar
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Mika Kahola (v9
PHY programming support for message bus and phy programming.
Updates for HDMI programming and vswing tables.
Radhakrishna Sripada (5):
drm/i915/mtl: Add Support for C10,C20 PHY Message Bus
drm/i915/mtl: Add PLL programming support for C10 phy
drm/i915/mtl: Add support for C10 phy
fixed_mode in intel_edp_add_properties() function may be NULL
which is used later on in the function. Return early, in case of
fixed_mode is NULL to avoid NULL dereference.
Discovered by klockwork static analysis.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: Mika Kahola
---
drivers/gpu
From: José Roberto de Souza
Meteorlake and display 14 platform don't have any PSR differences
when comparing to Alderlake-P display, so it was only necessary to
extend some checks to properly program hardware.
BSpec: 55229, 49196
Cc: Mika Kahola
Signed-off-by: José Roberto de Souza
Signed
Add 4th pipe to extend TGL Wa_16013835468 to support DG2
platform.
BSpec: 54077
Cc: Jouni Högander
Cc: José Roberto de Souza
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 +--
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 6 insertions
From: Ville Syrjälä
Supposedly we should be able to change the cdclk squasher waveform
even when many pipes are active. Make it so.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 40 --
1 file changed, 37 insertions(+), 3 deletions(-)
diff
clock frequency based on waveform bit pattern (Ville)
[v4: vsyrjala: Actually do a proper blind readout from the hardware]
[v5: vsyrjala: Use has_cdclk_squasher()]
Signed-off-by: Mika Kahola
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 17 -
1 file
if-else structure (Ville)
[v4: vsyrjala: Fix spaces vs. tabs]
[v5: vsyrjala: Fix cd2x divider calculation (Uma),
Add warn to waveform lookup (Uma),
Handle bypass freq in waveform lookup,
Generalize waveform handling in bxt_set_cdclk()]
Signed-off-by: Mika
has_cdclk_squasher()]
Signed-off-by: Mika Kahola
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index
-squasher based table,
Set .divider=2 for consistency,
Pack intel_cdclk_vals a bit nicer]
v5: Fix error in waveform value (Swati)
v6 (Lucas): Rebase on upstream
v7 (MattR): Drop 40.8, 81.6, and 122.4 MHz frequencies to reflect new
bspec update.
Signed-off-by: Mika Kahola
Add support for CD clock squashing feature.
v2: Reorder patches (Jani)
Add Ville's "Allow cdclk squasher to be reconfigured live"
to the series
Signed-off-by: Mika Kahola
Signed-off-by: Ville Syrjälä
Mika Kahola (4):
drm/i915/display/dg2: Introduce CD clock squashing t
clock frequency based on waveform bit pattern (Ville)
[v4: vsyrjala: Actually do a proper blind readout from the hardware]
[v5: vsyrjala: Use has_cdclk_squasher()]
Signed-off-by: Mika Kahola
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 17 -
1 file
if-else structure (Ville)
[v4: vsyrjala: Fix spaces vs. tabs]
[v5: vsyrjala: Fix cd2x divider calculation (Uma),
Add warn to waveform lookup (Uma),
Handle bypass freq in waveform lookup,
Generalize waveform handling in bxt_set_cdclk()]
Signed-off-by: Mika
has_cdclk_squasher()]
Signed-off-by: Mika Kahola
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index
-squasher based table,
Set .divider=2 for consistency,
Pack intel_cdclk_vals a bit nicer]
v5: Fix error in waveform value (Swati)
v6 (Lucas): Rebase on upstream
v7 (MattR): Drop 40.8, 81.6, and 122.4 MHz frequencies to reflect new
bspec update.
Signed-off-by: Mika Kahola
Add support for CD clock squashing feature.
Signed-off-by: Mika Kahola
Signed-off-by: Ville Syrjälä
Mika Kahola (4):
drm/i915/display/dg2: Introduce CD clock squashing table
drm/i915/display/dg2: Read CD clock from squasher table
drm/i915/display/dg2: Sanitize CD clock
drm/i915/display
if-else structure (Ville)
[v4: vsyrjala: Fix spaces vs. tabs]
[v5: vsyrjala: Fix cd2x divider calculation (Uma),
Add warn to waveform lookup (Uma),
Handle bypass freq in waveform lookup,
Generalize waveform handling in bxt_set_cdclk()]
Signed-off-by: Mika
has_cdclk_squasher()]
Signed-off-by: Mika Kahola
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index
clock frequency based on waveform bit pattern (Ville)
[v4: vsyrjala: Actually do a proper blind readout from the hardware]
[v5: vsyrjala: Use has_cdclk_squasher()]
Signed-off-by: Mika Kahola
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 17 -
1 file
-squasher based table,
Set .divider=2 for consistency,
Pack intel_cdclk_vals a bit nicer]
v5: Fix error in waveform value (Swati)
v6 (Lucas): Rebase on upstream
v7 (MattR): Drop 40.8, 81.6, and 122.4 MHz frequencies to reflect new
bspec update.
Signed-off-by: Mika Kahola
The patch proposes that we read DP link status with DRM helper function
instead of intel specific one. Functionally there are no changes.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_dp.c | 13 +
drivers/gpu/drm/i915/display/intel_dp.h
In order to achieve improved power savings we can tune down CD clock frequency
for sub 4k resolutions. The maximum CD clock frequency for sub 4k
resolutions is set to 172.8 MHz.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 26 +-
drivers/gpu
We are missing PCI device ID for SKU ICLLP U GT 1.5F (0x8A54) as per BSPec.
BSpec: 19092
Signed-off-by: Mika Kahola
---
include/drm/i915_pciids.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 6d60ea68c171
Avoid divide by zero warning on static analysis.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/intel_pm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8b63afa3a221..6a8e8b3f44c2 100644
a racy condition when retraining the
DisplayPort link. My proposal is to wait for one additional vblank
event before we send out a hotplug event to userspace for reprobing.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108835
Cc: Manasi Navare
Signed-off-by: Mika Kahola
---
drivers/g
@@ -552,7 +634,7 @@ static void i915_hpd_poll_init_work(struct
> > work_struct *work)
> > * in the middle of disabling polling
> > */
> > if (!enabled)
> > - drm_helper_hpd_irq_event(dev);
> > + intel_hpd_irq_event(dev);
> > }
> Just wondering, as I saw previously drm_helper_hpd_irq_event function
> was used, which basically does the same thing, except doing memcmp
> for detecting the edid change. Is it only Intel specific change? As
> we
> could just add this modification to existing helper function or add
> another helper function to the drm (drm_probe_helper.c), so that it
> is
> also usable elsewhere..
I second Stanislav's proposal to add this feature as part of drm. This
edid check could be part of existing drm_helper_hpd_irq_event()
function. Other drivers might find this change useful.
>
> >
> >
> > /**
> --
> Best Regards,
>
> Lisovskiy Stanislav
> ___
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the patch looks fine to me.
On Mon, 2018-05-21 at 17:25 -0700, Paulo Zanoni wrote:
> Just like DP, HDMI needs to implement these flows. The side effect is
> that HDMI is now going to rely on the ISR bits, just like DP.
>
Reviewed-by: Mika Kahola
> Signed-off-by: Paulo Zanoni
>
On Tue, 2018-01-30 at 22:38 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Call the enum i9xx_plane_id variable i9xx_plane like we do elsewhere.
>
> Cc: Hans de Goede
Reviewed-by: Mika Kahola
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel
On Tue, 2018-01-30 at 22:38 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We disable trickle feed whenever possible, except for the cursors
> on SNB/IVB. Let's try disabling it there too if for no other reason
> than consistency.
>
Reviewed-by: Mika Kahola
>
Take care of gvt uses as well
>
Reviewed-by: Mika Kahola
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/gvt/fb_decoder.c | 12 ++--
> drivers/gpu/drm/i915/i915_reg.h | 22 +++---
> drivers/gpu/drm/i915/intel_display.c | 16 ---
bits can still be set in the register. Thus
> we have to ignore those bits. OTOH i965 still allows the cursors
> to move between pipes thus we have to trust the bits there.
>
Reviewed-by: Mika Kahola
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/
Patch look ok to me.
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
On Wed, 2018-05-23 at 15:44 -0700, Paulo Zanoni wrote:
> From: Manasi Navare <manasi.d.nav...@intel.com>
>
> PLLs are the source clocks for the DDIs so in order
> to determine the ddi clock
little tricky for ICL since there is
> no register bit that maps directly to the link clock.
> So this patch creates a separate function in intel_dpll_mgr.c
> to obtain the write array PLL Params and compares the set
> pll_params with the table to get the corresponding link
> clock.
>
> Cc: Rodrigo
O;
> - goto stop;
> + goto out;
> }
>
> -stop:
> - intel_dp_sink_crc_stop(intel_dp, crtc_state, true);
> +out:
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> i
On Fri, 2018-04-20 at 13:56 -0700, Dhinakaran Pandiyan wrote:
> On Fri, 2018-04-20 at 11:15 -0700, Rodrigo Vivi wrote:
> >
> > On Thu, Apr 19, 2018 at 10:03:05AM +0300, Mika Kahola wrote:
> > >
> > > On Thu, 2018-04-19 at 09:11 +0300, Lofstedt, Marta wrote:
&g
On Fri, 2018-04-20 at 11:22 +0300, Jani Nikula wrote:
> On Fri, 20 Apr 2018, Mika Kahola <mika.kah...@intel.com> wrote:
> >
> > On Thu, 2018-04-19 at 17:09 +0300, Jani Nikula wrote:
> > >
> > > On Wed, 18 Apr 2018, Mika Kahola <mika.kah...@intel.com>
On Thu, 2018-04-19 at 17:09 +0300, Jani Nikula wrote:
> On Wed, 18 Apr 2018, Mika Kahola <mika.kah...@intel.com> wrote:
> >
> > When reading out CRC's we wait for a vblank on
> > intel_dp_sink_crc_start()
> > function. When we start reading out CRC's in intel_dp
as needed.
>
>
> >
> > -Original Message-
> > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On
> > Behalf
> > Of Mika Kahola
> > Sent: Wednesday, April 18, 2018 10:57 AM
> > To: intel-gfx@lists.freedesktop.org
> > Su
2: For NV12, making the src coordinates multiplier of 4
>
> v3: Moving all the src coords handling code for NV12
> to skl_check_nv12_surface
The patch looks good to me.
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
>
> Signed-off-by: Maarten Lankhorst <maarten.lankho.
the
intel_wait_for_vblank() as the last routine that we do in an iteration loop
in intel_dp_sink_crc().
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103166
Signed-off-by: Mika Kahola <mika.kah...@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
src->y2 = (src_y + src_h) << 16;
> + if (fb->format->format == DRM_FORMAT_NV12) {
> + src->x1 = (((src->x1 >> 16)/4)*4) << 16;
> + src->x2 = (((src->x2 >> 16)/4)*4) << 16;
> + src->y1 = (((src->y1 >> 16)/4)*4) << 16;
> + src->y2 = (((src->y2 >> 16)/4)*4) << 16;
> + }
> }
>
> dst->x1 = crtc_x;
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l.com>
> Cc: Daniel Vetter <daniel.vet...@intel.com>
> Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> Cc: Mika Kahola <mika.kah...@intel.com>
> Cc: Manasi Navare <manasi.d.nav...@intel.com>
Te
sed or unused pipes")
> Fixes: 0b7029b7e43f ("drm/i915: Check for fused or unused pipes")
> Cc: <sta...@vger.kernel.org> # v4.10+
> Cc: Mika Kahola <mika.kah...@intel.com>
> Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
> Cc: Jani Nikula <jani.nik...@linux.in
On Tue, 2018-02-13 at 15:22 +0530, Vidya Srinivas wrote:
> From: Mahesh Kumar <mahesh1.ku...@intel.com>
>
> Add support of recognizing DRM_FORMAT_NV12 from plane_format
> register value.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Mahesh
_135 (4<<19)
> +#endif
> +
Shouldn't these be defined in /include/uapi/drm/drm_mode.h? Although, I
wasn't able to find these definitions from that file. Do we have a
patch under review in drm to fill this gap?
Otherwise, the patch looks good.
Acked-by: Mika Kahola <mika.kah...@intel.
value match what the hardware register
> would read, should we want to cross check the two.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> 1 file cha
s us that we should only ever write 0 to these bits. Let's
> follow that recommendation. On ilk+ the bits become hardwired to 0.
>
> Also looks like ICL repurposes these bits for some other use, so
> we had better stop setting them to bogus values there.
>
Reviewed-by: Mika Kahol
On Tue, 2018-01-30 at 22:38 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> WaDoubleCursorLP3Latency was meant for pre-production hardware.
> Drop it.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off
On Mon, 2018-01-22 at 17:33 +0530, Vidya Srinivas wrote:
> From: Mahesh Kumar <mahesh1.ku...@intel.com>
>
> Add support of recognizing DRM_FORMAT_NV12 from plane_format
> register value.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Mahesh
On Sun, 2018-01-21 at 03:15 +0530, Vidya Srinivas wrote:
> From: Mahesh Kumar <mahesh1.ku...@intel.com>
>
> Add support of recognizing DRM_FORMAT_NV12 from plane_format
> register value.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Mahesh
h, height);
> + igt_plane_set_position(plane, 0, 0);
> + igt_plane_set_size(plane, mode->hdisplay, mode->vdisplay);
> + igt_plane_set_rotation(plane, rot);
> + igt_display_commit2(display, COMMIT_ATOMIC);
> +
> + igt_plane_set_fb(plane, NULL);
>
On Tue, 2018-01-16 at 14:47 +0100, Maarten Lankhorst wrote:
> Op 16-01-18 om 14:46 schreef Mika Kahola:
> >
> > On Mon, 2018-01-15 at 15:28 +0100, Maarten Lankhorst wrote:
> > >
> > > From: Jyoti Yadav <jyoti.r.ya...@intel.com>
> > >
> >
_plane_set_size(d->plane2 ?: d->plane1, mode1->hdisplay,
> mode1->vdisplay);
> + igt_plane_set_size(d->plane4 ?: d->plane3, mode2->hdisplay,
> mode2->vdisplay);
> + igt_display_commit2(display, COMMIT_ATOMIC);
> +}
> +
> igt_main
> {
> data_t data = {};
> @@ -497,6 +585,9 @@ igt_main
> test_scaler_with_clipping_clamping_s
> cenario(, pipe, output);
> }
>
> + igt_subtest_f("2x-scaler-multi-pipe")
> + test_scaler_with_multi_pipe_plane();
> +
> igt_fixture
> igt_display_fini();
> }
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; + }
> + }
> +}
> +
> /* does iterative scaling on plane2 */
> static void iterate_plane_scaling(data_t *d, drmModeModeInfo *mode)
> {
> @@ -293,6 +443,15 @@ igt_main
> igt_subtest_f("pipe-%s-plane-scaling",
> kmstest_pipe_name(pipe))
On Tue, 2018-01-16 at 11:03 +0100, Maarten Lankhorst wrote:
> The number of scalers can depend on the pipe, so require at least 1
> scaler before running any subtests.
>
> Changes since v1:
> - More closely match kernel implementation. (Mika)
>
Reviewed-by: Mika Kahola <
> (Maarten)
> Changes since v2:
> - Use get_num_scalers() to skip when needed.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Jyoti Yadav <jyoti.r.ya...@intel.com>
> Signed-off-by: Mahesh Kumar <mahesh1.ku...@intel.com>
> Signed-off-by:
ilures in other
> subtests.
>
> Changes since v1:
> - Rebase on top of num_scalers changes.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> ---
> tests/kms_plane_scaling.c | 235
isplay_require_output_on_pipe(
> play, pipe);
>
> + igt_require(get_num_scalers(data.devid,
> pipe) > 0);
> + }
> +
> igt_subtest_f("pipe-%s-plane-scaling",
> kmstest_pipe_name(pipe))
>
On Fri, 2018-01-12 at 11:21 +0100, Maarten Lankhorst wrote:
> The next patch wants to call for_each_pipe_with_valid_output
> with *pipe and *output, this fails miserably without these braces.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Maarten Lankhor
On Fri, 2018-01-12 at 11:21 +0100, Maarten Lankhorst wrote:
> Convert the test to run subtests per pipe, before we start adding
> more subtests.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.inte
ng to (9/10)x original size of the
> image to avoid "Max pixel rate limitation" of the hardware.
>
> Later patches in this series will cover corner cases of
> scaling.
>
> Changes since v1:
> - Move out the code reshuffle to a separate commit. (Maarten)
> This m
On Fri, 2018-01-12 at 11:21 +0100, Maarten Lankhorst wrote:
> We will add more subtests in the future, it's more clear if we split
> out the actual test to its own function first.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Maarten Lankhor
to draw them using cairo and commits the same on display.
>
> Changes since v1:
> - Make the test more generic and try on all planes, including legacy
> cursor.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Mahesh Kumar <mahesh1.ku...@intel.com>
On Thu, 2018-01-11 at 11:27 +0200, Petri Latvala wrote:
> Fixes: 834321a5d76a ("tools: Cannonlake port clock programming")
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Petri Latvala <petri.latv...@intel.com>
> Cc: Mika Kahola <mika.kah...@in
checks were specific to
> SKL/KBL/BXT anyway.
>
> Cc: Ben Widawsky <b...@bwidawsk.net>
> Cc: Jason Ekstrand <ja...@jlekstrand.net>
> Cc: Daniel Stone <dani...@collabora.com>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Ville Syrjäl
we stop rejecting them on pipe C
> on CNL.
>
> Cc: Ben Widawsky <b...@bwidawsk.net>
> Cc: Jason Ekstrand <ja...@jlekstrand.net>
> Cc: Daniel Stone <dani...@collabora.com>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Ville Syrjäl
if it failed.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> ---
> tests/kms_cursor_legacy.c | 88 +++
>
> 1 file changed, 12 insertions(+
ll back to queueing both in a single commit, in which case
> we can say nothing about the vblank counter.
>
> There is a small race between flip_done and hw_done, so make
> flip_nonblocking retry for a second when encountering -EBUSY.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.co
flip_vs_cursor_busy_crc(igt_display_t *display, bool atomic)
> struct igt_fb fb_info[2], cursor_fb;
> unsigned vblank_start;
> enum pipe pipe = find_connected_pipe(display, false);
> - igt_pipe_crc_t *pipe_crc;
> igt_pipe_t *pipe_connected = >pipes[p
On Mon, 2017-12-18 at 16:05 -0800, Rodrigo Vivi wrote:
> On Wed, Dec 13, 2017 at 09:25:16AM +0000, Mika Kahola wrote:
> >
> > crtc_mask is defined explicitly defined for a certain number of
> > pipes per
> > platform. Let's generalize this in a way that c
/show_bug.cgi?id=103206
Reported-by: Thomas Gleixner <t...@linutronix.de>
Tested-by: Jaswinder Singh Rajput <jaswin...@perfectintelligent.com>
Suggested-by: Jani Nikula <jani.nik...@intel.com>
Reviewed-by: Jani Nikula <jani.nik...@intel.com>
Signed-off-by: Mika Kahola <mika.kah
On Fri, 2017-12-15 at 19:20 +0530, Jaswinder Singh Rajput wrote:
> On Fri, 2017-12-15 at 14:44 +0200, Mika Kahola wrote:
> >
> > Hi,
> >
> > This is a known issue. Could you try out this patch to see if that
> > would fix this issue for you?
> >
>
/show_bug.cgi?id=103206
Reported-by: Thomas Gleixner <t...@linutronix.de>
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
Signed-off-by: Mika Kahola <mika.kah...@intel.com>
---
drivers/gpu/drm/i915/intel_audio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
c2 01 39 d1 7f e0 31 c0 c3 83 78 70 0b 74 f9
> 31
> c0 85 d2 74 cb eb f1 48 c7 c6 d0 c0 df 96 48 c7 c7 57 dd db 96 e8 9c
> 2d
> bf ff <0f> ff 31 c0 c3 0f 1f 80 00 00 00 00 41 57 4d 89 c7 41 56 49
> 89
> [0.390679] ---[ end trace 9a14f34c58dc94ff ]---
>
>
&g
On Fri, 2017-12-15 at 11:27 +0200, Jani Nikula wrote:
> On Fri, 15 Dec 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.c
> om> wrote:
> >
> > On Friday, December 15, 2017 9:59:02 AM PST Mika Kahola wrote:
> > >
> > > In case of fused or unused pip
In case of fused or unused pipes, return early with a warning when reading
information
for encoder.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103206
Reported-by: Thomas Gleixner <t...@linutronix.de>
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
Signed-off-by:
mode return just the last CRC
> v3: Don't do memory allocations, it's hard. (Maarten)
> v4: Use igt_pipe_crc_collect_crc() instead, cleans up crc handling a
> lot.
>
> Cc: Mika Kahola <mika.kah...@intel.com>
> Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com
(Ville)
Fix DP-MST crtc mask to be dependent only on pipe (Ville)
Signed-off-by: Mika Kahola <mika.kah...@intel.com>
---
drivers/gpu/drm/i915/intel_crt.c| 4 ++--
drivers/gpu/drm/i915/intel_ddi.c| 6 +-
drivers/gpu/drm/i915/intel_dp.c | 6 +++---
drivers/gpu/dr
On Mon, 2017-12-11 at 12:00 +, Daniel Stone wrote:
> Hi Mika,
>
> On 11 December 2017 at 11:11, Mika Kahola <mika.kah...@intel.com>
> wrote:
> >
> > On Thu, 2017-08-24 at 22:10 +0300, ville.syrj...@linux.intel.com
> > wrote:
> > >
> >
Y_SIZE(skl_plane_formats);
> - modifiers = skl_plane_format_modifiers;
> - } else if (INTEL_GEN(dev_priv) >= 9) {
> - intel_plane->can_scale = true;
> - state->scaler_id = -1;
> -
> - intel_pl
, the reference with double precision and
i915 implementation with fixed point precision. In case of a difference in
computation the difference on dividers is printed out to the screen.
Signed-off-by: Mika Kahola <mika.kah...@intel.com>
---
tools/Makefile.sources| 1 +
tools/cnl_compute_w
On Tue, 2017-12-05 at 15:59 +0200, Ville Syrjälä wrote:
> On Tue, Dec 05, 2017 at 12:15:39PM +0200, Mika Kahola wrote:
> >
> > crtc_mask is defined explicitly defined for a certain number of
> > pipes per
> > platform. Let's generalize this in a way that c
crtc_mask is defined explicitly defined for a certain number of pipes per
platform. Let's generalize this in a way that crtc_mask dependens only on
the number of pipes defined in device info.
Signed-off-by: Mika Kahola <mika.kah...@intel.com>
---
drivers/gpu/drm/i915/intel_crt.c
On Wed, 2017-11-15 at 10:04 -0800, Rodrigo Vivi wrote:
> On Wed, Nov 15, 2017 at 08:06:16AM +0000, Mika Kahola wrote:
> >
> > On Tue, 2017-11-14 at 11:47 -0800, Rodrigo Vivi wrote:
> > >
> > > Spec describe all values in MHz. We handle our
&
I 2.0 wasn't
> working.
>
> This patch also replaces the use of "* KHz(1)" with the values
> directly on KHz to avoid future confusion.
>
> Cc: Shashank Sharma <shashank.sha...@intel.com>
> Cc: Mika Kahola <mika.kah...@intel.com>
> Cc: Manasi Navare
On Fri, 2017-11-10 at 13:37 +, Chris Wilson wrote:
> Quoting Mika Kahola (2017-11-10 13:31:54)
> >
> > At least in Coffee Lake it happens that we start initiliazing audio
> > when
> > no display is connected. This was discovered by CI when ru
On Fri, 2017-11-10 at 15:22 +0200, Jani Nikula wrote:
> On Fri, 10 Nov 2017, Mika Kahola <mika.kah...@intel.com> wrote:
> >
> > On Thu, 2017-11-09 at 15:15 +0200, Ville Syrjälä wrote:
> > >
> > > On Thu, Nov 09, 2017 at 01:11:05PM +0200, Mika Kahola wrote:
is enabled.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103206
Signed-off-by: Mika Kahola <mika.kah...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
On Thu, 2017-11-09 at 15:15 +0200, Ville Syrjälä wrote:
> On Thu, Nov 09, 2017 at 01:11:05PM +0200, Mika Kahola wrote:
> >
> > On Thu, 2017-11-09 at 11:01 +, Chris Wilson wrote:
> > >
> > > Quoting Mika Kahola (2017-11-09 10:49:52)
> > > >
> &
On Thu, 2017-11-09 at 11:01 +, Chris Wilson wrote:
> Quoting Mika Kahola (2017-11-09 10:49:52)
> >
> > At least in Coffee Lake it happens that we start initiliazing audio
> > when
> > no display is connected. This was discovered by CI when ru
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