On Mon, Jul 08, 2019 at 04:16:07PM -0700, Lucas De Marchi wrote:
> From: Radhakrishna Sripada
>
> Add the enum additions to TGP.
>
> Cc: Rodrigo Vivi
> Cc: Joonas Lahtinen
> Cc: David Weinehall
> Cc: James Ausmus
> Signed-off-by: Radhakrishna Sripada
>
On Mon, Jul 08, 2019 at 04:16:20PM -0700, Lucas De Marchi wrote:
> From: Mahesh Kumar
>
> Create a helper function to get ddc pin according to port number.
Could you please explain why we can't simply reuse the icl one?
I couldn't find a new table for tgl on bspec...
>
> Cc: Anusha Srivatsa
On Mon, Jul 08, 2019 at 04:16:25PM -0700, Lucas De Marchi wrote:
> Add port C to workaround to cover Tiger Lake.
>
> Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 11 ---
On Mon, Jul 08, 2019 at 04:16:16PM -0700, Lucas De Marchi wrote:
> From: Vandita Kulkarni
>
> Add a new pll array for Tiger Lake. The TC pll functions for type C will
> be covered in later patches after its phy is implemented.
>
> Cc: Madhav Chauhan
> Cc: Rodrigo Vivi
mapped to TypeC Port 1
> even though it doesn't have TC phy.
>
> v2: don't add a separate function for TGL, but rather reuse the ICL one
> (suggested by Rodrigo)
>
> Cc: Anusha Srivatsa
> Cc: Rodrigo Vivi
> Signed-off-by: Lucas De Marchi
Thanks
Reviewed-
On Tue, Jul 09, 2019 at 09:20:42AM -0700, Lucas De Marchi wrote:
> On Tue, Jul 09, 2019 at 04:57:32AM -0700, Rodrigo Vivi wrote:
> > On Mon, Jul 08, 2019 at 04:16:14PM -0700, Lucas De Marchi wrote:
> > > From: Mika Kahola
> > >
> > > Add power well 5 to su
> void *data)
>*/
> synchronize_irq(dev_priv->drm.irq);
> flush_work(&dev_priv->hotplug.dig_port_work);
> - flush_work(&dev_priv->hotplug.hotplug_work);
> + flush_delayed_work(&dev_priv->hotplug.hotplug_work);
>
> seq_prin
On Wed, Jul 10, 2019 at 09:02:22AM -0700, Lucas De Marchi wrote:
> On Wed, Jul 10, 2019 at 04:04:29AM -0700, Rodrigo Vivi wrote:
> > On Tue, Jul 09, 2019 at 09:20:42AM -0700, Lucas De Marchi wrote:
> > > On Tue, Jul 09, 2019 at 04:57:32AM -0700, Rodrigo Vivi wrote:
> > >
On Wed, Jul 10, 2019 at 09:04:28PM +0100, Chris Wilson wrote:
> The workarounds was revived in the backmerge that was meant to fix it!
>
> Fixes: 88c90e800675 ("Merge drm/drm-next into drm-intel-next-queued")
> Signed-off-by: Chris Wilson
> Cc: Rodrigo Vivi
Duh! Sorry
t;drm/i915: Enable PSR2 by default")
> Signed-off-by: Chris Wilson
> Cc: Rodrigo Vivi
> Cc: Dhinakaran Pandiyan
> Cc: José Roberto de Souza
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Cc: sta...@vger.kernel.org #v5.2
> ---
> drivers/gpu/drm/i915/display/intel_
Hi Dave and Daniel,
Here goes the first pull request targeting 5.20.
Kudos to Jani and Ville for a good driver clean-up.
And many other fixes and improvements from the team.
drm-intel-next-2022-06-22:
- General driver clean-up (Jani, Ville, Julia)
- DG2 enabling (Anusha, Vandita)
- Fix sparse wa
On Wed, Jun 22, 2022 at 03:55:03PM +0300, Jani Nikula wrote:
> On Tue, 21 Jun 2022, "Tangudu, Tilak" wrote:
> >> -Original Message-
> >> From: Gupta, Anshuman
> >> Sent: Tuesday, June 21, 2022 7:47 PM
> >> To: Tangudu, Tilak ;
> >> intel-gfx@lists.freedesktop.org;
> >> Ewins, Jon ; Vivi,
Hi Zdenek,
On Wed, Jun 22, 2022 at 01:18:42PM +0200, Zdenek Kabelac wrote:
> Hello
>
> While somewhat oldish hw (T61, 4G, C2D) - I've now witnessed new crash with
> Xorg:
>
> (happened while reopening iconified Firefox window - running 'standard'
> rawhide -nodebug kernel 5.19.0-0.rc2.21.fc3
On Thu, Jun 30, 2022 at 02:09:02PM +0100, Tvrtko Ursulin wrote:
>
> On 30/06/2022 12:19, Tetsuo Handa wrote:
> > On 2022/06/30 19:17, Tvrtko Ursulin wrote:
> > > Could you give more context on reasoning here please? What is the
> > > difference
> > > between using the system_wq and flushing it fr
On Thu, Jun 30, 2022 at 05:34:22PM +0300, Jani Nikula wrote:
> On Thu, 30 Jun 2022, Rodrigo Vivi wrote:
> > On Thu, Jun 30, 2022 at 02:09:02PM +0100, Tvrtko Ursulin wrote:
> >>
> >> On 30/06/2022 12:19, Tetsuo Handa wrote:
> >> > On 2022/06/30 19:17, Tvrtko
Hi Dave and Daniel,
Here goes drm-intel-next-2022-07-06 that shall be our last one
towards 5.20, containing only a few things:
- Suspend fixes for Display (Jose)
- Properly block D3Cold for now (Anshuman)
- Eliminate PIPECONF RMWs from .color_commit()(Ville)
- Display info clean-up (Ville)
- Fix
Hi Dave and Daniel,
Here goes our fixes targeting 5.19-rc6.
There will probably be a couple more important fixes coming
next week for the -rc7
drm-intel-fixes-2022-07-07:
- Fix a possible refcount leak in DP MST connector (Hangyu)
- Fix on loading guc on ADL-N (Daniele)
- Fix vm use-after-free
On Wed, Jul 06, 2022 at 02:43:33PM +0300, Alexander Usyskin wrote:
> Add slow_fw flag to the mei auxiliary device info
> to inform the mei driver about slow underlying firmware.
> Such firmware will require to use larger operation timeouts.
>
> Signed-off-by: Alexander Usyskin
> Signed-off-by: To
On Tue, Jul 05, 2022 at 12:57:17PM +0200, Karolina Drobnik wrote:
> From: Chris Wilson
>
> We employ a "waitboost" heuristic to detect when userspace is stalled
> waiting for results from earlier execution. Under latency sensitive work
> mixed between the gpu/cpu, the GPU is typically under-utili
amp;engine->barrier_tasks);
> - intel_engine_pm_put_delay(engine, 1);
> + intel_engine_pm_put_delay(engine, 2);
I believe we should make more use of the runtime_idle to check for some
pending activity like this... but in the current structure this patch seems
the best and easiest option.
Reviewed-by: Rodrigo Vivi
> }
> }
>
> --
> 2.25.1
>
On Fri, Jul 08, 2022 at 03:34:43PM +0200, Greg Kroah-Hartman wrote:
> On Wed, Jul 06, 2022 at 02:43:31PM +0300, Alexander Usyskin wrote:
> > Add GSC support for XeHP SDV and DG2 platforms.
> >
> > The series includes changes for the mei driver:
> > - add ability to use polling instead of interrupt
On Thu, Jul 07, 2022 at 02:47:54PM -, Patchwork wrote:
> == Series Details ==
>
> Series: Fix TLB invalidate issues with Broadwell (rev4)
> URL : https://patchwork.freedesktop.org/series/105167/
> State : warning
>
> == Summary ==
>
> Error: dim checkpatch failed
> 158bc8b5e012 drm/i915/gt
On Thu, Jul 07, 2022 at 02:47:57PM -, Patchwork wrote:
> == Series Details ==
>
> Series: Fix TLB invalidate issues with Broadwell (rev4)
> URL : https://patchwork.freedesktop.org/series/105167/
> State : warning
>
> == Summary ==
>
> Error: dim sparse failed
> Sparse version: v0.6.2
> Fas
On Fri, Jul 08, 2022 at 06:00:52AM -, Patchwork wrote:
>Patch Details
>
>Series: Fix TLB invalidate issues with Broadwell (rev4)
>URL: [1]https://patchwork.freedesktop.org/series/105167/
>State: failure
>Details:
>[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patch
On Fri, Jul 08, 2022 at 04:20:13PM +0200, Karolina Drobnik wrote:
> From: Chris Wilson
>
> One impact of commit 047a1b877ed4 ("dma-buf & drm/amdgpu: remove
> dma_resv workaround") is that it stores many, many more fences. Whereas
> adding an exclusive fence used to remove the shared fence list, t
drm/amdgpu: remove dma_resv workaround")
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Signed-off-by: Karolina Drobnik
> Tested-by: Thomas Voegtle
> Reviewed-by: Andi Shyti
Acked-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gem/i915_gem_wait.c | 34 +
On Mon, Jul 11, 2022 at 08:22:33AM -, Patchwork wrote:
>Patch Details
>
>Series: Fix TLB invalidate issues with Broadwell (rev5)
>URL: [1]https://patchwork.freedesktop.org/series/105167/
>State: failure
>Details:
>[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patch
On Fri, Jul 08, 2022 at 10:40:24AM -0400, Rodrigo Vivi wrote:
> On Fri, Jul 08, 2022 at 04:20:13PM +0200, Karolina Drobnik wrote:
> > From: Chris Wilson
> >
> > One impact of commit 047a1b877ed4 ("dma-buf & drm/amdgpu: remove
> > dma_resv workaround")
On Mon, Jul 11, 2022 at 07:09:20AM +, Vudum, Lakshminarayana wrote:
> Issue is related to https://gitlab.freedesktop.org/drm/intel/-/issues/6169
> Few tests - incomplete - pstore logs, Kernel panic - not syncing: Software
> Watchdog Timer expired, RIP: 0010:cpuidle_enter_state
For a moment I
On Mon, Jul 11, 2022 at 05:11:23PM +0200, Mauro Carvalho Chehab wrote:
> On Mon, 11 Jul 2022 10:06:38 -0400
> Rodrigo Vivi wrote:
>
> > On Mon, Jul 11, 2022 at 08:22:33AM -, Patchwork wrote:
> > >Patch Details
> > >
> > >Series: Fix
On Mon, Jul 11, 2022 at 10:26:14AM +0200, Christoph Hellwig wrote:
> Hi i915 and nouveau maintainers,
>
> any chance I could get some help to remove the remaining direct
> driver calls into swiotlb, namely swiotlb_max_segment and
> is_swiotlb_active. Either should not matter to a driver as they
>
AY_SIZE(engine_reset_domains) ||
> +!engine_reset_domains[id]);
> + engine->reset_domain = engine_reset_domains[id];
> + }
probably better if we could have a function for this.
engine->reset_domain = intel_reset_domain()... or something like that.
Hi Dave and Daniel,
Here goes drm-intel-fixes-2021-12-09:
A fix to a error pointer dereference in gem_execbuffer and
a fix for GT initialization when GuC/HuC are used on ICL.
Thanks,
Rodrigo.
The following changes since commit 0fcfb00b28c0b7884635dacf38e46d60bf3d4eb1:
Linux 5.16-rc4 (2021-12
Hi Dave and Daniel,
First, a heads up that I will be on vacation for the next weeks
so Jani will cover the drm-intel-fixes for the next rounds.
Now, here goes drm-intel-fixes-2021-12-15:
Fix a bound check in the DMC fw load.
Thanks,
Rodrigo.
The following changes since commit 2585cf9dfaaddf00b
ids table.
> >
> > Signed-off-by: Lucas De Marchi
>
> I don't know the details of stolen memory, but the implementation of
> this quirk looks good to me. Very nice that it's now very clear
> exactly what the change is.
Reviewed-by: Rodrigo Vivi
Bjorn, ack t
ned-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> arch/x86/kernel/early-quirks.c | 14 ++
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index 8b689c2b8cc7..df34963e23b
On Mon, Jan 10, 2022 at 11:32:11AM -0600, Bjorn Helgaas wrote:
> On Mon, Jan 10, 2022 at 12:11:36PM -0500, Rodrigo Vivi wrote:
> > On Fri, Jan 07, 2022 at 08:57:32PM -0600, Bjorn Helgaas wrote:
> > > On Fri, Jan 07, 2022 at 01:05:16PM -0800, Lucas De Marchi wrote:
> > >
On Tue, Jan 11, 2022 at 06:08:28AM -0500, Wang, Zhi A wrote:
> On 1/11/22 6:08 AM, Wang, Zhi A wrote:
> > On 1/11/2022 12:52 AM, Vivi, Rodrigo wrote:
> >> On Fri, 2022-01-07 at 14:43 +, Wang, Zhi A wrote:
> >>> Hi folks:
> >>>
> >>> Happy holidays! This pull mostly contains the code re-factors
> registers (engine registers, SNPS PHY registers) off to their own header
> files.
>
> v3:
> - Split out i915_reg_defs.h in its own patch
> - Also split out combo PHY and MG/DKL PHY sets of registers
>
> Cc: Jani Nikula
> Cc: Ville Syrjälä
> Cc: Rodrigo Vivi
>
On Thu, Jan 13, 2022 at 06:58:47PM +0200, Jani Nikula wrote:
> On Wed, 12 Jan 2022, Rodrigo Vivi wrote:
> > I understand that I'm late to the fun here, but I got myself wondering if
> > we couldn't separated the registers in a "regs" directory
> > and fi
On Wed, Jan 12, 2022 at 05:28:29PM -0800, Lucas De Marchi wrote:
> On Wed, Jan 12, 2022 at 07:06:45PM -0600, Bjorn Helgaas wrote:
> > On Wed, Jan 12, 2022 at 04:21:28PM -0800, Lucas De Marchi wrote:
> > > On Wed, Jan 12, 2022 at 06:08:05PM -0600, Bjorn Helgaas wrote:
> > > > On Wed, Jan 12, 2022 at
eparing to enter system sleep state S5
> reboot: Power down
>
> Changes since v1:
> - Rebase to latest drm-tip
>
> Fixes: 0cfab4cb3c4e ("drm/i915/pxp: Enable PXP power management")
> Suggested-by: Lee Shawn C
> Signed-off-by: Juston Li
> Reviewed-by: Daniel
On Tue, Mar 08, 2022 at 06:36:53PM +0200, Alexander Usyskin wrote:
> From: Tomas Winkler
>
> Implement runtime handlers for mei-gsc, to track
> idle state of the device properly.
>
> CC: Rodrigo Vivi
> Signed-off-by: Tomas Winkler
> Signed-off-by: Alexander Usyskin
&
On Tue, Mar 15, 2022 at 03:11:56PM +0200, Alexander Usyskin wrote:
> From: Tomas Winkler
>
> Implement runtime handlers for mei-gsc, to track
> idle state of the device properly.
>
> CC: Rodrigo Vivi
> Signed-off-by: Tomas Winkler
> Signed-off-by: Alexander Usyskin
On Fri, Mar 25, 2022 at 08:10:59PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 25, 2022 at 08:34:36AM -0700, José Roberto de Souza wrote:
> > intel_drrs_enable and intel_drrs_disable where renamed to
> > intel_drrs_activate and intel_drrs_deactivate in commit
> > 54903c7a6b40 ("drm/i915: s/enable/act
On Thu, Mar 24, 2022 at 04:02:41PM +0100, Thorsten Leemhuis wrote:
> Hi i915 maintainers, this is your Linux kernel regression tracker!
> What's up with the following regression?
>
> https://gitlab.freedesktop.org/drm/intel/-/issues/5284
>
> That report it more than two weeks old now, but seems n
On Tue, Jul 12, 2022 at 04:21:33PM +0100, Mauro Carvalho Chehab wrote:
> From: Chris Wilson
>
> Avoid trying to invalidate the TLB in the middle of performing an
> engine reset, as this may result in the reset timing out. Currently,
> the TLB invalidate is only serialised by its own mutex, forgoi
On Tue, Jul 12, 2022 at 08:29:32AM +0200, Karolina Drobnik wrote:
> Hi Rodrigo,
>
> Many thanks for taking another look at the patches.
>
> On 08.07.2022 16:40, Rodrigo Vivi wrote:
> > On Fri, Jul 08, 2022 at 04:20:13PM +0200, Karolina Drobnik wrote:
> > > From:
On Mon, Jul 11, 2022 at 01:20:21PM +0800, Zhenyu Wang wrote:
>
> Hi,
>
> Here's one gvt fix for 5.19, from Dan for shmem_pin_map() return check bug.
>
> Thanks!
> ---
>
> The following changes since commit d72d69abfdb6e0375981cfdda8eb45143f12c77d:
>
> drm/i915/gvt: Make DRM_I915_GVT depend o
Hi Dave and Daniel,
On behalf of Tvrtko, who is recovering from Covid,
here goes the latest drm-intel-gt-next pull request
targeting 5.20.
Thanks,
Rodrigo.
Driver uAPI changes:
- All related to the Small BAR support: (and all by Matt Auld)
* add probed_cpu_visible_size
* expose the avail memor
Auld (1):
drm/i915/ttm: fix sg_table construction
Rodrigo Vivi (1):
Merge tag 'gvt-fixes-2022-07-11' of https://github.com/intel/gvt-linux
into drm-intel-fixes
Thomas Hellström (1):
drm/i915: Fix vm use-after-free in vma destruction
drivers/gpu/drm/i915/display/inte
intel_gvt_switch_mmio() instead.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
> Acked-by: Zhenyu Wang
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C
Prototype was for
> intel_vgpu_default_mmio_write() instead.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
> Acked-by: Zhenyu Wang
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists we
On Wed, Jul 13, 2022 at 05:54:44PM -0400, Rodrigo Vivi wrote:
> On Wed, Jul 13, 2022 at 09:11:49AM +0100, Mauro Carvalho Chehab wrote:
> > From: Jiapeng Chong
> >
> > Fix the following W=1 kernel warnings:
> >
> > drivers/gpu/drm/i915/gvt/mmio_context.c:560: war
t described in '__wait_for'
> drivers/gpu/drm/i915/i915_utils.h:291: warning: Function parameter or
> member 'US' not described in '__wait_for'
> drivers/gpu/drm/i915/i915_utils.h:291: warning: Function parameter or
> member
rture_gm.c
> +++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> @@ -298,7 +298,7 @@ static int alloc_resource(struct intel_vgpu *vgpu,
> }
>
> /**
> - * inte_gvt_free_vgpu_resource - free HW resource owned by a vGPU
> + * intel_vgpu_free_resource() - free HW resource owned by a vGPU
gt; +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -685,7 +685,7 @@ intel_display_power_put_async_work(struct work_struct
> *work)
> }
>
> /**
> - * intel_display_power_put_async - release a power domain reference
> asynchronously
> + * __intel_display_power_
> struct file;
>
> -/**
> +/*
> * struct __guc_capture_bufstate
> *
> * Book-keeping structure used to track read and write pointers
> @@ -26,7 +26,7 @@ struct __guc_capture_bufstate {
> u32 wr;
> };
>
> -/**
> +/*
> * struct __guc_c
_deactivate_vgpu()
> instead
> drivers/gpu/drm/i915/gvt/vgpu.c:358: warning: expecting prototype for
> intel_gvt_destroy_vgpu(). Prototype was for intel_gvt_destroy_idle_vgpu()
> instead
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
&g
ntel_wakeref_get_if_active().
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v2 00/39] at:
> https://lore.kernel.org/all/co
On Tue, Jul 12, 2022 at 08:39:32PM -, Patchwork wrote:
>Patch Details
>
>Series: drm/kms: Stop registering multiple /sys/class/backlight devs
>for a single display (rev2)
>URL: [1]https://patchwork.freedesktop.org/series/104084/
>State: failure
>Details:
>[2]https:/
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v2 00/39] at:
> https://lore.kernel.org/all/cover.1657699522.git.mche...@ke
On Wed, Jul 13, 2022 at 09:12:08AM +0100, Mauro Carvalho Chehab wrote:
> The return codes for i915_gem_wait_ioctl() have identation issues,
> and will be displayed on a very confusing way. Use lists to improve
> its output.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-b
On Wed, Jul 13, 2022 at 09:12:12AM +0100, Mauro Carvalho Chehab wrote:
> This file is licensed with MIT license. Change its license text
> to use SPDX.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large n
.. So, replace them by a different Sphinx-compatible tag.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v2 00/39] at:
> https://lore.kern
pu/drm/i915/gt/intel_engine_types.h:276: warning: Function
> parameter or member 'preempt_hang' not described in 'intel_engine_execlists'
>
> That are due undocumented parameters.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:11AM +0100, Mauro Carvalho Chehab wrote:
> This file is licensed with MIT license. Change its license text
> to use SPDX.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of
On Fri, Jul 15, 2022 at 09:26:16AM +0100, Mauro Carvalho Chehab wrote:
> From: Chris Wilson
>
> On Haswell, in particular, we see an issue where resets fails because
Can we then make this platform specific?
Only because some older hw doesn't behave like expected we shouldn't
make this a default
WARNING: Inline strong
> start-string without end-string.
>
> Signed-off-by: Mauro Carvalho Chehab
Just trying to understand as well on why in a few you had chosen ```foo```
and here **foo**. why?
anyway, not a blocker:
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mail
915_vma_destroy_locked one?
That was also a new introduction. Should we bother with the Fixes
anyway since there were many broken already? And if we do, shouldn't
we add to the others?
But anyway, just trying to understand the differences and reasons,
because the patch is correct:
Reviewed-by
On Wed, Jul 13, 2022 at 09:12:09AM +0100, Mauro Carvalho Chehab wrote:
> The doc markup should not end with ":", as it would generate a
> warning on Sphinx while generating the cross-reference tag.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> Use list markups to suppress the warning.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v2 00/39] at:
> https://
the data field, as expected by kernel-doc.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v2 00/39] at:
> https://lore.kernel.org/a
; That's because @foo evaluates into **foo**, and placing anything
> after it without spaces cause Sphinx to warn and do the wrong
> thing.. So, replace them by a different Sphinx-compatible tag.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Rodrigo Vivi
> ---
>
> T
markups.
>
> Signed-off-by: Mauro Carvalho Chehab
\o/
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v2 00/39] at:
> https://lore.kernel.org/all/cover.1657699522.git.mche...@k
Hi Dave and Daniel (and Linus),
Our 'dim' flow has a problem with fixes of fixes getting missed.
We need to take a look on that later.
Meanwhile, please allow me to quickly propagate this fix
here upstream.
Here goes drm-intel-fixes-2022-07-17:
- Fix 32b build
Thanks,
Rodrigo.
The following c
o v69 in 5.18.
the team had looked to get v62 right now, but that would be too disruptive
and risky for the 5.19.
For now we are going with this fallback to v69 to solve the 5.19 regression.
Then look to solve the v62 regressions with the -stable fixes as a next step.
Dave had agreed with th
On Fri, Jul 15, 2022 at 01:19:53PM +0800, Jason Wang wrote:
> The double `wait' is duplicated in line 974, remove one.
The line number changes... if you remove the "in line #"
the msg gets better.
With that changed:
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jaso
On Sun, Jul 17, 2022 at 02:44:39AM +0800, Jason Wang wrote:
> The semicolon after the `}' in line 648 is unneeded.
same here
The line number changes... if you remove the "in line #"
the msg gets better.
With that changed:
Reviewed-by: Rodrigo Vivi
>
> S
On Mon, Jul 18, 2022 at 06:07:06PM -0700, Ashutosh Dixit wrote:
> Create a gt/gtN/.defaults/ directory (similar to
> engine//.defaults/) to expose default parameter values for each
> gt in sysfs. This allows userspace to restore default parameter values
> after they may have changed.
>
> Patch 1:
/* 195 */
> - u8 dp_port_trace_length:4; /* 209 */
> - u8 dp_gpio_index; /* 195 */
> - u16 dp_gpio_pin_num;/*
tuff or not. My
> current stash contains no VBTs with this bit set.
let's unlock a new can of worms?! :)
I believe this deserves a /* XXX: comment with the code in case
someone else finds this warns first and doesn't use the git blame
anyways
Reviewed-by: Rodrigo Vivi
>
> Si
On Fri, Jul 15, 2022 at 11:20:44PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Limit the DP lane count based on the new VBT DP/eDP max
> lane count field.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 16
> drivers/gpu/drm/i915/
should be there.
>
> Let's not break using mmap() for lmem object on DG1.
> Using pci_d3cold_disable(i915) accordingly to disable D3 for
> upstream bridge.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331
> Cc: Rodrigo Vivi
> Signed-off-by: Anshuma
Hi Dave and Daniel,
This is basically only the guc regression fix.
The other patch is just a dependency to make the
important patch to apply cleanly without conflict.
drm-intel-fixes-2022-07-20-1:
- Fix the regression caused by the lack of GuC v70.
Let's accept the fallback to v69.
Thanks,
Rod
ned-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c
b/drivers/gpu/drm/i915/gt/intel_rc6.c
index f8d0523f4c18..d1dcb018117d 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drive
On Wed, Jul 20, 2022 at 06:56:16PM +0200, Andrzej Hajda wrote:
> On 16.07.2022 06:05, Jason Wang wrote:
> > Fix the double `wait' typo in comment.
> >
> > Signed-off-by: Jason Wang
> > ---
> > drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(
On Sun, Jul 17, 2022 at 02:44:39AM +0800, Jason Wang wrote:
> The semicolon after the `}' in line 648 is unneeded.
I removed the line mention while pushing to drm-intel-gt-next.
Thanks for the patch.
>
> Signed-off-by: Jason Wang
> ---
> drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +-
> 1 file
On Thu, Jul 21, 2022 at 03:29:48PM +0530, tilak.tang...@intel.com wrote:
> From: Tilak Tangudu
>
> Added is_intel_rpm_allowed function to query the runtime_pm
> status and disllow during suspending and resuming.
>
> v2: Return -2 if runtime pm is not allowed in runtime_pm_get
> and skip wakeref
On Thu, Jul 21, 2022 at 03:29:51PM +0530, tilak.tang...@intel.com wrote:
> From: Tilak Tangudu
>
> During runtime resume the display init sequence is called via
> intel_display_power_resume() -> icl_display_core_init()
> which should restore the display HW state. For restoring the DC9 enabled
> s
that Runtime PM Core invokes runtime_idle
> callback when runtime usages count becomes zero. That requires
> to use pm_runtime_put instead of pm_runtime_put_autosuspend.
>
> Cc: Rodrigo Vivi
> Cc: Chris Wilson
> Signed-off-by: Anshuman Gupta
> ---
> drivers/gpu/drm/i915/i915_d
added, need to be added
> by using query functions.
> FIXME, Forcing the policy to enter D3COLD_OFF for
> validation purpose.
>
> Cc: Rodrigo Vivi
> Signed-off-by: Anshuman Gupta
> Signed-off-by: Tilak Tangudu
> ---
> drivers/gpu/drm/i915/i915_driver.c | 6
Hi Dave and Daniel,
Here goes drm-intel-next-fixes-2022-08-04:
- disable pci resize on 32-bit systems (Nirmoy)
- don't leak the ccs state (Matt)
- TLB invalidation fixes (Chris)
Thanks,
Rodrigo.
The following changes since commit 2bc7ea71a73747a77e7f83bc085b0d2393235410:
Merge tag 'topic/nou
On Fri, Aug 05, 2022 at 10:46:57AM +0200, Mauro Carvalho Chehab wrote:
> Hi Rodrigo,
>
> On Thu, 4 Aug 2022 13:33:06 -0400
> Rodrigo Vivi wrote:
>
> > Hi Dave and Daniel,
> >
> > Here goes drm-intel-next-fixes-2022-08-04:
> >
> > - disable pci
On Fri, Aug 05, 2022 at 05:25:43PM +0200, Mauro Carvalho Chehab wrote:
> On Fri, 5 Aug 2022 10:39:44 -0400
> Rodrigo Vivi wrote:
>
> > On Fri, Aug 05, 2022 at 10:46:57AM +0200, Mauro Carvalho Chehab wrote:
> > > Hi Rodrigo,
> > >
> > > On Thu, 4 Aug 202
tha Tolakanahalli Pradeep (1):
drm/i915/dmc: Update DG2 DMC firmware to v2.07
Matt Roper (1):
drm/i915: Add Wa_14016291713
Rodrigo Vivi (1):
Merge drm/drm-next into drm-intel-next
Stanislav Lisovskiy (1):
drm/i915/dg2: Bump up CDCLK for DG2
Swati Sharma (1):
drm/i9
On Mon, Aug 08, 2022 at 06:37:58PM +0200, Andi Shyti wrote:
> Hi Mauro,
>
> On Thu, Aug 04, 2022 at 09:37:22AM +0200, Mauro Carvalho Chehab wrote:
> > WRITE_ONCE() should happen at the original var, not on a local
> > copy of it.
> >
> > Fixes: 5d36acb7198b ("drm/i915/gt: Batch TLB invalidations"
, I didn't know that
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v2 00/39] at:
> https://lore.kernel.org/all/cover.1657699
e.
my first reaction was: "do we really need those new empty ( ) blocks?"
Then I read this ;)
Reviewed-by: Rodrigo Vivi
>
> Change the ascii artwork to be on code-blocks, starting all
> lines at the same characters and not ending with a backslash.
>
> Signed-off-by: Ma
n't checked if these would be all the files, but the approach
looks reasonable to me.
Reviewed-by: Rodrigo Vivi
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the cover.
> See [PATCH v2 00/39] at:
> https://lore.kernel.org/
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