Re: [Intel-gfx] [PATCH v8 6/6] drm/i915: expose rcs topology through query uAPI

Quoting Tvrtko Ursulin (2018-01-18 12:46:55) > > On 17/01/2018 15:39, Lionel Landwerlin wrote: > > + > > + if (query_item->length == 0) > > + return total_length; > > + > > + if (query_item->length < total_length) > > + return -EINVAL; > > Did we talk about

Re: [Intel-gfx] [PATCH 15/15] drm/i915: Add NV12 support to intel_framebuffer_init

Op 20-01-18 om 22:45 schreef Vidya Srinivas: > From: Chandra Konduru > > This patch adds NV12 as supported format > to intel_framebuffer_init and performs various checks. > > v2: > -Fix an issue in checks added (Chandra Konduru) > > v3: rebased (me) > > v4: Review

Re: [Intel-gfx] [PATCH] drm/i915: Add tracking for CDCLK bypass frequency

On Wed, Jan 17, 2018 at 07:56:22PM +0200, Ville Syrjälä wrote: > On Wed, Jan 17, 2018 at 07:25:08PM +0200, Imre Deak wrote: > > The CDCLK bypass frequency can vary on upcoming platforms, so prepare > > for that now by tracking its value in the CDCLK state. > > > > Currently on BDW+ the bypass

[Intel-gfx] [PATCH v9 1/6] drm/i915: store all subslice masks

Up to now, subslice mask was assumed to be uniform across slices. But starting with Cannonlake, slices can be asymmetric (for example slice0 has different number of subslices as slice1+). This change stores all subslices masks for all slices rather than having a single mask that applies to all

[Intel-gfx] [PATCH v9 2/6] drm/i915/debugfs: reuse max slice/subslices already stored in sseu

Now that we have that information in topology fields, let's just reused it. v2: Style tweaks (Tvrtko) Signed-off-by: Lionel Landwerlin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_debugfs.c | 27 +++

[Intel-gfx] [PATCH v9 3/6] drm/i915/debugfs: add rcs topology entry

While the end goal is to make this information available to userspace through a new ioctl, there is no reason we can't display it in a human readable fashion through debugfs. slice0: 3 subslice(s) (0x7): subslice0: 8 EUs (0xff) subslice1: 8 EUs (0xff) subslice2: 8 EUs

[Intel-gfx] [PATCH v9 5/6] drm/i915: add query uAPI

There are a number of information that are readable from hardware registers and that we would like to make accessible to userspace. One particular example is the topology of the execution units (how are execution units grouped in subslices and slices and also which ones have been fused off for die

[Intel-gfx] [PATCH v9 4/6] drm/i915: add rcs topology to error state

This might be useful information for developers looking at an error state. v2: Place topology towards the end of the error state (Chris) v3: Reuse common printing code (Michal) v4: Make this a one-liner (Chris) Signed-off-by: Lionel Landwerlin Reviewed-by:

[Intel-gfx] [PATCH v9 6/6] drm/i915: expose rcs topology through query uAPI

With the introduction of asymmetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the Gen's GPU topology that doesn't aggregate numbers. This is essential for monitoring parts

[Intel-gfx] [PATCH v9 0/6] drm/i915: expose RCS topology to userspace

Hi all, This looks like the last iteration :) Cheers, Lionel Landwerlin (6): drm/i915: store all subslice masks drm/i915/debugfs: reuse max slice/subslices already stored in sseu drm/i915/debugfs: add rcs topology entry drm/i915: add rcs topology to error state drm/i915: add query

[Intel-gfx] [PATCH] drm/i915: vbt defs typo fixes

No more sing-a-ling. Reported-by: Adam Jackson Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h

Re: [Intel-gfx] [PATCH] drm/i915: vbt defs typo fixes

Quoting Jani Nikula (2018-01-18 15:06:13) > No more sing-a-ling. > > Reported-by: Adam Jackson > Signed-off-by: Jani Nikula You're-my-ding-a-ling-by: Chris Wilson -Chris ___ Intel-gfx

Re: [Intel-gfx] [PATCH v8 6/6] drm/i915: expose rcs topology through query uAPI

On 18/01/18 12:46, Tvrtko Ursulin wrote: On 17/01/2018 15:39, Lionel Landwerlin wrote: With the introduction of asymmetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: expose RCS topology to userspace

== Series Details == Series: drm/i915: expose RCS topology to userspace URL : https://patchwork.freedesktop.org/series/36696/ State : success == Summary == Series 36696v1 drm/i915: expose RCS topology to userspace https://patchwork.freedesktop.org/api/1.0/series/36696/revisions/1/mbox/ Test

[Intel-gfx] [PATCH v2] drm/i915/bios: add DP max link rate to VBT child device struct

Update VBT defs to reflect revision 216. While at it, default the expected child device struct size to sizeof the size rather than a hardcoded value. v2: Fix bit order (David) Cc: Rodrigo Vivi Signed-off-by: Jani Nikula ---

Re: [Intel-gfx] [PATCH v3 7/7] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

On Thu, Jan 18, 2018 at 09:00:50PM +0530, Sharma, Shashank wrote: > Regards > > Shashank > > > On 1/18/2018 7:33 PM, Ville Syrjälä wrote: > > On Thu, Jan 18, 2018 at 11:57:09AM +0530, Sharma, Shashank wrote: > >> Regards > >> > >> Shashank > >> > >> > >> On 1/17/2018 11:57 PM, Ville Syrjälä

Re: [Intel-gfx] [PATCH v9 6/6] drm/i915: expose rcs topology through query uAPI

Quoting Lionel Landwerlin (2018-01-18 15:22:27) > On 18/01/18 15:18, Chris Wilson wrote: > > Quoting Lionel Landwerlin (2018-01-18 14:45:31) > >> +static int query_slice_info(struct drm_i915_private *dev_priv, > >> + struct drm_i915_query_item *query_item) > >> +{ > >> +

[Intel-gfx] ✓ Fi.CI.BAT: success for khungtaskd: Kick stuck processes

== Series Details == Series: khungtaskd: Kick stuck processes URL : https://patchwork.freedesktop.org/series/36677/ State : success == Summary == Series 36677v1 khungtaskd: Kick stuck processes https://patchwork.freedesktop.org/api/1.0/series/36677/revisions/1/mbox/ Test debugfs_test:

Re: [Intel-gfx] [PATCH v6 85/99] btrfs: Remove unused spinlock

On Wed, Jan 17, 2018 at 12:21:49PM -0800, Matthew Wilcox wrote: > From: Matthew Wilcox > > The reada_lock in struct btrfs_device was only initialised, and not > actually used. That's good because there's another lock also called > reada_lock in the btrfs_fs_info that was

Re: [Intel-gfx] [PATCH 15/15] drm/i915: Add NV12 support to intel_framebuffer_init

Op 18-01-18 om 15:21 schreef Maarten Lankhorst: > Op 20-01-18 om 22:45 schreef Vidya Srinivas: >> From: Chandra Konduru >> >> This patch adds NV12 as supported format >> to intel_framebuffer_init and performs various checks. >> >> v2: >> -Fix an issue in checks added

Re: [Intel-gfx] [PATCH v9 6/6] drm/i915: expose rcs topology through query uAPI

On 18/01/18 15:18, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-01-18 14:45:31) +static int query_slice_info(struct drm_i915_private *dev_priv, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu = _INFO(dev_priv)->sseu; +

Re: [Intel-gfx] [PATCH] drm/i915/bios: add DP max link rate to VBT child device struct

On Thu, Jan 18, 2018 at 05:31:45PM +0200, Jani Nikula wrote: > On Thu, 18 Jan 2018, David Weinehall wrote: > > On Thu, Jan 18, 2018 at 05:04:59PM +0200, Jani Nikula wrote: > >> Update VBT defs to reflect revision 216. While at it, default the > >> expected child

Re: [Intel-gfx] [PATCH v8 6/6] drm/i915: expose rcs topology through query uAPI

On 17/01/2018 15:39, Lionel Landwerlin wrote: With the introduction of asymmetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the Gen's GPU topology that doesn't aggregate

[Intel-gfx] [RFC PATCH] igt/core: Initial simple interleaved kmsg filtering

Needs to be beefed up so that dmesg warning (and worse) are re-emmitted as IGT_LOG_WARN. But only if they match one of our filters (which we should probably allow to be extended, e.g. depending upon which driver has been openened). This also requires that we at least parse the basic of kmsg lines

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Avoid waitboosting on the active request (rev3)

== Series Details == Series: drm/i915: Avoid waitboosting on the active request (rev3) URL : https://patchwork.freedesktop.org/series/36453/ State : success == Summary == Series 36453v3 drm/i915: Avoid waitboosting on the active request

Re: [Intel-gfx] [PATCH] drm/i915: vbt defs typo fixes

On Thu, Jan 18, 2018 at 05:06:13PM +0200, Jani Nikula wrote: > No more sing-a-ling. LOL, well spotted. > Reported-by: Adam Jackson > Signed-off-by: Jani Nikula Reviewed-by: David Weinehall > --- >

Re: [Intel-gfx] [PATCH v9 6/6] drm/i915: expose rcs topology through query uAPI

Quoting Lionel Landwerlin (2018-01-18 14:45:31) > +static int query_slice_info(struct drm_i915_private *dev_priv, > + struct drm_i915_query_item *query_item) > +{ > + const struct sseu_dev_info *sseu = _INFO(dev_priv)->sseu; > + struct

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Convert intel_hpd_irq_event() into an encoder hotplug hook

== Series Details == Series: series starting with [1/5] drm/i915: Convert intel_hpd_irq_event() into an encoder hotplug hook URL : https://patchwork.freedesktop.org/series/36645/ State : success == Summary == Test kms_cursor_crc: Subgroup cursor-128x128-suspend: skip

[Intel-gfx] [PATCH] drm/i915/bios: add DP max link rate to VBT child device struct

Update VBT defs to reflect revision 216. While at it, default the expected child device struct size to sizeof the size rather than a hardcoded value. Cc: Rodrigo Vivi Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_bios.c | 8

Re: [Intel-gfx] [PATCH v3 7/7] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

Regards Shashank On 1/18/2018 7:33 PM, Ville Syrjälä wrote: On Thu, Jan 18, 2018 at 11:57:09AM +0530, Sharma, Shashank wrote: Regards Shashank On 1/17/2018 11:57 PM, Ville Syrjälä wrote: On Fri, Jan 05, 2018 at 03:15:35PM +0530, Shashank Sharma wrote: LSPCON chips can generate YCBCR

[Intel-gfx] ✓ Fi.CI.IGT: success for HDCP1.4 implementation enhancement

== Series Details == Series: HDCP1.4 implementation enhancement URL : https://patchwork.freedesktop.org/series/36671/ State : success == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> DMESG-FAIL (shard-hsw) fdo#104218 +1 Test kms_cursor_crc:

[Intel-gfx] [RFC PATCH 1/5] tests/sw_sync: use igt_fork_helper

I'll need to wrap a bit of magic around all the fork() calls in our tests. Simplest way to get there is to roll out the existing helpers, which even saves a bit of boilerplate code. Cc: Robert Foss Signed-off-by: Daniel Vetter ---

[Intel-gfx] [RFC PATCH 2/5] lib/core: make logging pthread vs. fork safe

fork() is a pretty thing in a multithreaded program, it's essentially as bad as handling signals: When we fork the memory snapshot we can interrupts all other threads at any place, including while they're holding mutexes and other fun stuff. libc itself has some internal fork handlers to clear

[Intel-gfx] [RFC PATCH 3/5] lib/core: Don't hide non-debug message when filtering for a debug log domain

I think this is the more sensible semantics, since this allows you to still follow what's going on with the test at a high level, while filtering for a specific (or multiple specific) debug log domains. For non-debug messages log-domains technically exist, but we're not making much use of them

[Intel-gfx] [RFC PATCH 5/5] lib/core: report subtests that hit an igt_warning as WARNING

This is another piece of prep work to push the detection of dmesg warnings into igt itself, so that we can correctly report dmesg issue on a per-subtest basis even when running the entire binary. Signed-off-by: Daniel Vetter --- lib/igt_core.c | 7 ++- 1 file

[Intel-gfx] [RFC PATCH 4/5] igt/core: Initial simple interleaved kmsg filtering

Needs to be beefed up so that dmesg warning (and worse) are re-emmitted as IGT_LOG_WARN. But only if they match one of our filters (which we should probably allow to be extended, e.g. depending upon which driver has been openened). This also requires that we at least parse the basic of kmsg lines

Re: [Intel-gfx] [PATCH] drm/i915/bios: add DP max link rate to VBT child device struct

On Thu, Jan 18, 2018 at 05:04:59PM +0200, Jani Nikula wrote: > Update VBT defs to reflect revision 216. While at it, default the > expected child device struct size to sizeof the size rather than a > hardcoded value. > > Cc: Rodrigo Vivi > Signed-off-by: Jani Nikula

Re: [Intel-gfx] [PATCH] drm/i915/bios: add DP max link rate to VBT child device struct

On Thu, 18 Jan 2018, David Weinehall wrote: > On Thu, Jan 18, 2018 at 05:04:59PM +0200, Jani Nikula wrote: >> Update VBT defs to reflect revision 216. While at it, default the >> expected child device struct size to sizeof the size rather than a >> hardcoded

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: vbt defs typo fixes

== Series Details == Series: drm/i915: vbt defs typo fixes URL : https://patchwork.freedesktop.org/series/36702/ State : success == Summary == Series 36702v1 drm/i915: vbt defs typo fixes https://patchwork.freedesktop.org/api/1.0/series/36702/revisions/1/mbox/ Test kms_chamelium:

Re: [Intel-gfx] [PATCH] drm/i915: vbt defs typo fixes

On Thu, 2018-01-18 at 17:06 +0200, Jani Nikula wrote: > No more sing-a-ling. > > Reported-by: Adam Jackson Why'd you omit the typos I reported in tools/intel_vbt_decode.c ? - ajax ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/guc: Change values for i915_guc_log_control

Quoting Sagar Arun Kamble (2018-01-12 05:53:28) > > > On 1/11/2018 8:54 PM, Michal Wajdeczko wrote: > > Today we have format mismatch between read/write operations > > of i915_guc_log_control entry. For read we return (0, 1..4) > > that represents disable/verbosity levels, but for write we > >

[Intel-gfx] [PATCH] drm/i915/dp: Fix compilation of intel_dp_hdcp_check_link

drivers/gpu/drm/i915/intel_dp.c: In function ‘intel_dp_hdcp_check_link’: drivers/gpu/drm/i915/intel_dp.c:5191:26: error: ?: using integer constants in boolean context [-Werror=int-in-bool-context] return ret >= 0 ? -EIO : ret; Fixes: 20f24d776d1b ("drm/i915: Implement HDCP for DisplayPort")

Re: [Intel-gfx] [PATCH v6 00/99] XArray version 6

On Thu, Jan 18, 2018 at 05:56:12PM +0100, David Sterba wrote: > On Thu, Jan 18, 2018 at 08:48:43AM -0800, Matthew Wilcox wrote: > > Thank you! I shall attempt to debug. Was this with a btrfs root > > filesystem? I'm most suspicious of those patches right now, since they've > > received next to

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/bios: add DP max link rate to VBT child device struct (rev2)

== Series Details == Series: drm/i915/bios: add DP max link rate to VBT child device struct (rev2) URL : https://patchwork.freedesktop.org/series/36701/ State : success == Summary == Series 36701v2 drm/i915/bios: add DP max link rate to VBT child device struct

Re: [Intel-gfx] [PATCH] drm/i915/dp: Fix compilation of intel_dp_hdcp_check_link

On Thu, Jan 18, 2018 at 04:10:25PM +, Chris Wilson wrote: > drivers/gpu/drm/i915/intel_dp.c: In function ‘intel_dp_hdcp_check_link’: > drivers/gpu/drm/i915/intel_dp.c:5191:26: error: ?: using integer constants in > boolean context [-Werror=int-in-bool-context] >return ret >= 0 ? -EIO :

Re: [Intel-gfx] [PATCH v3 7/7] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

Regards Shashank On 1/18/2018 9:05 PM, Ville Syrjälä wrote: On Thu, Jan 18, 2018 at 09:00:50PM +0530, Sharma, Shashank wrote: Regards Shashank On 1/18/2018 7:33 PM, Ville Syrjälä wrote: On Thu, Jan 18, 2018 at 11:57:09AM +0530, Sharma, Shashank wrote: Regards Shashank On 1/17/2018

Re: [Intel-gfx] [PATCH v9 6/6] drm/i915: expose rcs topology through query uAPI

On 18/01/18 15:36, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-01-18 15:22:27) On 18/01/18 15:18, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-01-18 14:45:31) +static int query_slice_info(struct drm_i915_private *dev_priv, + struct drm_i915_query_item

Re: [Intel-gfx] [PATCH v3 7/7] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

Regards Shashank On 1/18/2018 3:00 PM, Maarten Lankhorst wrote: Op 18-01-18 om 07:27 schreef Sharma, Shashank: Regards Shashank On 1/17/2018 11:57 PM, Ville Syrjälä wrote: On Fri, Jan 05, 2018 at 03:15:35PM +0530, Shashank Sharma wrote: LSPCON chips can generate YCBCR outputs, if asked

Re: [Intel-gfx] [PATCH v6 00/99] XArray version 6

On Thu, Jan 18, 2018 at 08:48:43AM -0800, Matthew Wilcox wrote: > Thank you! I shall attempt to debug. Was this with a btrfs root > filesystem? I'm most suspicious of those patches right now, since they've > received next to no testing. I'm going to put together a smaller patchset > which just

Re: [Intel-gfx] [PATCH] intel: Future-proof ring names for aubinator_error_decode

Quoting Michel Thierry (2018-01-18 16:44:18) > On 1/17/2018 7:47 AM, Chris Wilson wrote: > > The kernel is moving to a $class$instance naming scheme in preparation > > for accommodating more rings in the future in a consistent manner. It is > > already using the naming scheme internally, and now

Re: [Intel-gfx] [PATCH v6 20/99] ida: Convert to XArray

Hi Matthew! On 01/17/2018 09:20 PM, Matthew Wilcox wrote: > Use the xarray infrstructure like we used the radix tree infrastructure. > This lets us get rid of idr_get_free() from the radix tree code. There's a typo: infrstructure => infratructure Cheers, Adrian -- .''`. John Paul Adrian

[Intel-gfx] [PULL] drm-misc-next-fixes

Hi Dave, A few fixes for 4.16. Please pull. Thanks. drm-misc-next-fixes-2018-01-18: Fixes for 4.16: Fixes one Kconfig issue and a enable some panels to work properly. There is also a fix of error code return in sun4i. The following changes since commit a1c55bccf6004ec9fbcf892328f9658767aa22bb:

Re: [Intel-gfx] [PATCH v6 00/99] XArray version 6

On Wed, Jan 17, 2018 at 12:20:24PM -0800, Matthew Wilcox wrote: > From: Matthew Wilcox > > This version of the XArray has no known bugs. I've booted this patchset on 2 boxes, both had random problems during boot. On one I was not able to diagnose what went wrong. On the

Re: [Intel-gfx] [PATCH] intel: Future-proof ring names for aubinator_error_decode

On 1/17/2018 7:47 AM, Chris Wilson wrote: The kernel is moving to a $class$instance naming scheme in preparation for accommodating more rings in the future in a consistent manner. It is already using the naming scheme internally, and now we are looking at updating some soft-ABI such as the error

Re: [Intel-gfx] [PATCH v6 00/99] XArray version 6

On Thu, Jan 18, 2018 at 05:07:50PM +0100, David Sterba wrote: > On Wed, Jan 17, 2018 at 12:20:24PM -0800, Matthew Wilcox wrote: > > From: Matthew Wilcox > > > > This version of the XArray has no known bugs. > > I've booted this patchset on 2 boxes, both had random

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Avoid waitboosting on the active request (rev3)

== Series Details == Series: drm/i915: Avoid waitboosting on the active request (rev3) URL : https://patchwork.freedesktop.org/series/36453/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: pass -> FAIL

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Avoid waitboosting on the active request (rev3)

Quoting Patchwork (2018-01-18 16:56:55) > == Series Details == > > Series: drm/i915: Avoid waitboosting on the active request (rev3) > URL : https://patchwork.freedesktop.org/series/36453/ > State : success > > == Summary == > > Test kms_frontbuffer_tracking: > Subgroup

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/guc: Change values for i915_guc_log_control

Quoting Chris Wilson (2018-01-18 17:21:57) > Quoting Sagar Arun Kamble (2018-01-12 05:53:28) > > > > > > On 1/11/2018 8:54 PM, Michal Wajdeczko wrote: > > > Today we have format mismatch between read/write operations > > > of i915_guc_log_control entry. For read we return (0, 1..4) > > > that

Re: [Intel-gfx] [PATCH 09/10] drm/i915: Only signal from interrupt when requested

Quoting Tvrtko Ursulin (2018-01-17 12:22:33) > > On 15/01/2018 21:24, Chris Wilson wrote: > > Avoid calling dma_fence_signal() from inside the interrupt if we haven't > > enabled signaling on the request. > > > > Signed-off-by: Chris Wilson > > --- > >

Re: [Intel-gfx] [PATCH 07/10] drm/i915: Reduce spinlock hold time during notify_ring() interrupt

Quoting Tvrtko Ursulin (2018-01-17 10:45:16) > > On 15/01/2018 21:24, Chris Wilson wrote: > > By taking advantage of the RCU protection of the task struct, we can find > > the appropriate signaler under the spinlock and then release the spinlock > > before waking the task and signaling the fence.

Re: [Intel-gfx] [PATCH v2] drm/i915: Use the engine name directly in the error_state file

Quoting Michel Thierry (2018-01-10 01:21:51) > Instead of using local string names that we will have to keep > maintaining, use the engine->name directly. > > v2: Better invalid engine_id handling, capture_bo will not be able know > the engine_id and end up with -1 (Michal). > > Suggested-by:

[Intel-gfx] [RFC] perf: Allow fine-grained PMU access control

From: Tvrtko Ursulin For situations where sysadmins might want to allow different level of of access control for different PMUs, we start creating per-PMU perf_event_paranoid controls in sysfs. These work in equivalent fashion as the existing perf_event_paranoid

Re: [Intel-gfx] [PATCH 07/10] drm/i915: Reduce spinlock hold time during notify_ring() interrupt

Quoting Tvrtko Ursulin (2018-01-17 10:45:16) > > On 15/01/2018 21:24, Chris Wilson wrote: > > - if (wakeup) > > - wake_up_process(wait->tsk); > > + tsk = wait->tsk; > > + } else { > > + if

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: expose RCS topology to userspace

== Series Details == Series: drm/i915: expose RCS topology to userspace URL : https://patchwork.freedesktop.org/series/36696/ State : failure == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: pass -> FAIL (shard-snb)

[Intel-gfx] [CI] drm/i915: Use the engine name directly in the error_state file

From: Michel Thierry Instead of using local string names that we will have to keep maintaining, use the engine->name directly. v2: Better invalid engine_id handling, capture_bo will not be able know the engine_id and end up with -1 (Michal). Suggested-by: Michal

Re: [Intel-gfx] [PATCH v2] drm/i915: Shrink the GEM kmem_caches upon idling

Quoting Tvrtko Ursulin (2018-01-17 10:18:38) > > On 16/01/2018 17:36, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-01-16 17:25:25) > >> > >> On 16/01/2018 15:21, Chris Wilson wrote: > >>> Quoting Tvrtko Ursulin (2018-01-16 15:12:43) > > On 16/01/2018 13:05, Chris Wilson wrote: >

Re: [Intel-gfx] [PULL] gvt-next fixes for 4.16

On Thu, Jan 18, 2018 at 02:23:13AM +, Zhenyu Wang wrote: > On 2018.01.17 08:03:49 -0800, Rodrigo Vivi wrote: > > > > > > Zhenyu Wang (2): > > > drm/i915/gvt: cancel virtual vblank timer when no vGPU exists > > > drm/i915/gvt: cancel scheduler timer when no vGPU exists > > > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use the engine name directly in the error_state file (rev3)

== Series Details == Series: drm/i915: Use the engine name directly in the error_state file (rev3) URL : https://patchwork.freedesktop.org/series/36215/ State : success == Summary == Series 36215v3 drm/i915: Use the engine name directly in the error_state file

[Intel-gfx] ✓ Fi.CI.BAT: success for perf: Allow fine-grained PMU access control

== Series Details == Series: perf: Allow fine-grained PMU access control URL : https://patchwork.freedesktop.org/series/36723/ State : success == Summary == Series 36723v1 perf: Allow fine-grained PMU access control https://patchwork.freedesktop.org/api/1.0/series/36723/revisions/1/mbox/

Re: [Intel-gfx] [PATCH v2] drm/i915/bios: add DP max link rate to VBT child device struct

On Thu, Jan 18, 2018 at 03:33:10PM +, Jani Nikula wrote: > Update VBT defs to reflect revision 216. While at it, default the > expected child device struct size to sizeof the size rather than a > hardcoded value. > > v2: Fix bit order (David) > > Cc: Rodrigo Vivi >

Re: [Intel-gfx] [PATCH] drm/i915/cnl: apply Display WA #1178 to fix type C dongles

On Tue, Nov 28, 2017 at 10:05:53PM +, Lucas De Marchi wrote: > Display WA #1178 is meant to fix Aux channel voltage swing too low with > some type C dongles. Although it is for type C, HW engineers reported > that it can be applied to all external ports even if they are not going > to type C.

Re: [Intel-gfx] [PATCH] drm/i915/cnl: apply Display WA #1178 to fix type C dongles

On Thu, Jan 18, 2018 at 07:39:51PM +, Rodrigo Vivi wrote: > On Tue, Nov 28, 2017 at 10:05:53PM +, Lucas De Marchi wrote: > > Display WA #1178 is meant to fix Aux channel voltage swing too low with > > some type C dongles. Although it is for type C, HW engineers reported > > that it can be

Re: [Intel-gfx] [PATCH v2] drm/i915/bios: add DP max link rate to VBT child device struct

On Thu, Jan 18, 2018 at 08:12:18PM +, Rodrigo Vivi wrote: > On Thu, Jan 18, 2018 at 03:33:10PM +, Jani Nikula wrote: > > Update VBT defs to reflect revision 216. While at it, default the > > expected child device struct size to sizeof the size rather than a > > hardcoded value. > > > >

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: vbt defs typo fixes

== Series Details == Series: drm/i915: vbt defs typo fixes URL : https://patchwork.freedesktop.org/series/36702/ State : warning == Summary == Warning: bzip Patchwork_7711/shard-hsw6/results34.json.bz2 wasn't in correct JSON format Test kms_flip: Subgroup

[Intel-gfx] [CI] drm/i915: Avoid waitboosting on the active request

Watching a light workload on Baytrail (running glxgears and a 1080p decode), instead of the system remaining at low frequency, the glxgears would regularly trigger waitboosting after which it would have to spend a few seconds throttling back down. In this case, the waitboosting is counter

Re: [Intel-gfx] [PATCH v3 7/7] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

On Thu, Jan 18, 2018 at 11:57:09AM +0530, Sharma, Shashank wrote: > Regards > > Shashank > > > On 1/17/2018 11:57 PM, Ville Syrjälä wrote: > > On Fri, Jan 05, 2018 at 03:15:35PM +0530, Shashank Sharma wrote: > >> LSPCON chips can generate YCBCR outputs, if asked nicely :). > >> > >> In order to

Re: [Intel-gfx] [PATCH v8 5/6] drm/i915: add query uAPI

On 17/01/2018 15:39, Lionel Landwerlin wrote: There are a number of information that are readable from hardware registers and that we would like to make accessible to userspace. One particular example is the topology of the execution units (how are execution units grouped in subslices and

Re: [Intel-gfx] [PATCH v8 6/6] drm/i915: expose rcs topology through query uAPI

On 18/01/2018 13:04, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-18 12:46:55) On 17/01/2018 15:39, Lionel Landwerlin wrote: + + if (query_item->length == 0) + return total_length; + + if (query_item->length < total_length) + return -EINVAL; Did we

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: Fix compilation of intel_dp_hdcp_check_link

== Series Details == Series: drm/i915/dp: Fix compilation of intel_dp_hdcp_check_link URL : https://patchwork.freedesktop.org/series/36707/ State : failure == Summary == Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: pass -> SKIP

[Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc-fixes tree

Hi all, Commit 8a510a5c7526 ("drm/vmwgfx: fix memory corruption with legacy/sou connectors") is missing a Signed-off-by from its committer. -- Cheers, Stephen Rothwell ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/bios: add DP max link rate to VBT child device struct (rev2)

== Series Details == Series: drm/i915/bios: add DP max link rate to VBT child device struct (rev2) URL : https://patchwork.freedesktop.org/series/36701/ State : failure == Summary == Warning: bzip Patchwork_7712/shard-hsw1/results34.json.bz2 wasn't in correct JSON format Test perf:

Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc-fixes tree

Hi Thomas, On Thu, 18 Jan 2018 22:18:48 +0100 Thomas Hellstrom wrote: > > That would be me. > I've historically only added my signed-off-by:s on commits I've (co-) > authored myself, as the committer info is already registered, > > But I take it that's not the correct

Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc-fixes tree

Hi, Stephen, That would be me. I've historically only added my signed-off-by:s on commits I've (co-) authored myself, as the committer info is already registered, But I take it that's not the correct approach? /Thomas On 01/18/2018 09:23 PM, Stephen Rothwell wrote: Hi all, Commit

[Intel-gfx] [PATCH v7 6/6] HAX Enable GuC Submission for CI

Signed-off-by: Jackie Li --- drivers/gpu/drm/i915/i915_gem_gtt.c| 4 ++-- drivers/gpu/drm/i915/i915_params.c | 2 +- drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/intel_guc_wopcm.c | 6 ++ 4 files changed, 10 insertions(+), 4 deletions(-)

[Intel-gfx] ✗ Fi.CI.IGT: warning for perf: Allow fine-grained PMU access control

== Series Details == Series: perf: Allow fine-grained PMU access control URL : https://patchwork.freedesktop.org/series/36723/ State : warning == Summary == Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: pass -> SKIP (shard-hsw) fdo#103540

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Use the engine name directly in the error_state file (rev3)

== Series Details == Series: drm/i915: Use the engine name directly in the error_state file (rev3) URL : https://patchwork.freedesktop.org/series/36215/ State : warning == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-2p-scndscrn-pri-shrfb-draw-mmap-cpu: pass

Re: [Intel-gfx] [RFC v2 6/8] drm: Handle fbdev emulation in core

[oops, this was stuck in my draft folder, sry] On Thu, Jan 11, 2018 at 3:09 PM, Noralf Trønnes wrote: > > Den 11.01.2018 08.45, skrev Daniel Vetter: >> >> On Wed, Jan 10, 2018 at 06:02:38PM +0100, Noralf Trønnes wrote: >>> >>> Den 09.01.2018 11.38, skrev Daniel Vetter:

[Intel-gfx] [PATCH v7 1/6] drm/i915/guc: Move GuC WOPCM related code into separate files

intel_guc_reg.h should only include definition for GuC registers and related register bits. GuC WOPCM related values should not be defined in intel_guc_reg.h This patch creates a better file structure by moving GuC WOPCM related definitions int to a new header intel_guc_wopcm.h and moving GuC

[Intel-gfx] [PATCH v7 2/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset

GuC related exported functions should start with "intel_guc_" prefix and pass intel_guc as the first parameter since its guc related. Current guc_ggtt_offset() failed to follow this code convention. This patch renames the guc_ggtt_offset to intel_guc_ggtt_offset and updates the related code to

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Nuke intel_dp->channel_eq_status

On Wed, Jan 17, 2018 at 07:21:48PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > intel_dp->channel_eq_status is used in exactly one function, and we > don't need it to persist between calls. So just go back to using a > local variable instead. > >

[Intel-gfx] [PATCH v7 3/6] drm/i915/guc: Implement dynamic GuC WOPCM offset and size

Hardware may have specific restrictions on GuC WOPCM size versus HuC firmware size. With static GuC WOPCM size, there's no way to adjust the GuC WOPCM partition size based on the actual HuC firmware size, so that GuC/HuC loading failure would occur even if there was enough WOPCM space for both GuC

Re: [Intel-gfx] [PATCH 1/5] drm/vblank: Fix return type for drm_vblank_count()

ping for review. Let me know if there's anything that needs to be done, thanks! On Fri, 2018-01-12 at 13:57 -0800, Dhinakaran Pandiyan wrote: > drm_vblank_count() has a u32 type returning what is a 64-bit vblank count. > The effect of this is when drm_wait_vblank_ioctl() tries to widen the user

[Intel-gfx] [PATCH v7 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers

GuC WOPCM registers are write-once registers. Current driver code accesses these registers without checking the accessibility to these registers, this will lead unpredictable driver behaviors if these registers were touch by other components (such as faulty BIOS code). This patch moves the GuC

[Intel-gfx] [PATCH v7 4/6] drm/i915/guc: Add WOPCM partitioning support for CNL

CNL has different WOPCM size and hardware restriction on GuC WOPCM size. This patch returns the correct WOPCM reserved size on CNL and adds the GuC WOPCM size check for CNL. v6: - Extended HuC FW size check against GuC WOPCM size to all Gen9 and CNL A0 platforms v7: - Fixed patch format

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Estimate and update missed vblanks.

On Fri, Jan 12, 2018 at 09:57:07PM +, Dhinakaran Pandiyan wrote: > The frame counter may have got reset between disabling and enabling vblank > interrupts due to DMC putting the hardware to DC5/6 state if PSR was > active. The frame counter also could have stalled if PSR is active in cases >

Re: [Intel-gfx] [PATCH 2/5] drm/vblank: Fix data type width for drm_crtc_arm_vblank_event()

On Fri, Jan 12, 2018 at 09:57:04PM +, Dhinakaran Pandiyan wrote: > Now that drm_vblank_count() returns all bits of the vblank count, update > drm_crtc_arm_vblank_event() so that it queues the correct sequence. > Otherwise, this leads to prolonged waits for a vblank sequence when the > current

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v7,1/6] drm/i915/guc: Move GuC WOPCM related code into separate files

== Series Details == Series: series starting with [v7,1/6] drm/i915/guc: Move GuC WOPCM related code into separate files URL : https://patchwork.freedesktop.org/series/36748/ State : failure == Summary == Series 36748v1 series starting with [v7,1/6] drm/i915/guc: Move GuC WOPCM related code

Re: [Intel-gfx] [PATCH 1/5] drm/vblank: Fix return type for drm_vblank_count()

On Fri, Jan 12, 2018 at 09:57:03PM +, Dhinakaran Pandiyan wrote: > drm_vblank_count() has a u32 type returning what is a 64-bit vblank count. > The effect of this is when drm_wait_vblank_ioctl() tries to widen the user > space requested vblank sequence using this clipped 32-bit count(when the

Re: [Intel-gfx] [PATCH 2/4] drm/i915: II stage HDCP auth for repeater only

On Thu, Jan 18, 2018 at 7:50 PM, C, Ramalingam wrote: >> -Original Message- >> From: Sean Paul [mailto:seanp...@chromium.org] >> Sent: Friday, January 19, 2018 3:54 AM >> To: C, Ramalingam >> Cc: intel-gfx@lists.freedesktop.org;

Re: [Intel-gfx] [PATCH 2/4] drm/i915: II stage HDCP auth for repeater only

On Thu, Jan 18, 2018 at 11:18:06AM +0530, Ramalingam C wrote: > Second stage of HDCP authentication required only if the HDCP > sink is a repeater. > > This patch imposes above condition on second stage HDCP authentication. Hi Ram, This is already enforced in intel_hdcp_auth_downstream()

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