On 4/9/2018 5:53 PM, Michal Wajdeczko wrote:
We have i915_gem_init_hw function that on failure requires some
cleanup in uC and then in other places we were trying to do
such cleanup directly. Let's fix that by adding i915_gem_fini_hw
for nice symmetry with init_hw and call it on cleanup paths.
From: Tvrtko Ursulin
Keep a per-engine number of runnable (waiting for GPU time) requests.
We choose to mange the runnable counter at the backend level instead of at
the request submit_notify callback. The latter would be more consolidated
and less code, but it would
From: Tvrtko Ursulin
Keep a count of requests submitted from userspace and not yet runnable due
unresolved dependencies.
v2: Rename and move under the container struct. (Chris Wilson)
v3: Rebase.
v4: Move decrement site to the backend to shrink the window of double-
From: Tvrtko Ursulin
As well as exposing active requests on engines via PMU, we can also export
the current raw values (as tracked by i915 command submission) via a
dedicated query.
This is to satisfy customers who have userspace load balancing solutions
implemented on
== Series Details ==
Series: drm/i915: Enable display workaround 827 for all planes, v2.
URL : https://patchwork.freedesktop.org/series/41371/
State : success
== Summary ==
Series 41371v1 drm/i915: Enable display workaround 827 for all planes, v2.
On 4/9/2018 5:53 PM, Michal Wajdeczko wrote:
By calling i915_gem_init_hw in i915_gem_resume and not calling
i915_gem_fini_hw in i915_gem_suspend we introduced asymmetry
in init_hw/fini_hw calls. Let's fix that.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
On 4/9/2018 5:53 PM, Michal Wajdeczko wrote:
As we always call intel_uc_sanitize after every call to
intel_uc_fini_hw we may drop redundant call and sanitize
uC from the fini_hw function.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
== Series Details ==
Series: drm/i915/guc: Check that the breadcrumb irq is enabled
URL : https://patchwork.freedesktop.org/series/41368/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup 2x-wf_vblank-ts-check:
fail -> PASS
On 4/9/2018 5:53 PM, Michal Wajdeczko wrote:
We should keep i915_gem_init/fini functions together for easier
tracking of their symmetry.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Cc: Chris Wilson
== Series Details ==
Series: drm/i915: Enable display workaround 827 for all planes, v2.
URL : https://patchwork.freedesktop.org/series/41371/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b8f0788dfd3f drm/i915: Enable display workaround 827 for all planes, v2.
-:58:
== Series Details ==
Series: series starting with [v8,01/12] drm/i915: Park before resetting the
submission backend
URL : https://patchwork.freedesktop.org/series/41365/
State : failure
== Summary ==
Possible new issues:
Test drm_mm:
Subgroup sanitycheck:
pass
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_pmu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index
From: Tvrtko Ursulin
Back to a clean build with no warnings, at least for me.
Signed-off-by: Tvrtko Ursulin
Cc: Jordan Justen
Cc: Scott D Phillips
---
tools/aubdump.c | 7 ---
1
On Mon, 09 Apr 2018 17:09:18 +0200, Patchwork
wrote:
== Series Details ==
Series: series starting with [v8,01/12] drm/i915: Park before resetting
the submission backend
URL : https://patchwork.freedesktop.org/series/41365/
State : failure
== Summary
== Series Details ==
Series: drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout
URL : https://patchwork.freedesktop.org/series/41366/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup 2x-wf_vblank-ts-check:
fail -> PASS
== Series Details ==
Series: series starting with [1/4] drm/i915: Change use get_new_plane_state
instead of existing plane state
URL : https://patchwork.freedesktop.org/series/41370/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup flip-vs-absolute-wf_vblank:
Tvrtko Ursulin writes:
> From: Tvrtko Ursulin
>
> Back to a clean build with no warnings, at least for me.
Why c90? If that's the language we mean to target then we should
probably add it to the build system so people with gcc 5.1 and later
will
== Series Details ==
Series: Queued/runnable/running engine stats (rev7)
URL : https://patchwork.freedesktop.org/series/36926/
State : failure
== Summary ==
Series 36926v7 Queued/runnable/running engine stats
https://patchwork.freedesktop.org/api/1.0/series/36926/revisions/7/mbox/
On Mon, Apr 09, 2018 at 12:48:15PM +0300, Jani Nikula wrote:
> On Fri, 23 Mar 2018, Timo Aaltonen wrote:
> > On 30.01.2018 00:12, Rodrigo Vivi wrote:
> >> On Mon, Jan 29, 2018 at 05:42:53AM +, Kai Heng Feng wrote:
> >>>
> On 26 Jan 2018, at 6:25 AM, Rodrigo Vivi
On Mon, Apr 09, 2018 at 05:07:31PM +0300, Jani Nikula wrote:
> On Sun, 08 Apr 2018, Gaurav K Singh wrote:
> > On Geminilake, sometimes audio card is not getting
> > detected after reboot. This is a spurious issue happening on
> > Geminilake. HW codec and HD audio
Our execlists emulation for GuC requires use of the breadcrumb following
every request as a simulcrum for the context-switch interrupt, which we
then use to drive the submission tasklet. Therefore, when we unpark the
engine for use with the GuC, we pin the breadcrumb interrupt to keep it
enabled
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index c96360398072..53037b5eff22 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++
Quoting Oscar Mateo (2018-04-06 23:24:57)
> Inherit workarounds from previous platforms that are still valid for
> Icelake.
Speaking of the workarounds, where do we stand with at least landing the
split out of init_workarounds_ring()?
Rebuilding the invariant wa_regs[] on every reset is
On Mon, Apr 09, 2018 at 05:12:03PM +0300, Jani Nikula wrote:
> On Thu, 05 Apr 2018, Manasi Navare wrote:
> > On Thu, Apr 05, 2018 at 05:39:04PM +0300, Jani Nikula wrote:
> >> For now, there's just the one link config selection, optimizing for slow
> >> and wide link. No
On 4/9/2018 12:10 PM, Rodrigo Vivi wrote:
On Mon, Apr 09, 2018 at 05:07:31PM +0300, Jani Nikula wrote:
On Sun, 08 Apr 2018, Gaurav K Singh wrote:
On Geminilake, sometimes audio card is not getting
detected after reboot. This is a spurious issue happening on
On Sat, Apr 07, 2018 at 10:05:25AM +0100, Chris Wilson wrote:
> Quoting Rodrigo Vivi (2018-04-06 23:18:16)
> > On Fri, Apr 06, 2018 at 11:12:27AM -0700, Souza, Jose wrote:
> > > On Thu, 2018-04-05 at 12:49 +0100, Chris Wilson wrote:
> > > > + struct drm_crtc *crtc =
> > > > +
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq
is enabled
URL : https://patchwork.freedesktop.org/series/41396/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2fc2ed95e6cd drm/i915/guc: Check that the breadcrumb irq is
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq
is enabled
URL : https://patchwork.freedesktop.org/series/41396/
State : success
== Summary ==
Series 41396v1 series starting with [1/2] drm/i915/guc: Check that the
breadcrumb irq is enabled
== Series Details ==
Series: drm/i915/pmu: check runtime resume vs pmu race
URL : https://patchwork.freedesktop.org/series/41380/
State : warning
== Summary ==
Possible new issues:
Test perf_pmu:
Subgroup rc6-runtime-pm:
pass -> DMESG-WARN (shard-apl)
On 4/9/2018 12:53 PM, Chris Wilson wrote:
Quoting Oscar Mateo (2018-04-06 23:24:57)
Inherit workarounds from previous platforms that are still valid for
Icelake.
Speaking of the workarounds, where do we stand with at least landing the
split out of init_workarounds_ring()?
Rebuilding the
On 4/9/2018 3:33 AM, Ville Syrjälä wrote:
On Fri, Apr 06, 2018 at 04:47:08PM +0300, Jani Nikula wrote:
On Thu, 05 Apr 2018, Abhay Kumar wrote:
In glk when device boots with 1366x768 panel, HDA codec doesn't comeup.
This result in no audio forever as cdclk is < 96Mhz.
On Mon, 2018-04-09 at 12:18 -0700, Kumar, Abhay wrote:
>
> On 4/9/2018 12:10 PM, Rodrigo Vivi wrote:
> > On Mon, Apr 09, 2018 at 05:07:31PM +0300, Jani Nikula wrote:
> >> On Sun, 08 Apr 2018, Gaurav K Singh wrote:
> >>> On Geminilake, sometimes audio card is not
On 4/9/2018 4:20 PM, Pandiyan, Dhinakaran wrote:
On Mon, 2018-04-09 at 12:18 -0700, Kumar, Abhay wrote:
On 4/9/2018 12:10 PM, Rodrigo Vivi wrote:
On Mon, Apr 09, 2018 at 05:07:31PM +0300, Jani Nikula wrote:
On Sun, 08 Apr 2018, Gaurav K Singh wrote:
On
On Wed, Mar 28, 2018 at 02:57:58PM -0700, Paulo Zanoni wrote:
> This commit introduces the definitions for the ICL clocks and adds the
> basic functions to the shared DPLL framework. It adds code for the
> Enable and Disable sequences for some PLLs, but it does not have the
> code to compute the
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq
is enabled
URL : https://patchwork.freedesktop.org/series/41396/
State : failure
== Summary ==
Possible new issues:
Test gem_eio:
Subgroup execbuf:
pass ->
After enabled the WOPCM write-once registers locking status checking,
reloading of the i915 module will fail with modparam enable_guc set to 3
(enable GuC and HuC firmware loading) if the module was originally loaded
with enable_guc set to 1 (only enable GuC firmware loading). This is
because
Signed-off-by: Jackie Li
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index c963603..53037b5 100644
---
The enable_guc modparam is used to enable/disable GuC/HuC FW uploading
dynamcially during i915 module loading. If WOPCM offset register was locked
without having HUC_LOADING_AGENT_GUC bit set to 1, the module reloading
with both GuC and HuC FW will fail since we need to set this bit to 1 for
HuC
In current code, we only compare the locked WOPCM register values with the
calculated values. However, we can continue loading GuC/HuC firmware if the
locked (or partially locked) values were valid for current GuC/HuC firmware
sizes.
This patch added a new code path to verify whether the locked
== Series Details ==
Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on
hsw (rev3)
URL : https://patchwork.freedesktop.org/series/41095/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0a22dbbae8f8 drm/i915: Enable edp psr error interrupts on hsw
== Series Details ==
Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on
hsw (rev3)
URL : https://patchwork.freedesktop.org/series/41095/
State : success
== Summary ==
Series 41095v3 series starting with [v4] drm/i915: Enable edp psr error
interrupts on hsw
== Series Details ==
Series: series starting with [v3,1/4] drm/i915: Always do WOPCM partitioning
based on real firmware sizes
URL : https://patchwork.freedesktop.org/series/41409/
State : success
== Summary ==
Series 41409v1 series starting with [v3,1/4] drm/i915: Always do WOPCM
== Series Details ==
Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on
hsw (rev3)
URL : https://patchwork.freedesktop.org/series/41095/
State : success
== Summary ==
Possible new issues:
Test kms_cursor_legacy:
Subgroup pipe-c-torture-move:
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Monday, April 9, 2018 5:15 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Cc: Kamath, Sunil
> Subject: Re: [Intel-gfx]
== Series Details ==
Series: series starting with [v3,1/4] drm/i915: Always do WOPCM partitioning
based on real firmware sizes
URL : https://patchwork.freedesktop.org/series/41409/
State : failure
== Summary ==
Possible new issues:
Test gem_eio:
Subgroup execbuf:
On Wed, Mar 28, 2018 at 06:20:26PM +0200, Maarten Lankhorst wrote:
> Op 28-03-18 om 12:21 schreef Jani Nikula:
> > On Wed, 28 Mar 2018, Maarten Lankhorst
> > wrote:
> >> Adding a i915_fifo_underrun_reset debugfs file will make it possible
> >> for IGT tests to
On Fri, 2018-04-06 at 18:40 -0700, Dhinakaran Pandiyan wrote:
>
>
> On Sat, 2018-04-07 at 00:49 +, Souza, Jose wrote:
> > On Fri, 2018-04-06 at 16:36 -0700, José Roberto de Souza wrote:
> > > On Mon, 2018-04-02 at 15:38 -0700, Pandiyan, Dhinakaran wrote:
> > > > On Mon, 2018-04-02 at 13:51
== Series Details ==
Series: drm/i915: Enable display workaround 827 for all planes, v2.
URL : https://patchwork.freedesktop.org/series/41371/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup 2x-flip-vs-expired-vblank-interruptible:
fail
Quoting Michal Wajdeczko (2018-04-09 15:08:40)
> On Mon, 09 Apr 2018 14:42:19 +0200, Chris Wilson
> wrote:
>
> > Our execlists emulation for GuC requires use of the breadcrumb following
> > every request as a simulcrum for the context-switch interrupt, which we
> >
== Series Details ==
Series: drm/i915/pmu: check runtime resume vs pmu race
URL : https://patchwork.freedesktop.org/series/41380/
State : success
== Summary ==
Series 41380v1 drm/i915/pmu: check runtime resume vs pmu race
On Mon, Apr 09, 2018 at 04:21:23PM +0200, Maarten Lankhorst wrote:
> The workaround was applied only to the primary plane, but is required
> on all planes. Iterate over all planes in the crtc atomic check to see
> if the workaround is enabled, and only perform the actual toggling in
> the pre/post
On 4/9/2018 9:02 PM, Michal Wajdeczko wrote:
On Mon, 09 Apr 2018 17:09:18 +0200, Patchwork
wrote:
== Series Details ==
Series: series starting with [v8,01/12] drm/i915: Park before
resetting the submission backend
URL :
Op 09-04-18 om 10:57 schreef Srinivas, Vidya:
>
>> -Original Message-
>> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
>> Sent: Monday, April 9, 2018 2:04 PM
>> To: Srinivas, Vidya ; intel-
>> g...@lists.freedesktop.org
>> Subject: Re:
Quoting Tvrtko Ursulin (2018-04-09 10:11:53)
>
> On 06/04/2018 21:17, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-04-05 13:39:19)
> >> From: Tvrtko Ursulin
> >>
> >> Keep a count of requests submitted from userspace and not yet runnable due
> >> unresolved
On Fri, 23 Mar 2018, Timo Aaltonen wrote:
> On 30.01.2018 00:12, Rodrigo Vivi wrote:
>> On Mon, Jan 29, 2018 at 05:42:53AM +, Kai Heng Feng wrote:
>>>
On 26 Jan 2018, at 6:25 AM, Rodrigo Vivi wrote:
If the table result is out of
As different backends may have different park/unpark callbacks, we
should only ever switch backends (reset_default_submission on wedge
recovery, or on enabling the guc) while parked.
v2: Remove the assert from the guc code, as we are currently trying to
modify the engine vfuncs pointer on a live
On 09/04/2018 10:25, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-04-09 10:11:53)
On 06/04/2018 21:17, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-04-05 13:39:19)
From: Tvrtko Ursulin
Keep a count of requests submitted from userspace and not yet runnable
On 06/04/2018 21:17, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-04-05 13:39:19)
From: Tvrtko Ursulin
Keep a count of requests submitted from userspace and not yet runnable due
unresolved dependencies.
v2: Rename and move under the container struct. (Chris
On 06/04/2018 21:24, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-04-05 13:39:22)
From: Tvrtko Ursulin
We add a PMU counter to expose the number of requests currently executing
on the GPU.
This is useful to analyze the overall load of the system.
v2:
*
== Series Details ==
Series: drm/i915: Silence debugging DRM_ERROR for failing to suspend vlv
powerwells
URL : https://patchwork.freedesktop.org/series/41350/
State : success
== Summary ==
Series 41350v1 drm/i915: Silence debugging DRM_ERROR for failing to suspend vlv
powerwells
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Monday, April 9, 2018 2:38 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Cc: Kamath, Sunil
> Subject: Re: [Intel-gfx]
If we try to suspend a wedged device following a GPU reset failure, we
will also fail to turn off the rc6 powerwells (on vlv), leading to a
*ERROR*. This is quite expected in this case, so the best we can do is
shake our heads and reduce the *ERROR* to a debug so CI stops
complaining.
Testcase:
Quoting Chris Wilson (2018-04-09 10:49:05)
> If we try to suspend a wedged device following a GPU reset failure, we
> will also fail to turn off the rc6 powerwells (on vlv), leading to a
> *ERROR*. This is quite expected in this case, so the best we can do is
> shake our heads and reduce the
Quoting Tvrtko Ursulin (2018-04-09 11:17:04)
>
> On 09/04/2018 10:25, Chris Wilson wrote:
> > Downside being that we either then use atomic64 throughout or we mix
> > atomic32/atomic64 knowing that we're on x86. (I feel like someone else
> > must have solved this problem in a much neater way,
Quoting Chris Wilson (2018-04-09 11:27:17)
> Quoting Tvrtko Ursulin (2018-04-09 11:17:04)
> >
> > On 09/04/2018 10:25, Chris Wilson wrote:
> > > Downside being that we either then use atomic64 throughout or we mix
> > > atomic32/atomic64 knowing that we're on x86. (I feel like someone else
> > >
Op 09-04-18 om 05:40 schreef Vidya Srinivas:
> Series contain preparation patches for NV12 support
> Enabling NV12 KMD support will follow the series
>
> Chandra Konduru (3):
> drm/i915: Set scaler mode for NV12
> drm/i915: Update format_is_yuv() to include NV12
> drm/i915: Upscale scaler
Hi Jordan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robclark/msm-next]
[also build test ERROR on v4.16 next-20180406]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
On Fri, Apr 06, 2018 at 07:02:02PM +0300, Ville Syrjälä wrote:
> On Mon, Apr 02, 2018 at 02:35:42PM +0530, Ramalingam C wrote:
> >
> >
> > On Thursday 29 March 2018 07:54 PM, Ville Syrjälä wrote:
> > > On Thu, Mar 29, 2018 at 07:39:07PM +0530, Ramalingam C wrote:
> > >> HDCP1.4 key can be
On Sat, Apr 07, 2018 at 11:34:57AM +0200, Hans de Goede wrote:
> Hi,
>
> On 06-04-18 18:06, Ville Syrjälä wrote:
> > On Thu, Apr 05, 2018 at 01:37:31PM +0200, Hans de Goede wrote:
> > > Hi,
> > >
> > > On 04-04-18 22:49, Ville Syrjälä wrote:
> > > > On Wed, Apr 04, 2018 at 10:06:29PM +0200, Hans
On Fri, Apr 06, 2018 at 09:10:43AM +0300, Tomi Valkeinen wrote:
> On 05/04/18 19:50, Daniel Vetter wrote:
> > On Thu, Apr 05, 2018 at 06:13:58PM +0300, Ville Syrjala wrote:
> >> From: Ville Syrjälä
> >>
> >> omap_framebuffer_get_next_connector() uses plane->fb which
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Monday, April 9, 2018 2:04 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12
>
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Monday, April 9, 2018 2:04 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12
>
On Fri, Apr 06, 2018 at 04:47:08PM +0300, Jani Nikula wrote:
> On Thu, 05 Apr 2018, Abhay Kumar wrote:
> > In glk when device boots with 1366x768 panel, HDA codec doesn't comeup.
> > This result in no audio forever as cdclk is < 96Mhz.
> > This chagne will ensure CD clock
Quoting Sagar Arun Kamble (2018-04-09 11:38:34)
>
>
> On 4/9/2018 3:48 PM, Chris Wilson wrote:
> > As different backends may have different park/unpark callbacks, we
> > should only ever switch backends (reset_default_submission on wedge
> > recovery, or on enabling the guc) while parked.
> >
>
From: Chris Wilson
One important use of partial vma is to provide mappable access to the
object while it is being used elsewhere (pinned entirely into the
unmappable portion of the Global GTT, i.e. for use as a display scanout).
Signed-off-by: Chris Wilson
== Series Details ==
Series: series starting with [01/18] drm/i915/execlists: Set queue priority
from secondary port
URL : https://patchwork.freedesktop.org/series/41357/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fe34e7d49f28 drm/i915/execlists: Set queue priority from
Add an additional comparison to check the entire vma created in the mappable
region of the global GTT against the one in the unmappable range.
Further test with an assert_partial as well to ensure the VMA corresponds
to the original object's backing store.
Signed-off-by: Abdiel Janulgue
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Extend partial vma
coverage to check parallel creation
URL : https://patchwork.freedesktop.org/series/41359/
State : success
== Summary ==
Series 41359v1 series starting with [1/2] drm/i915/selftests: Extend partial
On 4/9/2018 3:48 PM, Chris Wilson wrote:
As different backends may have different park/unpark callbacks, we
should only ever switch backends (reset_default_submission on wedge
recovery, or on enabling the guc) while parked.
v2: Remove the assert from the guc code, as we are currently trying
On 09/04/2018 11:27, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-04-09 11:17:04)
On 09/04/2018 10:25, Chris Wilson wrote:
Downside being that we either then use atomic64 throughout or we mix
atomic32/atomic64 knowing that we're on x86. (I feel like someone else
must have solved this
Use a liberal timeout of 20ms to ensure that the rendering for an
interactive pageflip is started in a timely fashion, and that
user interaction is not blocked by GPU, or CPU, hogs. This is at the cost
of resetting whoever was blocking the preemption, likely leading to that
context/process being
The choice of preemption timeout is determined by the context from which
we trigger the preemption, as such allow the caller to specify the
desired timeout.
Effectively the other choice would be to use the shortest timeout along
the dependency chain. However, given that we would have already
The majority of the engine state dumping is too voluminous to be useful
outside of a controlled setup, though a few do accompany severe errors.
Keep the debug dumps next to the errors, but hide the others behind a CI
compile flag. This becomes more useful when adding more dumps to latency
One usecase would be to couple in via EGL_NV_context_priority_realtime
in userspace to provide some QoS guarantees in conjunction with setting
the highest priority.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_context.c| 22 ++
When circumstances allow, trying resetting the engine directly from the
preemption timeout handler. As this is softirq context, we have to be
careful both not to sleep and not to spin on anything we may be
interrupting (e.g. the submission tasklet).
Signed-off-by: Chris Wilson
Prepare to allow the execlists submission to be run from underneath a
hardirq timer context (and not just the current softirq context) as is
required for fast preemption resets.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 5 +++--
1 file changed,
In order to support engine reset from irq (timer) context, we need to be
able to re-initialise the breadcrumbs. So we need to promote the plain
spin_lock_irq to a safe spin_lock_irqsave.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_breadcrumbs.c | 5 +++--
On 09/04/2018 11:51, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-04-09 11:40:08)
On 09/04/2018 11:27, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-04-09 11:17:04)
On 09/04/2018 10:25, Chris Wilson wrote:
Downside being that we either then use atomic64 throughout or we mix
== Series Details ==
Series: series starting with [01/18] drm/i915/execlists: Set queue priority
from secondary port
URL : https://patchwork.freedesktop.org/series/41357/
State : success
== Summary ==
Series 41357v1 series starting with [01/18] drm/i915/execlists: Set queue
priority from
On Mon, 09 Apr 2018 12:41:22 +0200, Chris Wilson
wrote:
Quoting Sagar Arun Kamble (2018-04-09 11:38:34)
On 4/9/2018 3:48 PM, Chris Wilson wrote:
> As different backends may have different park/unpark callbacks, we
> should only ever switch backends
Quoting Tvrtko Ursulin (2018-04-09 11:40:08)
>
> On 09/04/2018 11:27, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-04-09 11:17:04)
> >>
> >> On 09/04/2018 10:25, Chris Wilson wrote:
> >>> Downside being that we either then use atomic64 throughout or we mix
> >>> atomic32/atomic64 knowing
== Series Details ==
Series: drm/i915: Park before resetting the submission backend (rev2)
URL : https://patchwork.freedesktop.org/series/41202/
State : warning
== Summary ==
Series 41202v2 drm/i915: Park before resetting the submission backend
We can refine our current execlists->queue_priority if we inspect
ELSP[1] rather than the head of the unsubmitted queue. Currently, we use
the unsubmitted queue and say that if a subsequent request is more than
important than the current queue, we will rerun the submission tasklet
to evaluate the
Now with i915_reset_engine() marking the stalled request as guilty,
preemption timeout doesn't lead into a GPU hang death spiral; at the
loss of potentially resetting a context with no harm (in practice that
didn't work out!).
A bit ambivalent on the flip forcing reset, both the stutter and
As a complement to inject_preempt_context(), follow up with the function
to handle its completion. This will be useful should we wish to extend
the duties of the preempt-context for execlists.
v2: And do the same for the guc.
Signed-off-by: Chris Wilson
Cc: Jeff McGee
In preparation to more carefully handling incomplete preemption during
reset by execlists, we move the existing code wholesale to the backends
under a couple of new reset vfuncs.
Signed-off-by: Chris Wilson
Cc: Michał Winiarski
CC: Michel
In the next patch, we will make the execlists reset prepare callback
take into account preemption by flushing the context-switch handler.
This is not applicable to the GuC submission backend, so split the two
into their own backend callbacks.
Signed-off-by: Chris Wilson
Catch up with the inflight CSB events, after disabling the tasklet
before deciding which request was truly guilty of hanging the GPU.
v2: Restore checking of use_csb_mmio on every loop, don't forget old
vgpu.
Signed-off-by: Chris Wilson
Cc: Michał Winiarski
Instead of synchronously cancelling the timer and re-enabling it inside
the reset callbacks, keep the timer enabled and let it die on its next
wakeup if no longer required. This allows
intel_engine_reset_breadcrumbs() to be used from an atomic
(timer/softirq) context such as required for resetting
Install a timer when trying to preempt on behalf of an important
context such that if the active context does not honour the preemption
request within the desired timeout, then we reset the GPU to allow the
important context to run.
v2: Install the timer on scheduling the preempt request; long
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