Re: [Intel-gfx] [PATCH v8 04/12] drm/i915: Introduce i915_gem_fini_hw for symmetry with i915_gem_init_hw

2018-04-09 Thread Sagar Arun Kamble
On 4/9/2018 5:53 PM, Michal Wajdeczko wrote: We have i915_gem_init_hw function that on failure requires some cleanup in uC and then in other places we were trying to do such cleanup directly. Let's fix that by adding i915_gem_fini_hw for nice symmetry with init_hw and call it on cleanup paths.

[Intel-gfx] [PATCH v10 2/7] drm/i915: Keep a count of requests waiting for a slot on GPU

2018-04-09 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a per-engine number of runnable (waiting for GPU time) requests. We choose to mange the runnable counter at the backend level instead of at the request submit_notify callback. The latter would be more consolidated and less code, but it would

[Intel-gfx] [PATCH v4 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a count of requests submitted from userspace and not yet runnable due unresolved dependencies. v2: Rename and move under the container struct. (Chris Wilson) v3: Rebase. v4: Move decrement site to the backend to shrink the window of double-

[Intel-gfx] [PATCH v3 7/7] drm/i915: Engine queues query

2018-04-09 Thread Tvrtko Ursulin
From: Tvrtko Ursulin As well as exposing active requests on engines via PMU, we can also export the current raw values (as tracked by i915 command submission) via a dedicated query. This is to satisfy customers who have userspace load balancing solutions implemented on

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable display workaround 827 for all planes, v2.

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915: Enable display workaround 827 for all planes, v2. URL : https://patchwork.freedesktop.org/series/41371/ State : success == Summary == Series 41371v1 drm/i915: Enable display workaround 827 for all planes, v2.

Re: [Intel-gfx] [PATCH v8 05/12] drm/i915: Add i915_gem_fini_hw to i915_gem_suspend

2018-04-09 Thread Sagar Arun Kamble
On 4/9/2018 5:53 PM, Michal Wajdeczko wrote: By calling i915_gem_init_hw in i915_gem_resume and not calling i915_gem_fini_hw in i915_gem_suspend we introduced asymmetry in init_hw/fini_hw calls. Let's fix that. Signed-off-by: Michal Wajdeczko Cc: Sagar Arun Kamble

Re: [Intel-gfx] [PATCH v8 08/12] drm/i915/uc: Fully sanitize uC within intel_uc_fini_hw

2018-04-09 Thread Sagar Arun Kamble
On 4/9/2018 5:53 PM, Michal Wajdeczko wrote: As we always call intel_uc_sanitize after every call to intel_uc_fini_hw we may drop redundant call and sanitize uC from the fini_hw function. Signed-off-by: Michal Wajdeczko Cc: Sagar Arun Kamble

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Check that the breadcrumb irq is enabled

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915/guc: Check that the breadcrumb irq is enabled URL : https://patchwork.freedesktop.org/series/41368/ State : success == Summary == Known issues: Test kms_flip: Subgroup 2x-wf_vblank-ts-check: fail -> PASS

Re: [Intel-gfx] [PATCH v8 03/12] drm/i915: Move i915_gem_fini to i915_gem.c

2018-04-09 Thread Sagar Arun Kamble
On 4/9/2018 5:53 PM, Michal Wajdeczko wrote: We should keep i915_gem_init/fini functions together for easier tracking of their symmetry. Signed-off-by: Michal Wajdeczko Cc: Sagar Arun Kamble Cc: Chris Wilson

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Enable display workaround 827 for all planes, v2.

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915: Enable display workaround 827 for all planes, v2. URL : https://patchwork.freedesktop.org/series/41371/ State : warning == Summary == $ dim checkpatch origin/drm-tip b8f0788dfd3f drm/i915: Enable display workaround 827 for all planes, v2. -:58:

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v8,01/12] drm/i915: Park before resetting the submission backend

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [v8,01/12] drm/i915: Park before resetting the submission backend URL : https://patchwork.freedesktop.org/series/41365/ State : failure == Summary == Possible new issues: Test drm_mm: Subgroup sanitycheck: pass

[Intel-gfx] [CI] drm/i915/pmu: check runtime resume vs pmu race

2018-04-09 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_pmu.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index

[Intel-gfx] [PATCH i-g-t] tools/aubdump: Fix ISO C90 forbids mixed declarations and code warning

2018-04-09 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Back to a clean build with no warnings, at least for me. Signed-off-by: Tvrtko Ursulin Cc: Jordan Justen Cc: Scott D Phillips --- tools/aubdump.c | 7 --- 1

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v8,01/12] drm/i915: Park before resetting the submission backend

2018-04-09 Thread Michal Wajdeczko
On Mon, 09 Apr 2018 17:09:18 +0200, Patchwork wrote: == Series Details == Series: series starting with [v8,01/12] drm/i915: Park before resetting the submission backend URL : https://patchwork.freedesktop.org/series/41365/ State : failure == Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout URL : https://patchwork.freedesktop.org/series/41366/ State : success == Summary == Known issues: Test kms_flip: Subgroup 2x-wf_vblank-ts-check: fail -> PASS

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Change use get_new_plane_state instead of existing plane state

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Change use get_new_plane_state instead of existing plane state URL : https://patchwork.freedesktop.org/series/41370/ State : success == Summary == Known issues: Test kms_flip: Subgroup flip-vs-absolute-wf_vblank:

Re: [Intel-gfx] [PATCH i-g-t] tools/aubdump: Fix ISO C90 forbids mixed declarations and code warning

2018-04-09 Thread Scott D Phillips
Tvrtko Ursulin writes: > From: Tvrtko Ursulin > > Back to a clean build with no warnings, at least for me. Why c90? If that's the language we mean to target then we should probably add it to the build system so people with gcc 5.1 and later will

[Intel-gfx] ✗ Fi.CI.BAT: failure for Queued/runnable/running engine stats (rev7)

2018-04-09 Thread Patchwork
== Series Details == Series: Queued/runnable/running engine stats (rev7) URL : https://patchwork.freedesktop.org/series/36926/ State : failure == Summary == Series 36926v7 Queued/runnable/running engine stats https://patchwork.freedesktop.org/api/1.0/series/36926/revisions/7/mbox/

Re: [Intel-gfx] [PATCH] drm/i915/cnp: Properly handle VBT ddc pin out of bounds.

2018-04-09 Thread Rodrigo Vivi
On Mon, Apr 09, 2018 at 12:48:15PM +0300, Jani Nikula wrote: > On Fri, 23 Mar 2018, Timo Aaltonen wrote: > > On 30.01.2018 00:12, Rodrigo Vivi wrote: > >> On Mon, Jan 29, 2018 at 05:42:53AM +, Kai Heng Feng wrote: > >>> > On 26 Jan 2018, at 6:25 AM, Rodrigo Vivi

Re: [Intel-gfx] [PATCH] drm/i915/audio: Fix audio detection issue on GLK

2018-04-09 Thread Rodrigo Vivi
On Mon, Apr 09, 2018 at 05:07:31PM +0300, Jani Nikula wrote: > On Sun, 08 Apr 2018, Gaurav K Singh wrote: > > On Geminilake, sometimes audio card is not getting > > detected after reboot. This is a spurious issue happening on > > Geminilake. HW codec and HD audio

[Intel-gfx] [PATCH 1/2] drm/i915/guc: Check that the breadcrumb irq is enabled

2018-04-09 Thread Chris Wilson
Our execlists emulation for GuC requires use of the breadcrumb following every request as a simulcrum for the context-switch interrupt, which we then use to drive the submission tasklet. Therefore, when we unpark the engine for use with the GuC, we pin the breadcrumb interrupt to keep it enabled

[Intel-gfx] [PATCH 2/2] HAX:guc

2018-04-09 Thread Chris Wilson
--- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index c96360398072..53037b5eff22 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++

Re: [Intel-gfx] [PATCH 01/22] drm/i915/icl: Introduce initial Icelake Workarounds

2018-04-09 Thread Chris Wilson
Quoting Oscar Mateo (2018-04-06 23:24:57) > Inherit workarounds from previous platforms that are still valid for > Icelake. Speaking of the workarounds, where do we stand with at least landing the split out of init_workarounds_ring()? Rebuilding the invariant wa_regs[] on every reset is

Re: [Intel-gfx] [PATCH 6/7] drm/i915/dp: abstract link config selection

2018-04-09 Thread Manasi Navare
On Mon, Apr 09, 2018 at 05:12:03PM +0300, Jani Nikula wrote: > On Thu, 05 Apr 2018, Manasi Navare wrote: > > On Thu, Apr 05, 2018 at 05:39:04PM +0300, Jani Nikula wrote: > >> For now, there's just the one link config selection, optimizing for slow > >> and wide link. No

Re: [Intel-gfx] [PATCH] drm/i915/audio: Fix audio detection issue on GLK

2018-04-09 Thread Kumar, Abhay
On 4/9/2018 12:10 PM, Rodrigo Vivi wrote: On Mon, Apr 09, 2018 at 05:07:31PM +0300, Jani Nikula wrote: On Sun, 08 Apr 2018, Gaurav K Singh wrote: On Geminilake, sometimes audio card is not getting detected after reboot. This is a spurious issue happening on

Re: [Intel-gfx] [PATCH] drm/i915/psr: Chase psr.enabled only under the psr.lock

2018-04-09 Thread Rodrigo Vivi
On Sat, Apr 07, 2018 at 10:05:25AM +0100, Chris Wilson wrote: > Quoting Rodrigo Vivi (2018-04-06 23:18:16) > > On Fri, Apr 06, 2018 at 11:12:27AM -0700, Souza, Jose wrote: > > > On Thu, 2018-04-05 at 12:49 +0100, Chris Wilson wrote: > > > > + struct drm_crtc *crtc = > > > > +

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq is enabled

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq is enabled URL : https://patchwork.freedesktop.org/series/41396/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2fc2ed95e6cd drm/i915/guc: Check that the breadcrumb irq is

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq is enabled

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq is enabled URL : https://patchwork.freedesktop.org/series/41396/ State : success == Summary == Series 41396v1 series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq is enabled

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/pmu: check runtime resume vs pmu race

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915/pmu: check runtime resume vs pmu race URL : https://patchwork.freedesktop.org/series/41380/ State : warning == Summary == Possible new issues: Test perf_pmu: Subgroup rc6-runtime-pm: pass -> DMESG-WARN (shard-apl)

Re: [Intel-gfx] [PATCH 01/22] drm/i915/icl: Introduce initial Icelake Workarounds

2018-04-09 Thread Oscar Mateo
On 4/9/2018 12:53 PM, Chris Wilson wrote: Quoting Oscar Mateo (2018-04-06 23:24:57) Inherit workarounds from previous platforms that are still valid for Icelake. Speaking of the workarounds, where do we stand with at least landing the split out of init_workarounds_ring()? Rebuilding the

Re: [Intel-gfx] [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

2018-04-09 Thread Kumar, Abhay
On 4/9/2018 3:33 AM, Ville Syrjälä wrote: On Fri, Apr 06, 2018 at 04:47:08PM +0300, Jani Nikula wrote: On Thu, 05 Apr 2018, Abhay Kumar wrote: In glk when device boots with 1366x768 panel, HDA codec doesn't comeup. This result in no audio forever as cdclk is < 96Mhz.

Re: [Intel-gfx] [PATCH] drm/i915/audio: Fix audio detection issue on GLK

2018-04-09 Thread Dhinakaran Pandiyan
On Mon, 2018-04-09 at 12:18 -0700, Kumar, Abhay wrote: > > On 4/9/2018 12:10 PM, Rodrigo Vivi wrote: > > On Mon, Apr 09, 2018 at 05:07:31PM +0300, Jani Nikula wrote: > >> On Sun, 08 Apr 2018, Gaurav K Singh wrote: > >>> On Geminilake, sometimes audio card is not

Re: [Intel-gfx] [PATCH] drm/i915/audio: Fix audio detection issue on GLK

2018-04-09 Thread Kumar, Abhay
On 4/9/2018 4:20 PM, Pandiyan, Dhinakaran wrote: On Mon, 2018-04-09 at 12:18 -0700, Kumar, Abhay wrote: On 4/9/2018 12:10 PM, Rodrigo Vivi wrote: On Mon, Apr 09, 2018 at 05:07:31PM +0300, Jani Nikula wrote: On Sun, 08 Apr 2018, Gaurav K Singh wrote: On

Re: [Intel-gfx] [PATCH 3/8] drm/i915/icl: add basic support for the ICL clocks

2018-04-09 Thread James Ausmus
On Wed, Mar 28, 2018 at 02:57:58PM -0700, Paulo Zanoni wrote: > This commit introduces the definitions for the ICL clocks and adds the > basic functions to the shared DPLL framework. It adds code for the > Enable and Disable sequences for some PLLs, but it does not have the > code to compute the

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq is enabled

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/guc: Check that the breadcrumb irq is enabled URL : https://patchwork.freedesktop.org/series/41396/ State : failure == Summary == Possible new issues: Test gem_eio: Subgroup execbuf: pass ->

[Intel-gfx] [PATCH v3 1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

2018-04-09 Thread Jackie Li
After enabled the WOPCM write-once registers locking status checking, reloading of the i915 module will fail with modparam enable_guc set to 3 (enable GuC and HuC firmware loading) if the module was originally loaded with enable_guc set to 1 (only enable GuC firmware loading). This is because

[Intel-gfx] [PATCH v3 4/4] HAX enable guc for CI

2018-04-09 Thread Jackie Li
Signed-off-by: Jackie Li --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index c963603..53037b5 100644 ---

[Intel-gfx] [PATCH v3 2/4] drm/i915: Always set HUC_LOADING_AGENT_GUC bit in WOPCM offset register

2018-04-09 Thread Jackie Li
The enable_guc modparam is used to enable/disable GuC/HuC FW uploading dynamcially during i915 module loading. If WOPCM offset register was locked without having HUC_LOADING_AGENT_GUC bit set to 1, the module reloading with both GuC and HuC FW will fail since we need to set this bit to 1 for HuC

[Intel-gfx] [PATCH v3 3/4] drm/i915: Add code to accept valid locked WOPCM register values

2018-04-09 Thread Jackie Li
In current code, we only compare the locked WOPCM register values with the calculated values. However, we can continue loading GuC/HuC firmware if the locked (or partially locked) values were valid for current GuC/HuC firmware sizes. This patch added a new code path to verify whether the locked

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3)

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3) URL : https://patchwork.freedesktop.org/series/41095/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0a22dbbae8f8 drm/i915: Enable edp psr error interrupts on hsw

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3)

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3) URL : https://patchwork.freedesktop.org/series/41095/ State : success == Summary == Series 41095v3 series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [v3,1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes URL : https://patchwork.freedesktop.org/series/41409/ State : success == Summary == Series 41409v1 series starting with [v3,1/4] drm/i915: Always do WOPCM

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3)

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3) URL : https://patchwork.freedesktop.org/series/41095/ State : success == Summary == Possible new issues: Test kms_cursor_legacy: Subgroup pipe-c-torture-move:

Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12

2018-04-09 Thread Srinivas, Vidya
> -Original Message- > From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com] > Sent: Monday, April 9, 2018 5:15 PM > To: Srinivas, Vidya ; intel- > g...@lists.freedesktop.org > Cc: Kamath, Sunil > Subject: Re: [Intel-gfx]

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [v3,1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes URL : https://patchwork.freedesktop.org/series/41409/ State : failure == Summary == Possible new issues: Test gem_eio: Subgroup execbuf:

Re: [Intel-gfx] [PATCH] drm/i915: Add debugfs file to clear FIFO underruns.

2018-04-09 Thread Rodrigo Vivi
On Wed, Mar 28, 2018 at 06:20:26PM +0200, Maarten Lankhorst wrote: > Op 28-03-18 om 12:21 schreef Jani Nikula: > > On Wed, 28 Mar 2018, Maarten Lankhorst > > wrote: > >> Adding a i915_fifo_underrun_reset debugfs file will make it possible > >> for IGT tests to

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/debugfs: Print sink PSR status

2018-04-09 Thread Souza, Jose
On Fri, 2018-04-06 at 18:40 -0700, Dhinakaran Pandiyan wrote: > > > On Sat, 2018-04-07 at 00:49 +, Souza, Jose wrote: > > On Fri, 2018-04-06 at 16:36 -0700, José Roberto de Souza wrote: > > > On Mon, 2018-04-02 at 15:38 -0700, Pandiyan, Dhinakaran wrote: > > > > On Mon, 2018-04-02 at 13:51

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Enable display workaround 827 for all planes, v2.

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915: Enable display workaround 827 for all planes, v2. URL : https://patchwork.freedesktop.org/series/41371/ State : success == Summary == Known issues: Test kms_flip: Subgroup 2x-flip-vs-expired-vblank-interruptible: fail

Re: [Intel-gfx] [PATCH] drm/i915/guc: Check that the breadcrumb irq is enabled

2018-04-09 Thread Chris Wilson
Quoting Michal Wajdeczko (2018-04-09 15:08:40) > On Mon, 09 Apr 2018 14:42:19 +0200, Chris Wilson > wrote: > > > Our execlists emulation for GuC requires use of the breadcrumb following > > every request as a simulcrum for the context-switch interrupt, which we > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: check runtime resume vs pmu race

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915/pmu: check runtime resume vs pmu race URL : https://patchwork.freedesktop.org/series/41380/ State : success == Summary == Series 41380v1 drm/i915/pmu: check runtime resume vs pmu race

Re: [Intel-gfx] [PATCH] drm/i915: Enable display workaround 827 for all planes, v2.

2018-04-09 Thread Ville Syrjälä
On Mon, Apr 09, 2018 at 04:21:23PM +0200, Maarten Lankhorst wrote: > The workaround was applied only to the primary plane, but is required > on all planes. Iterate over all planes in the crtc atomic check to see > if the workaround is enabled, and only perform the actual toggling in > the pre/post

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v8,01/12] drm/i915: Park before resetting the submission backend

2018-04-09 Thread Sagar Arun Kamble
On 4/9/2018 9:02 PM, Michal Wajdeczko wrote: On Mon, 09 Apr 2018 17:09:18 +0200, Patchwork wrote: == Series Details == Series: series starting with [v8,01/12] drm/i915: Park before resetting the submission backend URL   :

Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12

2018-04-09 Thread Maarten Lankhorst
Op 09-04-18 om 10:57 schreef Srinivas, Vidya: > >> -Original Message- >> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com] >> Sent: Monday, April 9, 2018 2:04 PM >> To: Srinivas, Vidya ; intel- >> g...@lists.freedesktop.org >> Subject: Re:

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-04-09 10:11:53) > > On 06/04/2018 21:17, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-04-05 13:39:19) > >> From: Tvrtko Ursulin > >> > >> Keep a count of requests submitted from userspace and not yet runnable due > >> unresolved

Re: [Intel-gfx] [PATCH] drm/i915/cnp: Properly handle VBT ddc pin out of bounds.

2018-04-09 Thread Jani Nikula
On Fri, 23 Mar 2018, Timo Aaltonen wrote: > On 30.01.2018 00:12, Rodrigo Vivi wrote: >> On Mon, Jan 29, 2018 at 05:42:53AM +, Kai Heng Feng wrote: >>> On 26 Jan 2018, at 6:25 AM, Rodrigo Vivi wrote: If the table result is out of

[Intel-gfx] [PATCH] drm/i915: Park before resetting the submission backend

2018-04-09 Thread Chris Wilson
As different backends may have different park/unpark callbacks, we should only ever switch backends (reset_default_submission on wedge recovery, or on enabling the guc) while parked. v2: Remove the assert from the guc code, as we are currently trying to modify the engine vfuncs pointer on a live

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Tvrtko Ursulin
On 09/04/2018 10:25, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-09 10:11:53) On 06/04/2018 21:17, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-05 13:39:19) From: Tvrtko Ursulin Keep a count of requests submitted from userspace and not yet runnable

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Tvrtko Ursulin
On 06/04/2018 21:17, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-05 13:39:19) From: Tvrtko Ursulin Keep a count of requests submitted from userspace and not yet runnable due unresolved dependencies. v2: Rename and move under the container struct. (Chris

Re: [Intel-gfx] [PATCH 6/7] drm/i915/pmu: Add running counter

2018-04-09 Thread Tvrtko Ursulin
On 06/04/2018 21:24, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-05 13:39:22) From: Tvrtko Ursulin We add a PMU counter to expose the number of requests currently executing on the GPU. This is useful to analyze the overall load of the system. v2: *

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Silence debugging DRM_ERROR for failing to suspend vlv powerwells

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915: Silence debugging DRM_ERROR for failing to suspend vlv powerwells URL : https://patchwork.freedesktop.org/series/41350/ State : success == Summary == Series 41350v1 drm/i915: Silence debugging DRM_ERROR for failing to suspend vlv powerwells

Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12

2018-04-09 Thread Srinivas, Vidya
> -Original Message- > From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com] > Sent: Monday, April 9, 2018 2:38 PM > To: Srinivas, Vidya ; intel- > g...@lists.freedesktop.org > Cc: Kamath, Sunil > Subject: Re: [Intel-gfx]

[Intel-gfx] [PATCH] drm/i915: Silence debugging DRM_ERROR for failing to suspend vlv powerwells

2018-04-09 Thread Chris Wilson
If we try to suspend a wedged device following a GPU reset failure, we will also fail to turn off the rc6 powerwells (on vlv), leading to a *ERROR*. This is quite expected in this case, so the best we can do is shake our heads and reduce the *ERROR* to a debug so CI stops complaining. Testcase:

Re: [Intel-gfx] [PATCH] drm/i915: Silence debugging DRM_ERROR for failing to suspend vlv powerwells

2018-04-09 Thread Chris Wilson
Quoting Chris Wilson (2018-04-09 10:49:05) > If we try to suspend a wedged device following a GPU reset failure, we > will also fail to turn off the rc6 powerwells (on vlv), leading to a > *ERROR*. This is quite expected in this case, so the best we can do is > shake our heads and reduce the

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-04-09 11:17:04) > > On 09/04/2018 10:25, Chris Wilson wrote: > > Downside being that we either then use atomic64 throughout or we mix > > atomic32/atomic64 knowing that we're on x86. (I feel like someone else > > must have solved this problem in a much neater way,

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Chris Wilson
Quoting Chris Wilson (2018-04-09 11:27:17) > Quoting Tvrtko Ursulin (2018-04-09 11:17:04) > > > > On 09/04/2018 10:25, Chris Wilson wrote: > > > Downside being that we either then use atomic64 throughout or we mix > > > atomic32/atomic64 knowing that we're on x86. (I feel like someone else > > >

Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12

2018-04-09 Thread Maarten Lankhorst
Op 09-04-18 om 05:40 schreef Vidya Srinivas: > Series contain preparation patches for NV12 support > Enabling NV12 KMD support will follow the series > > Chandra Konduru (3): > drm/i915: Set scaler mode for NV12 > drm/i915: Update format_is_yuv() to include NV12 > drm/i915: Upscale scaler

Re: [Intel-gfx] [PATCH 01/10] include: Move ascii85 functions from i915 to linux/ascii85.h

2018-04-09 Thread kbuild test robot
Hi Jordan, Thank you for the patch! Yet something to improve: [auto build test ERROR on robclark/msm-next] [also build test ERROR on v4.16 next-20180406] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [Intel-gfx] [PATCH v2 3/4] drm/i915: Check hdcp key loadability

2018-04-09 Thread Daniel Vetter
On Fri, Apr 06, 2018 at 07:02:02PM +0300, Ville Syrjälä wrote: > On Mon, Apr 02, 2018 at 02:35:42PM +0530, Ramalingam C wrote: > > > > > > On Thursday 29 March 2018 07:54 PM, Ville Syrjälä wrote: > > > On Thu, Mar 29, 2018 at 07:39:07PM +0530, Ramalingam C wrote: > > >> HDCP1.4 key can be

Re: [Intel-gfx] [PATCH] drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers

2018-04-09 Thread Daniel Vetter
On Sat, Apr 07, 2018 at 11:34:57AM +0200, Hans de Goede wrote: > Hi, > > On 06-04-18 18:06, Ville Syrjälä wrote: > > On Thu, Apr 05, 2018 at 01:37:31PM +0200, Hans de Goede wrote: > > > Hi, > > > > > > On 04-04-18 22:49, Ville Syrjälä wrote: > > > > On Wed, Apr 04, 2018 at 10:06:29PM +0200, Hans

Re: [Intel-gfx] [PATCH 11/13] drm/omapdrm: Nuke omap_framebuffer_get_next_connector()

2018-04-09 Thread Daniel Vetter
On Fri, Apr 06, 2018 at 09:10:43AM +0300, Tomi Valkeinen wrote: > On 05/04/18 19:50, Daniel Vetter wrote: > > On Thu, Apr 05, 2018 at 06:13:58PM +0300, Ville Syrjala wrote: > >> From: Ville Syrjälä > >> > >> omap_framebuffer_get_next_connector() uses plane->fb which

Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12

2018-04-09 Thread Srinivas, Vidya
> -Original Message- > From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com] > Sent: Monday, April 9, 2018 2:04 PM > To: Srinivas, Vidya ; intel- > g...@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12 >

Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12

2018-04-09 Thread Srinivas, Vidya
> -Original Message- > From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com] > Sent: Monday, April 9, 2018 2:04 PM > To: Srinivas, Vidya ; intel- > g...@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12 >

Re: [Intel-gfx] [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

2018-04-09 Thread Ville Syrjälä
On Fri, Apr 06, 2018 at 04:47:08PM +0300, Jani Nikula wrote: > On Thu, 05 Apr 2018, Abhay Kumar wrote: > > In glk when device boots with 1366x768 panel, HDA codec doesn't comeup. > > This result in no audio forever as cdclk is < 96Mhz. > > This chagne will ensure CD clock

Re: [Intel-gfx] [PATCH] drm/i915: Park before resetting the submission backend

2018-04-09 Thread Chris Wilson
Quoting Sagar Arun Kamble (2018-04-09 11:38:34) > > > On 4/9/2018 3:48 PM, Chris Wilson wrote: > > As different backends may have different park/unpark callbacks, we > > should only ever switch backends (reset_default_submission on wedge > > recovery, or on enabling the guc) while parked. > > >

[Intel-gfx] [PATCH 1/2] drm/i915/selftests: Extend partial vma coverage to check parallel creation

2018-04-09 Thread Abdiel Janulgue
From: Chris Wilson One important use of partial vma is to provide mappable access to the object while it is being used elsewhere (pinned entirely into the unmappable portion of the Global GTT, i.e. for use as a display scanout). Signed-off-by: Chris Wilson

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/18] drm/i915/execlists: Set queue priority from secondary port

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [01/18] drm/i915/execlists: Set queue priority from secondary port URL : https://patchwork.freedesktop.org/series/41357/ State : warning == Summary == $ dim checkpatch origin/drm-tip fe34e7d49f28 drm/i915/execlists: Set queue priority from

[Intel-gfx] [PATCH 2/2] drm/i915/selftests: Compare mappable vma against instance in unmappable region

2018-04-09 Thread Abdiel Janulgue
Add an additional comparison to check the entire vma created in the mappable region of the global GTT against the one in the unmappable range. Further test with an assert_partial as well to ensure the VMA corresponds to the original object's backing store. Signed-off-by: Abdiel Janulgue

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Extend partial vma coverage to check parallel creation

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/selftests: Extend partial vma coverage to check parallel creation URL : https://patchwork.freedesktop.org/series/41359/ State : success == Summary == Series 41359v1 series starting with [1/2] drm/i915/selftests: Extend partial

Re: [Intel-gfx] [PATCH] drm/i915: Park before resetting the submission backend

2018-04-09 Thread Sagar Arun Kamble
On 4/9/2018 3:48 PM, Chris Wilson wrote: As different backends may have different park/unpark callbacks, we should only ever switch backends (reset_default_submission on wedge recovery, or on enabling the guc) while parked. v2: Remove the assert from the guc code, as we are currently trying

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Tvrtko Ursulin
On 09/04/2018 11:27, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-09 11:17:04) On 09/04/2018 10:25, Chris Wilson wrote: Downside being that we either then use atomic64 throughout or we mix atomic32/atomic64 knowing that we're on x86. (I feel like someone else must have solved this

[Intel-gfx] [PATCH 17/18] drm/i915: Use a preemption timeout to enforce interactivity

2018-04-09 Thread Chris Wilson
Use a liberal timeout of 20ms to ensure that the rendering for an interactive pageflip is started in a timely fashion, and that user interaction is not blocked by GPU, or CPU, hogs. This is at the cost of resetting whoever was blocking the preemption, likely leading to that context/process being

[Intel-gfx] [PATCH 16/18] drm/i915/preemption: Select timeout when scheduling

2018-04-09 Thread Chris Wilson
The choice of preemption timeout is determined by the context from which we trigger the preemption, as such allow the caller to specify the desired timeout. Effectively the other choice would be to use the shortest timeout along the dependency chain. However, given that we would have already

[Intel-gfx] [PATCH 13/18] drm/i915: Compile out engine debug for release

2018-04-09 Thread Chris Wilson
The majority of the engine state dumping is too voluminous to be useful outside of a controlled setup, though a few do accompany severe errors. Keep the debug dumps next to the errors, but hide the others behind a CI compile flag. This becomes more useful when adding more dumps to latency

[Intel-gfx] [PATCH 18/18] drm/i915: Allow user control over preempt timeout on their important context

2018-04-09 Thread Chris Wilson
One usecase would be to couple in via EGL_NV_context_priority_realtime in userspace to provide some QoS guarantees in conjunction with setting the highest priority. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_context.c| 22 ++

[Intel-gfx] [PATCH 15/18] drm/i915/execlists: Try preempt-reset from hardirq timer context

2018-04-09 Thread Chris Wilson
When circumstances allow, trying resetting the engine directly from the preemption timeout handler. As this is softirq context, we have to be careful both not to sleep and not to spin on anything we may be interrupting (e.g. the submission tasklet). Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 10/18] drm/i915/execlists: Make submission tasklet hardirq safe

2018-04-09 Thread Chris Wilson
Prepare to allow the execlists submission to be run from underneath a hardirq timer context (and not just the current softirq context) as is required for fast preemption resets. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_lrc.c | 5 +++-- 1 file changed,

[Intel-gfx] [PATCH 12/18] drm/i915: Allow init_breadcrumbs to be used from irq context

2018-04-09 Thread Chris Wilson
In order to support engine reset from irq (timer) context, we need to be able to re-initialise the breadcrumbs. So we need to promote the plain spin_lock_irq to a safe spin_lock_irqsave. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_breadcrumbs.c | 5 +++--

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Tvrtko Ursulin
On 09/04/2018 11:51, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-09 11:40:08) On 09/04/2018 11:27, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-09 11:17:04) On 09/04/2018 10:25, Chris Wilson wrote: Downside being that we either then use atomic64 throughout or we mix

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/18] drm/i915/execlists: Set queue priority from secondary port

2018-04-09 Thread Patchwork
== Series Details == Series: series starting with [01/18] drm/i915/execlists: Set queue priority from secondary port URL : https://patchwork.freedesktop.org/series/41357/ State : success == Summary == Series 41357v1 series starting with [01/18] drm/i915/execlists: Set queue priority from

Re: [Intel-gfx] [PATCH] drm/i915: Park before resetting the submission backend

2018-04-09 Thread Michal Wajdeczko
On Mon, 09 Apr 2018 12:41:22 +0200, Chris Wilson wrote: Quoting Sagar Arun Kamble (2018-04-09 11:38:34) On 4/9/2018 3:48 PM, Chris Wilson wrote: > As different backends may have different park/unpark callbacks, we > should only ever switch backends

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-04-09 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-04-09 11:40:08) > > On 09/04/2018 11:27, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-04-09 11:17:04) > >> > >> On 09/04/2018 10:25, Chris Wilson wrote: > >>> Downside being that we either then use atomic64 throughout or we mix > >>> atomic32/atomic64 knowing

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Park before resetting the submission backend (rev2)

2018-04-09 Thread Patchwork
== Series Details == Series: drm/i915: Park before resetting the submission backend (rev2) URL : https://patchwork.freedesktop.org/series/41202/ State : warning == Summary == Series 41202v2 drm/i915: Park before resetting the submission backend

[Intel-gfx] [PATCH 01/18] drm/i915/execlists: Set queue priority from secondary port

2018-04-09 Thread Chris Wilson
We can refine our current execlists->queue_priority if we inspect ELSP[1] rather than the head of the unsubmitted queue. Currently, we use the unsubmitted queue and say that if a subsequent request is more than important than the current queue, we will rerun the submission tasklet to evaluate the

[Intel-gfx] Still trying for context->preempt_timeout

2018-04-09 Thread Chris Wilson
Now with i915_reset_engine() marking the stalled request as guilty, preemption timeout doesn't lead into a GPU hang death spiral; at the loss of potentially resetting a context with no harm (in practice that didn't work out!). A bit ambivalent on the flip forcing reset, both the stutter and

[Intel-gfx] [PATCH 02/18] drm/i915/execlists: Refactor out complete_preempt_context()

2018-04-09 Thread Chris Wilson
As a complement to inject_preempt_context(), follow up with the function to handle its completion. This will be useful should we wish to extend the duties of the preempt-context for execlists. v2: And do the same for the guc. Signed-off-by: Chris Wilson Cc: Jeff McGee

[Intel-gfx] [PATCH 03/18] drm/i915: Move engine reset prepare/finish to backends

2018-04-09 Thread Chris Wilson
In preparation to more carefully handling incomplete preemption during reset by execlists, we move the existing code wholesale to the backends under a couple of new reset vfuncs. Signed-off-by: Chris Wilson Cc: Michał Winiarski CC: Michel

[Intel-gfx] [PATCH 04/18] drm/i915: Split execlists/guc reset preparations

2018-04-09 Thread Chris Wilson
In the next patch, we will make the execlists reset prepare callback take into account preemption by flushing the context-switch handler. This is not applicable to the GuC submission backend, so split the two into their own backend callbacks. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 05/18] drm/i915/execlists: Flush pending preemption events during reset

2018-04-09 Thread Chris Wilson
Catch up with the inflight CSB events, after disabling the tasklet before deciding which request was truly guilty of hanging the GPU. v2: Restore checking of use_csb_mmio on every loop, don't forget old vgpu. Signed-off-by: Chris Wilson Cc: Michał Winiarski

[Intel-gfx] [PATCH 06/18] drm/i915/breadcrumbs: Keep the fake irq armed across reset

2018-04-09 Thread Chris Wilson
Instead of synchronously cancelling the timer and re-enabling it inside the reset callbacks, keep the timer enabled and let it die on its next wakeup if no longer required. This allows intel_engine_reset_breadcrumbs() to be used from an atomic (timer/softirq) context such as required for resetting

[Intel-gfx] [PATCH 14/18] drm/i915/execlists: Force preemption via reset on timeout

2018-04-09 Thread Chris Wilson
Install a timer when trying to preempt on behalf of an important context such that if the active context does not honour the preemption request within the desired timeout, then we reset the GPU to allow the important context to run. v2: Install the timer on scheduling the preempt request; long

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