On Thu, Jan 03, 2019 at 06:06:53PM +0100, Noralf Trønnes wrote:
>
>
> Den 28.12.2018 21.38, skrev Daniel Vetter:
> > On Tue, May 29, 2018 at 9:54 AM Daniel Vetter wrote:
> > >
> > > On Fri, May 25, 2018 at 02:42:02PM +0200, Noralf Trønnes wrote:
> > > >
> > > > Den 24.05.2018 11.16, skrev
Keep track of our wakeref used to keep the device awake so we can catch
any leak.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_perf.c | 10 +-
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git
Now that the submission backends are controlled via their own spinlocks,
with a wave of a magic wand we can lift the struct_mutex requirement
around GPU reset. That is we allow the submission frontend (userspace)
to keep on submitting while we process the GPU reset as we can suspend
the backend
Keep track of the temporary rpm wakeref used for panel backlight access,
so that we can cancel it immediately upon release and so more clearly
identify leaks.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/intel_panel.c | 5 +++--
1 file changed, 3 insertions(+), 2
Include the total size of closed vma when reporting the per_ctx_stats of
debugfs/i915_gem_objects.
Whilst adjusting the context tracking, note that we can simply use our
list of contexts in i915->contexts rather than circumlocute via
dev->filelist and the per-file context idr, with the result
As we only release each power well once, we assume that each transcoder
maps to a different domain. Complain if this is not so.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/intel_display.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
A few years ago, see commit 688e6c725816 ("drm/i915: Slaughter the
thundering i915_wait_request herd"), the issue of handling multiple
clients waiting in parallel was brought to our attention. The
requirement was that every client should be woken immediately upon its
request being signaled,
Keep track of the temporary rpm wakerefs used for user access to the
device, so that we can cancel them upon release and clearly identify any
leaks.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/i915_gem.c| 47 +-
As the GT_IRQ power domain implies a wakeref, we can use it inplace of
our existing redundant rpm grab.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/i915_gem.c | 11 ---
Since commit d4ccceb05591 ("drm/i915/icl: Ringbuffer interrupt handling")
we have required a mechanism to avoid touching the interrupt hardware
for breadcrumbs, superseding our mock interface for selftests.
References: d4ccceb05591 ("drm/i915/icl: Ringbuffer interrupt handling")
Signed-off-by:
Frequently, we use intel_runtime_pm_get/_put around a small block.
Formalise that usage by providing a macro to define such a block with an
automatic closure to scope the intel_runtime_pm wakeref to that block,
i.e. macro abuse smelling of python.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
On module load and unload, we grab the POWER_DOMAIN_INIT powerwells and
transfer them to the runtime-pm code. We can use our wakeref tracking to
verify that the wakeref is indeed passed from init to enable, and
disable to fini; and across suspend.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
Track the wakeref used for temporary access to the device, and discard
it upon release so that leaks can be identified.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/i915_pmu.c | 26 +-
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git
Keep hold of the local wakeref used in error handling, to cancel
the tracking upon release so that leaks can be identified.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
Always perform the requested reset, even if we believe the engine is
idle. Presumably there was a reason the caller wanted the reset, and in
the near future we lose the easy tracking for whether the engine is
idle.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_reset.c |
We have two classes of VM, global GTT and per-process GTT. In order to
allow ourselves the freedom to mix both along call chains, distinguish
the two classes with regards to their mutex and lockdep maps.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 10 +-
Supplement the per-engine HWSP with a per-timeline HWSP. That is a
per-request pointer through which we can check a local seqno,
abstracting away the presumption of a global seqno. In this first step,
we point each request back into the engine's HWSP so everything
continues to work with the global
Chris Wilson writes:
> Include the total size of closed vma when reporting the per_ctx_stats of
> debugfs/i915_gem_objects.
>
> Whilst adjusting the context tracking, note that we can simply use our
> list of contexts in i915->contexts rather than circumlocute via
> dev->filelist and the
== Series Details ==
Series: series starting with [01/46] drm/i915: Return immediately if trylock
fails for direct-reclaim
URL : https://patchwork.freedesktop.org/series/54803/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Return
Quoting Tvrtko Ursulin (2019-01-07 12:58:39)
>
> On 07/01/2019 12:16, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-01-07 11:58:13)
> >> On 05/01/2019 02:39, Carlos Santa wrote:
> >>> +static void gen8_watchdog_irq_handler(unsigned long data)
> >>> +{
> >>> + struct intel_engine_cs
On 07/01/2019 13:02, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-07 12:58:39)
On 07/01/2019 12:16, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-07 11:58:13)
On 05/01/2019 02:39, Carlos Santa wrote:
+static void gen8_watchdog_irq_handler(unsigned long data)
+{
+ struct
Quoting Tvrtko Ursulin (2019-01-07 13:43:29)
>
> On 07/01/2019 11:58, Tvrtko Ursulin wrote:
>
> [snip]
>
> >> Note about future interaction with preemption: Preemption could happen
> >> in a command sequence prior to watchdog counter getting disabled,
> >> resulting in watchdog being triggered
Quoting Jani Nikula (2019-01-07 14:51:49)
> Minimal change to nuke the static buf.
>
> Signed-off-by: Jani Nikula
I'm sure there's a grander plan,
Reviewed-by: Chris Wilson
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
On 07/01/2019 13:57, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-07 13:43:29)
On 07/01/2019 11:58, Tvrtko Ursulin wrote:
[snip]
Note about future interaction with preemption: Preemption could happen
in a command sequence prior to watchdog counter getting disabled,
resulting in
On 07/01/2019 12:38, Tvrtko Ursulin wrote:
[snip]
+#define GEN8_TIMESTAMP_CNTS_PER_USEC 12
+#define GEN9_LP_TIMESTAMP_CNTS_PER_USEC 19
+static inline u32 cs_timestamp_in_us(struct drm_i915_private *dev_priv)
+{
+ u32 cs_timestamp_base = dev_priv->cs_timestamp_base;
+
+ if
On Mon, Jan 07, 2019 at 12:15:55PM +0100, Hans de Goede wrote:
> Most PMIC-s use only a single i2c-address, so after verifying the
> i2c-address matches, we can simply pass the call to regmap_update_bits.
>
> This commit adds support for this and hooks this up for the xpower AXP288
> PMIC by
== Series Details ==
Series: drm/i915: Reduce i915_request_alloc retirement to local context
URL : https://patchwork.freedesktop.org/series/54820/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ceb365430726 drm/i915: Reduce i915_request_alloc retirement to local context
-:11:
== Series Details ==
Series: drm/i915/debugfs: store rotation string buffer on stack
URL : https://patchwork.freedesktop.org/series/54816/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5369 -> Patchwork_11201
Summary
On Mon, Jan 7, 2019 at 3:04 PM Vincent Guittot
wrote:
>
> Hi Tvrtko,
>
> On Mon, 31 Dec 2018 at 13:32, Tvrtko Ursulin
> wrote:
> >
> >
> > On 21/12/2018 13:26, Vincent Guittot wrote:
> > > On Fri, 21 Dec 2018 at 12:33, Tvrtko Ursulin
>
> [snip]
>
> > >>
> > >> If it is always monotonic, then
On Mon, Jan 07, 2019 at 12:15:55PM +0100, Hans de Goede wrote:
> Most PMIC-s use only a single i2c-address, so after verifying the
> i2c-address matches, we can simply pass the call to regmap_update_bits.
>
> This commit adds support for this and hooks this up for the xpower AXP288
> PMIC by
On Mon, Jan 07, 2019 at 12:15:56PM +0100, Hans de Goede wrote:
> Add support for PMIC MIPI sequences using the new
> intel_soc_pmic_exec_mipi_pmic_seq_element function.
>
> This fixes the DSI LCD panel not lighting up when not initialized by the
> GOP (because an external monitor was connected)
== Series Details ==
Series: series starting with [01/46] drm/i915: Return immediately if trylock
fails for direct-reclaim
URL : https://patchwork.freedesktop.org/series/54803/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5368_full -> Patchwork_11200_full
On Mon, Jan 07, 2019 at 12:15:53PM +0100, Hans de Goede wrote:
> DSI LCD panels describe an initialization sequence in the Video BIOS
> Tables using so called MIPI sequences. One possible element in these
> sequences is a PMIC specific element of 15 bytes.
>
> Although this is not really an ACPI
These exercise a certain HW misfeature, no longer protected by the
kernel cmdparser due to obsolete userspace requirements.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
---
tests/intel-ci/blacklist.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/intel-ci/blacklist.txt
Minimal change to nuke the static buf.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index c77326a7d058..95813e21ae02
In the continual quest to reduce the amount of global work required when
submitting requests, replace i915_retire_requests() after allocation
failure to retiring just our ring.
References: 11abf0c5a021 ("drm/i915: Limit the backpressure for i915_request
allocation")
Signed-off-by: Chris Wilson
On Mon, Jan 07, 2019 at 12:15:54PM +0100, Hans de Goede wrote:
> Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
> PMIC.
>
> On some CHT devices this fixes the LCD panel not lighting up when it was
> not initialized by the GOP, because an external monitor was plugged in
== Series Details ==
Series: drm/i915: Reduce i915_request_alloc retirement to local context
URL : https://patchwork.freedesktop.org/series/54820/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5369 -> Patchwork_11202
== Series Details ==
Series: ACPI/i915: Add support for PMIC MIPI sequence elements (rev2)
URL : https://patchwork.freedesktop.org/series/54050/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5368_full -> Patchwork_11199_full
Being a mock device, we suffer no DMA restrictions, so set the coherent
mask to 64b.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
Hi Matt,
On Fri, Dec 28, 2018 at 03:51:30PM -0800, Matt Roper wrote:
> Some display controllers can be programmed to present non-black colors
> for pixels not covered by any plane (or pixels covered by the
> transparent regions of higher planes). Compositors that want a UI with
> a solid color
DSI LCD panels describe an initialization sequence in the Video BIOS
Tables using so called MIPI sequences. One possible element in these
sequences is a PMIC specific element of 15 bytes.
Although this is not really an ACPI opregion, the ACPI opregion code is the
closest thing we have. We need to
On Mon, Jan 07, 2019 at 11:12:30AM +, Tvrtko Ursulin wrote:
>
> On 07/01/2019 11:01, Petri Latvala wrote:
> > On Fri, Jan 04, 2019 at 03:37:09PM +, Tvrtko Ursulin wrote:
> > > diff --git a/tests/intel-ci/blacklist.txt b/tests/intel-ci/blacklist.txt
> > > index 73d127603d28..d76a4b3b1c71
If we do not know the underlying swizzle on the HW, we do not know the
full tiling pattern and cannot predict the expected results. This is
often because the swizzle varies between pages and is not as constant as
we naively expected.
Signed-off-by: Chris Wilson
---
On 05/01/2019 02:39, Carlos Santa wrote:
Not checking for BSD2 causes a segfault on GPU revs
with no h/w support for the extra media engines.
Segfault on ULX GT2 (0x591e) follows:
Patch shared by Michel Thierry on IIRC.
[ 468.625970] BUG: unable to handle kernel NULL pointer dereference at
Quoting Tvrtko Ursulin (2019-01-07 13:39:24)
>
> On 07/01/2019 12:50, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-01-07 12:38:47)
> >> On 05/01/2019 02:39, Carlos Santa wrote:
> >>> +/* Return the timer count threshold in microseconds. */
> >>> +int i915_gem_context_get_watchdog(struct
Quoting Jani Nikula (2019-01-07 09:52:43)
> On Sat, 05 Jan 2019, Chris Wilson wrote:
> > CC [M] drivers/gpu/drm/i915/intel_device_info.o
> > drivers/gpu/drm/i915/intel_device_info.c:727: warning: Function parameter
> > or member 'dev_priv' not described in 'intel_device_info_runtime_init'
> >
Hi,
We have had engine reset support in i915 for some time now. So lets call
this work engine watchdog or something, just not engine reset.
By calling it engine reset we have confused sites like Phoronix and some
our users.
Regards,
Tvrtko
On 05/01/2019 02:39, Carlos Santa wrote:
This
Quoting Tvrtko Ursulin (2019-01-07 10:19:44)
>
> On 05/01/2019 01:33, Lucas De Marchi wrote:
> > On Fri, Dec 21, 2018 at 12:29:41PM +, Tvrtko Ursulin wrote:
> >>
> >> On 14/12/2018 18:20, Lucas De Marchi wrote:
> >> we were setting unused entries to uncached, on Icelake they will be set to
>
Quoting Tvrtko Ursulin (2019-01-07 11:58:13)
>
> Hi,
>
> This series has not been recognized by Patchwork as such, nor are the
> patches numbered. Have you used git format-patch - --cover-letter and
> git send-email to send it out?
>
> Rest inline.
>
> On 05/01/2019 02:39, Carlos Santa
On Fri, Jan 04, 2019 at 03:37:09PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> A set of subtests which exercises different paths to our shrinker code
> (including the OOM killer) in predictable and reasonable time budget.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> lib/igt_core.c
Quoting Tvrtko Ursulin (2019-01-07 12:50:24)
>
> On 05/01/2019 02:40, Carlos Santa wrote:
> > +static void gen8_emit_breadcrumb_vcs(struct i915_request *request, u32 *cs)
> > +{
> > + /* w/a: bit 5 needs to be zero for MI_FLUSH_DW address. */
> > + BUILD_BUG_ON(I915_GEM_HWS_INDEX_ADDR &
On 07/01/2019 12:50, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-07 12:38:47)
On 05/01/2019 02:39, Carlos Santa wrote:
+/* Return the timer count threshold in microseconds. */
+int i915_gem_context_get_watchdog(struct i915_gem_context *ctx,
+ struct
On 07/01/2019 11:54, Chris Wilson wrote:
Ignore trying to shrink from i915 if we fail to acquire the struct_mutex
in the shrinker while performing direct-reclaim. The trade-off being
(much) lower latency for non-i915 clients at an increased risk of being
unable to obtain a page from
Since we trust fb->size as either calculated by calc_fb_size() or the
supplied by the user, it invariably isn't page aligned. The mmap
routines and ioctls only deal in pages...
Not sure if fb->size should be page aligned, but that may break
some other drawing tests, so opt to just fix up the mmap
On Mon, Jan 07, 2019 at 01:01:16PM +0200, Joonas Lahtinen wrote:
> Quoting José Roberto de Souza (2019-01-04 19:37:00)
> > According to Workaround database ICL also needs
> > WaEnablePreemptionGranularityControlByUMD, to allow userspace to do
> > fine-granularity preemptions per-context.
>
> I
On 07/01/2019 12:16, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-07 11:58:13)
Hi,
This series has not been recognized by Patchwork as such, nor are the
patches numbered. Have you used git format-patch - --cover-letter and
git send-email to send it out?
Rest inline.
On 05/01/2019
== Series Details ==
Series: series starting with [01/46] drm/i915: Return immediately if trylock
fails for direct-reclaim
URL : https://patchwork.freedesktop.org/series/54803/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5368 -> Patchwork_11200
On 05/01/2019 01:33, Lucas De Marchi wrote:
On Fri, Dec 21, 2018 at 12:29:41PM +, Tvrtko Ursulin wrote:
On 14/12/2018 18:20, Lucas De Marchi wrote:
From: Tomasz Lis
The table has been unified across OSes to minimize virtualization overhead.
The MOCS table is now published as part of
Op 04-01-2019 om 16:52 schreef Souza, Jose:
> On Fri, 2019-01-04 at 15:35 +0100, Maarten Lankhorst wrote:
>> Op 04-01-2019 om 14:28 schreef Souza, Jose:
>>> On Fri, 2019-01-04 at 07:53 +0100, Maarten Lankhorst wrote:
Op 03-01-2019 om 15:21 schreef José Roberto de Souza:
>
Add support for PMIC MIPI sequences using the new
intel_soc_pmic_exec_mipi_pmic_seq_element function.
This fixes the DSI LCD panel not lighting up when not initialized by the
GOP (because an external monitor was connected) on GPD win and GPD pocket
devices.
Specifically the LCD panel seems to
Most PMIC-s use only a single i2c-address, so after verifying the
i2c-address matches, we can simply pass the call to regmap_update_bits.
This commit adds support for this and hooks this up for the xpower AXP288
PMIC by setting the new pmic_i2c_address field.
This fixes the following errors on
Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
PMIC.
On some CHT devices this fixes the LCD panel not lighting up when it was
not initialized by the GOP, because an external monitor was plugged in and
the GOP initialized only the external monitor.
Reviewed-by: Mika
Hi All,
This patch-set has been on the list for a while now, it would be nice
if we can get this merged. I already have an ack for merging the ACPI
bits through drm-intel-next-queued, so we really need an ack for
the last 2 patches from one of the intel-gfx folks so that I can push
this to dinq.
Move the debug pretty printer into a standalone routine prior to
extending it in upcoming feature work.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_engine_cs.c | 55 ++--
drivers/gpu/drm/i915/intel_lrc.c | 58
== Series Details ==
Series: series starting with [01/46] drm/i915: Return immediately if trylock
fails for direct-reclaim
URL : https://patchwork.freedesktop.org/series/54803/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7b61c9e7b9d7 drm/i915: Return immediately if trylock
== Series Details ==
Series: ACPI/i915: Add support for PMIC MIPI sequence elements (rev2)
URL : https://patchwork.freedesktop.org/series/54050/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5368 -> Patchwork_11199
Summary
Quoting Mika Kuoppala (2019-01-07 13:14:00)
> Chris Wilson writes:
> > @@ -2011,6 +2011,8 @@ static int i915_drm_suspend_late(struct drm_device
> > *dev, bool hibernation)
> >
> > out:
> > enable_rpm_wakeref_asserts(dev_priv);
> > + if (!dev_priv->uncore.user_forcewake.count)
> > +
On 07/01/2019 11:58, Tvrtko Ursulin wrote:
[snip]
Note about future interaction with preemption: Preemption could happen
in a command sequence prior to watchdog counter getting disabled,
resulting in watchdog being triggered following preemption (e.g. when
watchdog had been enabled in the low
On Thu, Jan 03, 2019 at 10:16:54AM +, Chris Wilson wrote:
> Quoting Maarten Lankhorst (2019-01-03 09:03:27)
> > Op 30-12-2018 om 13:28 schreef Chris Wilson:
> > > Delay the drm_modeset_acquire_init() until after we check for an
> > > allocation failure so that we can return immediately upon
On 05/01/2019 02:39, Carlos Santa wrote:
From: Michel Thierry
Final enablement patch for GPU hang detection using watchdog timeout.
Using the gem_context_setparam ioctl, users can specify the desired
timeout value in microseconds, and the driver will do the conversion to
'timestamps'.
The
Quoting Tvrtko Ursulin (2019-01-07 12:52:28)
>
> On 07/01/2019 12:31, Chris Wilson wrote:
> > Quoting Michał Winiarski (2019-01-07 12:27:07)
> >> On Fri, Jan 04, 2019 at 03:37:09PM +, Tvrtko Ursulin wrote:
> >>> From: Tvrtko Ursulin
> >>>
> >>> A set of subtests which exercises different
Chris Wilson writes:
> Everytime we take a wakeref, record the stack trace of where it was
> taken; clearing the set if we ever drop back to no owners. For debugging
> a rpm leak, we can look at all the current wakerefs and check if they
> have a matching rpm_put.
>
> Signed-off-by: Chris Wilson
Hi Tvrtko,
On Mon, 31 Dec 2018 at 13:32, Tvrtko Ursulin
wrote:
>
>
> On 21/12/2018 13:26, Vincent Guittot wrote:
> > On Fri, 21 Dec 2018 at 12:33, Tvrtko Ursulin
[snip]
> >>
> >> If it is always monotonic, then worst case we report one wrong sample,
> >> which I guess is still not ideal since
On Sat, 05 Jan 2019, Chris Wilson wrote:
> CC [M] drivers/gpu/drm/i915/intel_device_info.o
> drivers/gpu/drm/i915/intel_device_info.c:727: warning: Function parameter or
> member 'dev_priv' not described in 'intel_device_info_runtime_init'
> drivers/gpu/drm/i915/intel_device_info.c:727:
On 04/01/2019 23:47, Lucas De Marchi wrote:
On Fri, Dec 21, 2018 at 11:56:43AM +, Tvrtko Ursulin wrote:
On 14/12/2018 18:20, Lucas De Marchi wrote:
Instead of checking the gen number every time we need to know the max
number of entries, just save it into the table struct so we don't need
== Series Details ==
Series: series starting with [1/2] drm/i915: Prevent a race during
I915_GEM_MMAP ioctl with WC set
URL : https://patchwork.freedesktop.org/series/54797/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5364_full -> Patchwork_11198_full
Quoting José Roberto de Souza (2019-01-04 19:37:00)
> According to Workaround database ICL also needs
> WaEnablePreemptionGranularityControlByUMD, to allow userspace to do
> fine-granularity preemptions per-context.
I must wonder where is the userspace component that needs this, and why
it hasn't
On Fri, Jan 04, 2019 at 03:37:09PM +, Tvrtko Ursulin wrote:
> diff --git a/tests/intel-ci/blacklist.txt b/tests/intel-ci/blacklist.txt
> index 73d127603d28..d76a4b3b1c71 100644
> --- a/tests/intel-ci/blacklist.txt
> +++ b/tests/intel-ci/blacklist.txt
> @@ -60,6 +60,7 @@
Chris Wilson writes:
> Haswell also requires the RING_IMR flush for its unique vebox setup to
> avoid losing interrupts, as per 476af9c26063 ("drm/i915/gen6: Flush
> RING_IMR changes before changing the global GT IMR"):
>
> On Baytail, notably, we can still detect missed interrupt syndrome
>
On 05/01/2019 02:39, Carlos Santa wrote:
From: Michel Thierry
Emit the required commands into the ring buffer for starting and
stopping the watchdog timer before/after batch buffer start during
batch buffer submission.
v2: Support watchdog threshold per context engine, merge lri commands,
Quoting Michał Winiarski (2019-01-07 12:27:07)
> On Fri, Jan 04, 2019 at 03:37:09PM +, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > A set of subtests which exercises different paths to our shrinker code
> > (including the OOM killer) in predictable and reasonable time budget.
> >
On Skylake, BB_OFFSET seems to be unstable. Since this is an
offset into the batch at the time of CS execution, it should be actively
written to as we read from the register so allow it a qword of
discrepancy (since the CS should be reading in qwords). This still
allows us to detect dirt across
On 05/01/2019 02:40, Carlos Santa wrote:
From: Michel Thierry
On command streams that could potentially hang the GPU after a last
flush command, it's best not to cancel the watchdog
until after all commands have executed.
Patch shared by Michel Thierry through IIRC after reproduction on
On Sat, Jan 05, 2019 at 12:47:12AM +0100, Daniel Kamil Kozar wrote:
> Hello.
> After upgrading the kernel to 4.20, I noticed that the boot time
> increased from about 5 seconds to 25 seconds. My machine is an Asus
> K53SV with an Intel i7-2630QM, i.e. Sandy Bridge. I have an external
> display
Quoting Patchwork (2019-01-07 10:44:01)
> ### IGT changes ###
>
> Possible regressions
>
> * igt@gem_userptr_blits@readonly-unsync:
> - shard-apl: PASS -> TIMEOUT
>
> * igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled:
> - shard-apl: PASS -> FAIL
>
On 07/01/2019 11:01, Petri Latvala wrote:
On Fri, Jan 04, 2019 at 03:37:09PM +, Tvrtko Ursulin wrote:
diff --git a/tests/intel-ci/blacklist.txt b/tests/intel-ci/blacklist.txt
index 73d127603d28..d76a4b3b1c71 100644
--- a/tests/intel-ci/blacklist.txt
+++ b/tests/intel-ci/blacklist.txt
@@
Quoting Mika Kuoppala (2019-01-07 11:21:32)
> Chris Wilson writes:
>
> > Haswell also requires the RING_IMR flush for its unique vebox setup to
> > avoid losing interrupts, as per 476af9c26063 ("drm/i915/gen6: Flush
> > RING_IMR changes before changing the global GT IMR"):
> >
> > On Baytail,
Make i915_gem_set_wedged() and i915_gem_unset_wedged() behaviour more
consistently if called concurrently.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem.c | 32 ++-
drivers/gpu/drm/i915/i915_gpu_error.h | 4 ++-
Quoting Tvrtko Ursulin (2019-01-07 12:38:47)
> On 05/01/2019 02:39, Carlos Santa wrote:
> > +/* Return the timer count threshold in microseconds. */
> > +int i915_gem_context_get_watchdog(struct i915_gem_context *ctx,
> > + struct drm_i915_gem_context_param *args)
> >
On 07/01/2019 12:54, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-07 12:50:24)
On 05/01/2019 02:40, Carlos Santa wrote:
+static void gen8_emit_breadcrumb_vcs(struct i915_request *request, u32 *cs)
+{
+ /* w/a: bit 5 needs to be zero for MI_FLUSH_DW address. */
+
Quoting Chris Wilson (2019-01-05 03:46:52)
> CC [M] drivers/gpu/drm/i915/intel_device_info.o
> drivers/gpu/drm/i915/intel_device_info.c:727: warning: Function parameter or
> member 'dev_priv' not described in 'intel_device_info_runtime_init'
> drivers/gpu/drm/i915/intel_device_info.c:727:
As debugfs has a simple pattern of taking a rpm wakeref around the user
access, we can track the local reference and drop it as soon as
possible.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 135 +---
1 file changed, 82
To allow requests to forgo a common execution timeline, one question we
need to be able to answer is "is this request running?". To track
whether a request has started on HW, we can emit a breadcrumb at the
beginning of the request and check its timeline's HWSP to see if the
breadcrumb has
In preparation for the next few commits, make resetting the GPU atomic.
Currently, we have prepared gen6+ for atomic resetting of individual
engines, but now there is a requirement to perform the whole device
level reset (just the register poking) from inside an atomic context.
Signed-off-by:
Currently, the list of timelines is serialised by the struct_mutex, but
to alleviate difficulties with using that mutex in future, move the
list management under its own dedicated mutex.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
Our goal is to remove struct_mutex and replace it with fine grained
locking. One of the thorny issues is our eviction logic for reclaiming
space for an execbuffer (or GTT mmaping, among a few other examples).
While eviction itself is easy to move under a per-VM mutex, performing
the activity
To correctly simulate preemption between contexts, we need independent
timelines along each context. Make it so.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/mock_engine.c | 90 ++--
1 file changed, 47 insertions(+), 43 deletions(-)
diff --git
Currently Ironlake operates under the assumption that rpm awake (and its
error checking is disabled). As such, we have missed a few places where we
access registers without taking the rpm wakeref and thus trigger
warnings. intel_ips being one culprit.
As this involved adding a potentially
The global seqno is defunct and so we have no meaningful indicator of
forward progress for an engine. You need to listen to the request
signaling tracepoints instead.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_irq.c | 2 --
drivers/gpu/drm/i915/i915_trace.h | 25
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