[PATCH] msm: iommu: use dev_get_platdata()

2014-10-30 Thread Kiran Padwal
Use the wrapper function for retrieving the platform data instead of accessing dev-platform_data directly. Signed-off-by: Kiran Padwal kiran.pad...@smartplayin.com --- drivers/iommu/msm_iommu_dev.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH] iommu/omap: use dev_get_platdata()

2014-10-30 Thread Kiran Padwal
Use the wrapper function for retrieving the platform data instead of accessing dev-platform_data directly. Signed-off-by: Kiran Padwal kiran.pad...@smartplayin.com --- drivers/iommu/omap-iommu.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

2014-10-30 Thread Terje Bergström
On 30.10.2014 12:03, Alexandre Courbot wrote: I had to change the .reg of TEGRA_SWGROUP_GPU to 0xaac to get the IOMMU to work with GK20A. The reason is still not completely clear to me, but if you look at the TRM you see that 0xaa8 is basically constant, with the SMMU translation bit hardcoded

Re: [Patch Part2 v3 15/24] x86, MSI: Use hierarchy irqdomain to manage MSI interrupts

2014-10-30 Thread Thomas Gleixner
On Thu, 30 Oct 2014, Jiang Liu wrote: On 2014/10/29 17:19, Thomas Gleixner wrote: IOAPIC runs into the same situation, but I need some more time to find a solution:) I'm sure you will! Hi Thomas, I have reviewed IOAPIC related change again, but the conclusion may not be what you

Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

2014-10-30 Thread Terje Bergström
On 30.10.2014 12:22, Alexandre Courbot wrote: So should I understand that the GPU group is for addresses without bit 34 set (hence forcibly disabled) while GPUB is used when that bit is set? Or is it something else? That's exactly correct. And only GPUB can be programmed to be SMMU translated.

Re: [PATCH v7 2/2] iommu/arm-smmu: add support for iova_to_phys through ATS1PR

2014-10-30 Thread Will Deacon
On Wed, Oct 29, 2014 at 09:13:40PM +, Mitchel Humpherys wrote: Currently, we provide the iommu_ops.iova_to_phys service by doing a table walk in software to translate IO virtual addresses to physical addresses. On SMMUs that support it, it can be useful to ask the SMMU itself to do the

Re: [PATCH v7 1/2] iopoll: Introduce memory-mapped IO polling macros

2014-10-30 Thread Will Deacon
[adding Arnd, since he reviewed an earlier version of this and we could do with his ack] On Wed, Oct 29, 2014 at 09:13:39PM +, Mitchel Humpherys wrote: From: Matt Wagantall ma...@codeaurora.org It is sometimes necessary to poll a memory-mapped register until its value satisfies some

Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

2014-10-30 Thread Alexandre Courbot
diff --git a/drivers/memory/tegra/tegra124-mc.c b/drivers/memory/tegra/tegra124-mc.c ... +static const struct tegra_smmu_swgroup tegra124_swgroups[] = { + { .swgroup = TEGRA_SWGROUP_DC,.reg = 0x240 }, + { .swgroup = TEGRA_SWGROUP_DCB, .reg = 0x244 }, + {

Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

2014-10-30 Thread Alexandre Courbot
On 10/30/2014 08:04 PM, Terje Bergström wrote: On 30.10.2014 12:22, Alexandre Courbot wrote: So should I understand that the GPU group is for addresses without bit 34 set (hence forcibly disabled) while GPUB is used when that bit is set? Or is it something else? That's exactly correct. And

Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

2014-10-30 Thread Terje Bergström
On 30.10.2014 15:35, Alexandre Courbot wrote: Great, thanks for confirming! Thierry, how do you want to address this? We could change the register for the GPU group, or (maybe preferable if we want to reflect the actual hardware state) add the GPUB group. I don't know if that would be easy

Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

2014-10-30 Thread Alexandre Courbot
On Thu, Oct 30, 2014 at 7:18 PM, Terje Bergström tbergst...@nvidia.com wrote: On 30.10.2014 12:03, Alexandre Courbot wrote: I had to change the .reg of TEGRA_SWGROUP_GPU to 0xaac to get the IOMMU to work with GK20A. The reason is still not completely clear to me, but if you look at the TRM

Re: [PATCH 06/12] ARM: tegra: Add memory controller support for Tegra20

2014-10-30 Thread Thierry Reding
On Fri, Oct 17, 2014 at 10:43:56AM -0700, David Riley wrote: Hi Thierry, On Mon, Oct 13, 2014 at 3:33 AM, Thierry Reding thierry.red...@gmail.com wrote: From: Thierry Reding tred...@nvidia.com Collapses the old memory-controller and IOMMU device tree nodes into a single node to more

Re: [PATCH v3 01/12] clk: tegra: Implement memory-controller clock

2014-10-30 Thread Thierry Reding
On Mon, Oct 20, 2014 at 01:02:45PM +0200, Tomeu Vizoso wrote: On 13 October 2014 12:33, Thierry Reding thierry.red...@gmail.com wrote: [...] +struct clk *tegra_clk_register_mc(const char *name, const char *parent_name, + void __iomem *reg, spinlock_t *lock)

Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

2014-10-30 Thread Thierry Reding
On Wed, Oct 15, 2014 at 03:09:30PM -0700, Olof Johansson wrote: Hi, Oh, a few more comments: On Mon, Oct 13, 2014 at 3:33 AM, Thierry Reding thierry.red...@gmail.com wrote: diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index c32d31981be3..1c932e7e7b8d 100644 ---

Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

2014-10-30 Thread Thierry Reding
On Wed, Oct 15, 2014 at 03:05:36PM -0700, Olof Johansson wrote: Hi, On Mon, Oct 13, 2014 at 3:33 AM, Thierry Reding thierry.red...@gmail.com wrote: [...] diff --git a/drivers/memory/tegra/tegra-mc.c b/drivers/memory/tegra/tegra-mc.c new file mode 100644 index

Re: [PATCH v7 1/2] iopoll: Introduce memory-mapped IO polling macros

2014-10-30 Thread Mitchel Humpherys
On Thu, Oct 30 2014 at 05:00:23 AM, Arnd Bergmann a...@arndb.de wrote: On Thursday 30 October 2014 11:41:00 Will Deacon wrote: + +#define readl_poll_timeout(addr, val, cond, delay_us, timeout_us) \ + readx_poll_timeout(readl, addr, val, cond, delay_us, timeout_us) + +#define