Re: Jailhouse isolation test case

On 21.04.22 17:25, Jean de Bonfils wrote: > Hi everyone, > I am looking for scenarios/test cases that demonstrate isolation between > cells.  > For example, test cases that demonstrates that an inmate can't access > peripheral devices it is not supposed to have access to or that

Jailhouse isolation test case

Hi everyone, I am looking for scenarios/test cases that demonstrate isolation between cells. For example, test cases that demonstrates that an inmate can't access peripheral devices it is not supposed to have access to or that it can't read memory of another cell Do you know where I can find

Re: [PATCH v3.5] inmates: x86: add cache access time test

On 29.10.20 20:59, Ralf Ramsauer wrote: > On x86_64 systems, this test inmate measures the time that is required to read > a value from main memory. Via rdtsc, it measures the CPU cycles that are > required for the access. Access can either happen cached, or uncached. In case > of unc

[PATCH v3.5] inmates: x86: add cache access time test

On x86_64 systems, this test inmate measures the time that is required to read a value from main memory. Via rdtsc, it measures the CPU cycles that are required for the access. Access can either happen cached, or uncached. In case of uncached access, the cache line will be flushed before access

Re: [EXT] Re: [PATCH v3 2/2] inmates: x86: add cache access time test

On 10/29/20 8:06 PM, Jan Kiszka wrote: > On 29.10.20 17:39, Ralf Ramsauer wrote: >> >> >> On 29/10/2020 17:16, Jan Kiszka wrote: >>> On 29.10.20 15:55, Ralf Ramsauer wrote: >>>> On x86_64 systems, this test inmate measures the time that is required t

Re: [PATCH v3 2/2] inmates: x86: add cache access time test

On 29.10.20 17:39, Ralf Ramsauer wrote: > > > On 29/10/2020 17:16, Jan Kiszka wrote: >> On 29.10.20 15:55, Ralf Ramsauer wrote: >>> On x86_64 systems, this test inmate measures the time that is required to >>> read >>> a value from main mem

Re: [PATCH v3 2/2] inmates: x86: add cache access time test

On 29/10/2020 17:16, Jan Kiszka wrote: > On 29.10.20 15:55, Ralf Ramsauer wrote: >> On x86_64 systems, this test inmate measures the time that is required to >> read >> a value from main memory. Via rdtsc, it measures the CPU cycles that are >> required for the acces

Re: [PATCH v3 2/2] inmates: x86: add cache access time test

On 29.10.20 15:55, Ralf Ramsauer wrote: > On x86_64 systems, this test inmate measures the time that is required to read > a value from main memory. Via rdtsc, it measures the CPU cycles that are > required for the access. Access can either happen cached, or uncached. In case > of unc

[PATCH v3 2/2] inmates: x86: add cache access time test

On x86_64 systems, this test inmate measures the time that is required to read a value from main memory. Via rdtsc, it measures the CPU cycles that are required for the access. Access can either happen cached, or uncached. In case of uncached access, the cache line will be flushed before access

Re: [PATCH v2 2/2] inmates: x86: add cache access time test

On 27.10.20 22:40, Ralf Ramsauer wrote: > On x86_64 systems, this test inmate measures the time that is required to read > a value from main memory. Via rdtsc, it measures the CPU cycles that are > required for the access. Access can either happen cached, or uncached. In case > of unc

[PATCH v2 2/2] inmates: x86: add cache access time test

On x86_64 systems, this test inmate measures the time that is required to read a value from main memory. Via rdtsc, it measures the CPU cycles that are required for the access. Access can either happen cached, or uncached. In case of uncached access, the cache line will be flushed before access

Re: [PATCH] inmates: x86: add cache access time test

On 26.10.20 14:11, Ralf Ramsauer wrote: > On x86_64 systems, this test inmate measures the time that is required > to read a value from main memory. Via rdtsc, it measures the CPU cycles > that are required for the access. Acces can either happen cached, or "Access"

[PATCH] inmates: x86: add cache access time test

On x86_64 systems, this test inmate measures the time that is required to read a value from main memory. Via rdtsc, it measures the CPU cycles that are required for the access. Acces can either happen cached, or uncached. In case of uncached access, the cache line will be flushed before access

[PATCH v2 06/46] arm64: smmu: Drop test for non-zero base address

From: Jan Kiszka Setting type to JAILHOUSE_IOMMU_ARM_MMU500 already implies that the entry is valid. Signed-off-by: Jan Kiszka --- hypervisor/arch/arm64/smmu.c | 35 --- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git

Re: [EXT] Re: [RFC PATCH] inmates: x86: add cache access time test

>>>>> On 10/4/20 8:38 PM, Jan Kiszka wrote: >>>>>> On 03.10.20 01:56, Ralf Ramsauer wrote: >>>>>>> On x86_64 systems, this test inmate measures the time that is required >>>>>>> to read a value from main memory. Via rdtsc,

Re: [EXT] Re: [RFC PATCH] inmates: x86: add cache access time test

> On 03.10.20 01:56, Ralf Ramsauer wrote: >>>>>> On x86_64 systems, this test inmate measures the time that is required >>>>>> to read a value from main memory. Via rdtsc, it measures the CPU cycles >>>>>> that are required for the access. A

Re: [EXT] Re: [RFC PATCH] inmates: x86: add cache access time test

On 05/10/2020 15:36, Jan Kiszka wrote: > On 05.10.20 15:33, Ralf Ramsauer wrote: >> >> >> On 04/10/2020 22:16, Ralf Ramsauer wrote: >>> On 10/4/20 8:38 PM, Jan Kiszka wrote: >>>> On 03.10.20 01:56, Ralf Ramsauer wrote: >>>>> On x86_64 sys

Re: [RFC PATCH] inmates: x86: add cache access time test

On 05.10.20 15:33, Ralf Ramsauer wrote: > > > On 04/10/2020 22:16, Ralf Ramsauer wrote: >> On 10/4/20 8:38 PM, Jan Kiszka wrote: >>> On 03.10.20 01:56, Ralf Ramsauer wrote: >>>> On x86_64 systems, this test inmate measures the time that is required >&g

Re: [RFC PATCH] inmates: x86: add cache access time test

On 04/10/2020 22:16, Ralf Ramsauer wrote: > On 10/4/20 8:38 PM, Jan Kiszka wrote: >> On 03.10.20 01:56, Ralf Ramsauer wrote: >>> On x86_64 systems, this test inmate measures the time that is required >>> to read a value from main memory. Via rdtsc,

Re: [RFC PATCH] inmates: x86: add cache access time test

On 10/4/20 8:38 PM, Jan Kiszka wrote: > On 03.10.20 01:56, Ralf Ramsauer wrote: >> On x86_64 systems, this test inmate measures the time that is required >> to read a value from main memory. Via rdtsc, it measures the CPU cycles >> that are required for the access. Acces can

[PATCH 05/45] arm64: smmu: Drop test for non-zero base address

From: Jan Kiszka Setting type to JAILHOUSE_IOMMU_ARM_MMU500 already implies that the entry is valid. Signed-off-by: Jan Kiszka --- hypervisor/arch/arm64/smmu.c | 35 --- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git

Re: [RFC PATCH] inmates: x86: add cache access time test

On 03.10.20 01:56, Ralf Ramsauer wrote: > On x86_64 systems, this test inmate measures the time that is required > to read a value from main memory. Via rdtsc, it measures the CPU cycles > that are required for the access. Acces can either happen cached, or > uncached. In case of unc

[RFC PATCH] inmates: x86: add cache access time test

On x86_64 systems, this test inmate measures the time that is required to read a value from main memory. Via rdtsc, it measures the CPU cycles that are required for the access. Acces can either happen cached, or uncached. In case of uncached access, the cache line will be flushed before access

Re: Libvirt driver for Jailhouse- Test set up in jailhouse demo-image

0 10:14, Prakhar Bansal wrote: > > Hi Jan, > > > > I am not able to set up the test environment by mounting host > folders > > into the jailhouse demo image- QEMU/KVM Intel-x86 virtual > target, as you > > sugge

Re: Libvirt driver for Jailhouse- Test set up in jailhouse demo-image

works. > > Thanks, > Prakhar > > On Tue, Jul 21, 2020 at 2:12 AM Jan Kiszka wrote: > >> On 21.07.20 10:14, Prakhar Bansal wrote: >> > Hi Jan, >> > >> > I am not able to set up the test environment by mounting host folders >> > into t

Re: Libvirt driver for Jailhouse- Test set up in jailhouse demo-image

Thank you, Jan. It works. Thanks, Prakhar On Tue, Jul 21, 2020 at 2:12 AM Jan Kiszka wrote: > On 21.07.20 10:14, Prakhar Bansal wrote: > > Hi Jan, > > > > I am not able to set up the test environment by mounting host folders > > into the jailhouse demo image- QEMU/K

Re: Libvirt driver for Jailhouse- Test set up in jailhouse demo-image

On 21.07.20 10:14, Prakhar Bansal wrote: Hi Jan, I am not able to set up the test environment by mounting host folders into the jailhouse demo image- QEMU/KVM Intel-x86 virtual target, as you suggested last week. Since this demo-image is created directly from QEMU-system and not by using

Libvirt driver for Jailhouse- Test set up in jailhouse demo-image

Hi Jan, I am not able to set up the test environment by mounting host folders into the jailhouse demo image- QEMU/KVM Intel-x86 virtual target, as you suggested last week. Since this demo-image is created directly from QEMU-system and not by using Libvirt, I can't manage it through virsh/virt

[jh-images][PATCH 19/18] ci: Filter out rpi4 target from -rt test build

From: Jan Kiszka Not supported so far. Signed-off-by: Jan Kiszka --- .gitlab-ci.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 9c94802..b91f2dd 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -16,4 +16,5 @@ all: - export KAS_TARGET

Re: [PATCH 2/3] inmates: demos: add PL irq lattency measurement test for baremetal inmate

Could you explain why we would like to have this test case, compared to the gic-demo? Jan On 24.10.19 18:41, Alex Largacha wrote: > Signed-off-by: Alex Largacha > --- > inmates/demos/arm/pl-irq-demo.c | 170 > > inmates/demos/arm64/Ma

[PATCH 2/3] inmates: demos: add PL irq lattency measurement test for baremetal inmate

/* gpio to 0 */ + mmio_write32((p_gpio_capture + GPIO_DATA), 0x0); + printk("IRQ fired: lattency %u ns\n", taux * NSEC_PER_CNT); + capture_timer_reload(); +} + +void inmate_main(void) { + printk("Jailhouse IRQ lattency test ...\n"); + + map_range((void *)PL_DEVICES_BASE_

Re: [PATCH v4 8/8] inmates: x86: Add SSE/AVX test inmate

On 14.06.19 16:09, Jan Kiszka wrote: On 13.06.19 22:04, Ralf Ramsauer wrote: Depending on availability, this inmates executes some SSE/AVX instructions, compares the result against an expected result and exits. Signed-off-by: Ralf Ramsauer ---   inmates/tests/x86/Makefile  |  7 ++-  

Re: [PATCH v4 8/8] inmates: x86: Add SSE/AVX test inmate

On 13.06.19 22:04, Ralf Ramsauer wrote: Depending on availability, this inmates executes some SSE/AVX instructions, compares the result against an expected result and exits. Signed-off-by: Ralf Ramsauer --- inmates/tests/x86/Makefile | 7 ++- inmates/tests/x86/sse-demo-32.c | 1 +

[PATCH v4 8/8] inmates: x86: Add SSE/AVX test inmate

543.55; + + printk("Testing SSE...\n"); + asm volatile("addps %1, %0\t\n" +: "+x"(f_result) : "x"(f_addend)); + /* Test raw result */ + EXPECT_E

Re: [PATCH v3 10/10] inmates: x86: Add SSE/AVX test inmate

On 11.06.19 20:54, Ralf Ramsauer wrote: +    } + +    { Is there an "if" missing? If not, please format and indent in a normal way. +    double a, b, result; I use those brackets to scope a, b, and result. Not ok? Then I move the variable declaration to the top. Yes, please, that

Re: [PATCH v3 10/10] inmates: x86: Add SSE/AVX test inmate

  x86_cpu_features.xsave, x86_cpu_features.sse, >> +   x86_cpu_features.sse2, x86_cpu_features.sse3, >> +   x86_cpu_features.sse4_1, x86_cpu_features.sse4_2, >> +   x86_cpu_features.avx, x86_cpu_features.pclmulqdq); >> + >> +    if

Re: [PATCH v3 10/10] inmates: x86: Add SSE/AVX test inmate

printk("Testing SSE...\n"); + asm volatile("addps %1, %0\t\n" +: "+x"(result) : "x"(addend)); + /* Test raw result */ + EXPECT_EQUAL_U32(*(uns

[PATCH v3 10/10] inmates: x86: Add SSE/AVX test inmate

...\n"); + asm volatile("addps %1, %0\t\n" +: "+x"(result) : "x"(addend)); + /* Test raw result */ + EXPECT_EQUAL_U32(*(unsigned int*), 0x4426c000); + } + + { +

[siemens/jailhouse] 6ca605: inmates: x86: mmio: fix data width of test

: M inmates/tests/x86/mmio-access.c Log Message: --- inmates: x86: mmio: fix data width of test The sequence 67 48 a1 f8 1f 10 00 is "addr32 mov 0x101ff8, %rax". In fact, data is accessed 64-bit wide, and not 32-bit wide as the comment stated, and as the compariso

Re: [PATCH] inmates: x86: mmio: fix data width of test

asm volatile("addr32 mov 0x101ff8, %%rax" : "=a" (reg64) : "a" (0)); - EXPECT_EQUAL((u32)reg64, (u32)pattern); + EXPECT_EQUAL(reg64, pattern); printk("MMIO read test %s\n\n", all_passed ? "passed" : "

[PATCH] inmates: x86: mmio: fix data width of test

le("addr32 mov 0x101ff8, %%rax" : "=a" (reg64) : "a" (0)); - EXPECT_EQUAL((u32)reg64, (u32)pattern); + EXPECT_EQUAL(reg64, pattern); printk("MMIO read test %s\n\n", all_passed ? "passed" : "FAILED"); -- 2.21.0 -- Yo

[PATCH v2 6/6] inmates: x86: Add SSE/AVX test inmate

...\n"); + asm volatile("addps %1, %0\t\n" +: "+x"(result) : "x"(addend)); + /* Test raw result */ + EXPECT_EQUAL_U32(*(unsigned int*), 0x4426c000); + } + + { +

[siemens/jailhouse] b94228: inmates: Fix RIP-relative test mmio-access

paths: M inmates/tests/x86/mmio-access.c Log Message: --- inmates: Fix RIP-relative test mmio-access Avoid using the cmdline as basis which can move around - as in 91332fa77903. Also makes the thing more readable. Reported-by: Ralf Ramsauer Signed-off-by: Jan Kiszka

[siemens/jailhouse] fe7ec7: Documentation: x86: test-device: document the test...

) Changed paths: M Documentation/hypervisor-configuration.md M hypervisor/arch/x86/test-device.c M inmates/tests/x86/mmio-access.c Log Message: --- Documentation: x86: test-device: document the test-device There was no documentation so far. Let's mention

[siemens/jailhouse] fe7ec7: Documentation: x86: test-device: document the test...

paths: M Documentation/hypervisor-configuration.md M hypervisor/arch/x86/test-device.c M inmates/tests/x86/mmio-access.c Log Message: --- Documentation: x86: test-device: document the test-device There was no documentation so far. Let's mention it in hypervisor

Re: [PATCH v2] Documentation: x86: test-device: document the test-device

On 07.05.19 21:19, Ralf Ramsauer wrote: There was no documentation so far. Let's mention it in hypervisor-configuration.md, and add some comments to the code. Signed-off-by: Ralf Ramsauer --- Documentation/hypervisor-configuration.md | 6 ++ hypervisor/arch/x86/test-device.c | 1

[PATCH v2] Documentation: x86: test-device: document the test-device

There was no documentation so far. Let's mention it in hypervisor-configuration.md, and add some comments to the code. Signed-off-by: Ralf Ramsauer --- Documentation/hypervisor-configuration.md | 6 ++ hypervisor/arch/x86/test-device.c | 1 + inmates/tests/x86/mmio-access.c

[siemens/jailhouse] 0d5bf1: x86: test-device: rename comm_base to mmio_base

: M hypervisor/arch/x86/test-device.c Log Message: --- x86: test-device: rename comm_base to mmio_base the name comm_base is misleading: the adress is in fact one page inside comm_base. Guests call this page mmio_base, so let's call it mmio_base as well. Signed-off-by: Ralf

Re: [PATCH] Documentation: x86: test-device: document the test-device

On 07.05.19 14:23, Ralf Ramsauer wrote: There was no documentation so far. Let's at least mention it in hypervisor-configuration.md. Signed-off-by: Ralf Ramsauer --- Documentation/hypervisor-configuration.md | 12 1 file changed, 12 insertions(+) diff --git

[PATCH] Documentation: x86: test-device: document the test-device

There was no documentation so far. Let's at least mention it in hypervisor-configuration.md. Signed-off-by: Ralf Ramsauer --- Documentation/hypervisor-configuration.md | 12 1 file changed, 12 insertions(+) diff --git a/Documentation/hypervisor-configuration.md

Re: [PATCH] x86: test-device: rename comm_base to mmio_base

On 07.05.19 00:01, Ralf Ramsauer wrote: the name comm_base is misleading: the adress is in fact one page inside comm_base. Guests call this page mmio_base, so let's call it mmio_base as well. Signed-off-by: Ralf Ramsauer --- hypervisor/arch/x86/test-device.c | 8 1 file changed, 4

[PATCH] x86: test-device: rename comm_base to mmio_base

the name comm_base is misleading: the adress is in fact one page inside comm_base. Guests call this page mmio_base, so let's call it mmio_base as well. Signed-off-by: Ralf Ramsauer --- hypervisor/arch/x86/test-device.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git

[siemens/jailhouse] b94228: inmates: Fix RIP-relative test mmio-access

: M inmates/tests/x86/mmio-access.c Log Message: --- inmates: Fix RIP-relative test mmio-access Avoid using the cmdline as basis which can move around - as in 91332fa77903. Also makes the thing more readable. Reported-by: Ralf Ramsauer Signed-off-by: Jan Kiszka -- You received

[PATCH] inmates: Fix RIP-relative test mmio-access

From: Jan Kiszka Avoid using the cmdline as basis which can move around - as in 91332fa77903. Also makes the thing more readable. Reported-by: Ralf Ramsauer Signed-off-by: Jan Kiszka --- inmates/tests/x86/mmio-access.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

Re: Build a bare metal test appliation

On 08.11.18 02:45, jjzhu1...@gmail.com wrote: Hi all, I am using Xilinx Ultrazed SOM board (Arm64) Does anyone can share some light on how to create a test bootable application (just print "hello world") with Jailhouse. I am trying to reuse the inmates configuration of zynqmp-

Build a bare metal test appliation

Hi all, I am using Xilinx Ultrazed SOM board (Arm64) Does anyone can share some light on how to create a test bootable application (just print "hello world") with Jailhouse. I am trying to reuse the inmates configuration of zynqmp-zcu102-gic-demo.cell and run it on ARM3 as configur

[PATCH 5/5] inmates: tests: Add x86-32 MMIO test case

EXPECT_EQUAL(a, b) evaluate(a, b, __LINE__) + +static bool all_passed = true; + +static void evaluate(u32 a, u32 b, int line) +{ + bool passed = (a == b); + + printk("Test at line #%d %s\n", line, passed ? "passed" : "FAILED"); + if (!passed)

[siemens/jailhouse] 53653d: x86: Add MMIO access test device

27 Apr 2018) Changed paths: M hypervisor/arch/x86/Kbuild A hypervisor/arch/x86/test-device.c M include/jailhouse/cell-config.h Log Message: --- x86: Add MMIO access test device On x86, we unfortunately need to parse the guest instruction that triggered an MMIO

[PATCH v2 06/16] x86: Add MMIO access test device

for such tests. The test creates a MMIO target page right after the Communication Page. Write accesses to the virtual registers 0xff8..0xfff are stored per cell, read accesses reproduce that written value. The virtual registers are backed by the Communication Page of the same cell at the same address

Re: [PATCH 06/16] x86: Add MMIO access test device

ion that >> triggered an MMIO access interception. This parser started to be small >> and simple - and then real life bit. It already passed the point where >> we should have added systematic tests. >> >> This is the hypervisor-located building block for such tests. T

Re: [PATCH 06/16] x86: Add MMIO access test device

r started to be small > and simple - and then real life bit. It already passed the point where > we should have added systematic tests. > > This is the hypervisor-located building block for such tests. The test > creates a MMIO target page right after the Communication Page. Write > accesses

[siemens/jailhouse] 3c5293: inmates: x86: Add test case for MMIO accessing ins...

24 Apr 2018) Changed paths: M configs/x86/tiny-demo.c M inmates/Makefile A inmates/tests/arm/Makefile A inmates/tests/arm64/Makefile A inmates/tests/x86/Makefile A inmates/tests/x86/mmio-access.c Log Message: --- inmates: x86: Add test case for MMIO acc

Re: [PATCH 07/16] inmates: x86: Add test case for MMIO accessing instructions

On 2018-04-24 14:58, Ralf Ramsauer wrote: > > > On 04/23/2018 06:18 PM, Jan Kiszka wrote: >> From: Jan Kiszka <jan.kis...@siemens.com> >> >> This lays the ground for systematic tests of the MMIO instruction parser >> in x86. The test-case inma

Re: [PATCH 07/16] inmates: x86: Add test case for MMIO accessing instructions

On 04/23/2018 06:18 PM, Jan Kiszka wrote: > From: Jan Kiszka <jan.kis...@siemens.com> > > This lays the ground for systematic tests of the MMIO instruction parser > in x86. The test-case inmate uses the new MMIO access test device for > writing and reading wi

[PATCH 06/16] x86: Add MMIO access test device

tests. This is the hypervisor-located building block for such tests. The test creates a MMIO target page right after the Communication Page. Write accesses to the virtual registers 0xff8..0xfff are stored per cell, read accesses reproduce that written value. The virtual registers are backed by the Communi

[PATCH 07/16] inmates: x86: Add test case for MMIO accessing instructions

From: Jan Kiszka <jan.kis...@siemens.com> This lays the ground for systematic tests of the MMIO instruction parser in x86. The test-case inmate uses the new MMIO access test device for writing and reading with yet a small number of instructions variants. This is supposed to expanded

[siemens/jailhouse] 39819a: docs: inter-cell: update pointer to Linux test cod...

9 (Sat, 09 Sep 2017) Changed paths: M Documentation/inter-cell-communication.txt Log Message: --- docs: inter-cell: update pointer to Linux test code i transfered the project to fix email routing in my github account, the old location still works but i do not want t

[siemens/jailhouse] 39819a: docs: inter-cell: update pointer to Linux test cod...

017-09-09 (Sat, 09 Sep 2017) Changed paths: M Documentation/inter-cell-communication.txt Log Message: --- docs: inter-cell: update pointer to Linux test code i transfered the project to fix email routing in my github account, the old location still works but i do not want t

[siemens/jailhouse] 39819a: docs: inter-cell: update pointer to Linux test cod...

9 (Sat, 09 Sep 2017) Changed paths: M Documentation/inter-cell-communication.txt Log Message: --- docs: inter-cell: update pointer to Linux test code i transfered the project to fix email routing in my github account, the old location still works but i do not want t

[PATCH] docs: inter-cell: update pointer to Linux test code

-communication.txt +++ b/Documentation/inter-cell-communication.txt @@ -72,5 +72,5 @@ Demo code You can go ahead and connect two non-root cells and run the ivshmem-demo. They will send each other interrupts. For the root cell you can find some test code in the following git repository: -https://

yahoo DMARC test

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