Depending on availability, this inmates executes some SSE/AVX
instructions, compares the result against an expected result and exits.

Signed-off-by: Ralf Ramsauer <[email protected]>
---
 inmates/tests/x86/Makefile      |  7 ++-
 inmates/tests/x86/sse-demo-32.c |  1 +
 inmates/tests/x86/sse-demo.c    | 92 +++++++++++++++++++++++++++++++++
 3 files changed, 99 insertions(+), 1 deletion(-)
 create mode 120000 inmates/tests/x86/sse-demo-32.c
 create mode 100644 inmates/tests/x86/sse-demo.c

diff --git a/inmates/tests/x86/Makefile b/inmates/tests/x86/Makefile
index 1f30852f..030e20e6 100644
--- a/inmates/tests/x86/Makefile
+++ b/inmates/tests/x86/Makefile
@@ -12,11 +12,16 @@
 
 include $(INMATES_LIB)/Makefile.lib
 
-INMATES := mmio-access.bin mmio-access-32.bin
+INMATES := mmio-access.bin mmio-access-32.bin sse-demo.bin sse-demo-32.bin
 
 mmio-access-y := mmio-access.o
 
 $(eval $(call DECLARE_32_BIT,mmio-access-32))
 mmio-access-32-y := mmio-access-32.o
 
+sse-demo-y := sse-demo.o
+
+$(eval $(call DECLARE_32_BIT,sse-demo-32))
+sse-demo-32-y := sse-demo-32.o
+
 $(eval $(call DECLARE_TARGETS,$(INMATES)))
diff --git a/inmates/tests/x86/sse-demo-32.c b/inmates/tests/x86/sse-demo-32.c
new file mode 120000
index 00000000..1136c98f
--- /dev/null
+++ b/inmates/tests/x86/sse-demo-32.c
@@ -0,0 +1 @@
+sse-demo.c
\ No newline at end of file
diff --git a/inmates/tests/x86/sse-demo.c b/inmates/tests/x86/sse-demo.c
new file mode 100644
index 00000000..2d2ff379
--- /dev/null
+++ b/inmates/tests/x86/sse-demo.c
@@ -0,0 +1,92 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) OTH Regensburg, 2019
+ *
+ * Authors:
+ *  Ralf Ramsauer <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <inmate.h>
+#include <test.h>
+#include <asm/regs.h>
+
+typedef u64 xmm_t __attribute__((vector_size(16)));
+
+void inmate_main(void)
+{
+       printk("CPU supports\n"
+              "    FPU: %u   FXSR: %u XSAVE: %u\n"
+              "    SSE: %u   SSE2: %u  SSE3: %u\n"
+              " SSE4_1: %u SSE4_2: %u   AVX: %u\n"
+              " PCLMULQDQ: %u\n\n",
+              x86_cpu_features.fpu, x86_cpu_features.fxsr,
+              x86_cpu_features.xsave, x86_cpu_features.sse,
+              x86_cpu_features.sse2, x86_cpu_features.sse3,
+              x86_cpu_features.sse4_1, x86_cpu_features.sse4_2,
+              x86_cpu_features.avx, x86_cpu_features.pclmulqdq);
+
+       if (x86_cpu_features.fpu) {
+               float result, addend;
+
+               addend = 123.45;
+               result = 543.55;
+
+               printk("Testing SSE...\n");
+               asm volatile("addps %1, %0\t\n"
+                            : "+x"(result) : "x"(addend));
+               /* Test raw result */
+               EXPECT_EQUAL_U32(*(unsigned int*)&result, 0x4426c000);
+       }
+
+       {
+               double a, b, result;
+
+               a = 123.45;
+               b = 543.55;
+
+               if (x86_cpu_features.sse2) {
+                       printk("Testing SSE2...\n");
+                       result = b;
+                       asm volatile("addsd %1, %0\t\n"
+                                    : "+x"(result) : "m"(a));
+                       EXPECT_EQUAL_U64((unsigned int)result, 667);
+               }
+
+               if (x86_cpu_features.avx) {
+                       result = 0;
+                       printk("Testing AVX...\n");
+                       asm volatile("vaddsd %2, %1, %0\t\n"
+                                    : "=x"(result) : "x"(a), "m"(b));
+                       EXPECT_EQUAL_U64((unsigned int)result, 667);
+               }
+       }
+
+       if (x86_cpu_features.pclmulqdq) {
+               xmm_t a = {0x00017004200ab0cd, 0xc000b802f6b31753};
+               xmm_t b = {0xa0005c0252074a9a, 0x50002e0207b1643c};
+
+               printk("Testing PCLMULQDQ...\n");
+               asm volatile("pclmulqdq %2, %1, %0\t\n"
+                            : "+x"(a) : "x"(b), "i"(0));
+
+               EXPECT_EQUAL_U64(a[0], 0x5ff61cc8b1043fa2);
+               EXPECT_EQUAL_U64(a[1], 0x00009602d147dc12);
+       }
+
+       if (x86_cpu_features.pclmulqdq && x86_cpu_features.avx) {
+               xmm_t a = {0x00017004200ab0cd, 0xc000b802f6b31753};
+               xmm_t b = {0xa0005c0252074a9a, 0x50002e0207b1643c};
+               xmm_t result;
+
+               printk("Testing AVX PCLMULQDQ...\n");
+               asm volatile("vpclmulqdq %3, %2, %1, %0\t\n"
+                            : "=x"(result) : "x"(a), "x"(b), "i"(0));
+
+               EXPECT_EQUAL_U64(result[0], 0x5ff61cc8b1043fa2);
+               EXPECT_EQUAL_U64(result[1], 0x00009602d147dc12);
+       }
+}
-- 
2.21.0

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