date:20180409

Re: Share memory among cells on arm64

2018-04-09 Thread Giovani Gracioli

Thanks for the answers.

So, I have changed the config. In the root cell I have the following now:

/* IVSHMEM shared memory region for 00:00.0 */ {
.phys_start = 0x80040,
.virt_start = 0x80040,
.size = 0x10,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | 
JAILHOUSE_MEM_ROOTSHARED, //added MEM_ROOTSHARED
},

.pci_devices = {
/* 00:00.0 */ {
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 0 << 3,
.bar_mask = {
0xff00, 0x, 0x,
0x, 0x, 0x,
},
.shmem_region = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, 
//changed from JAILHOUSE_SHMEM_PROTO_VETH to JAILHOUSE_SHMEM_PROTO_UNDEFINED
},
   },

In the inmate cell, I have the following:

.mem_regions = {
..
.
/* IVSHMEM shared memory region for 00:00.0 */ {
.phys_start = 0x80040,
.virt_start = 0x80040,
.size = 0x10,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | 
JAILHOUSE_MEM_ROOTSHARED, //added JAILHOUSE_MEM_ROOTSHARED
},
},

Considering just the configuration of the cells, are they correct?

So correct me if I am wrong. I will need to write a driver in the root-cell 
(Linux) to send and receive interrupts to/from the shared ivshmem region. The 
mapped vpci region contains only the registers of the device:

00:00.0 Unassigned class [ff00]: Red Hat, Inc Inter-VM shared memory
Subsystem: Red Hat, Inc Inter-VM shared memory
Flags: fast devsel, IRQ 38
Memory at fc10 (64-bit, non-prefetchable) [size=256]

In this case, the address 0xfc10.

Is the address (0x80040) that I configured in the cell config file actually 
the payload memory region?

Also, in the another inmate, how can I access the mapped region? I noticed that 
there is an ivshmem-demo for x86, but there isn't for arm64. 

Thanks

> Hi,
> 
> what you see there are the registers of the ivshmem device, not the
> payload memory region. You will have to map the paddr you have in your
> cell-config. That paddr can be found in the config space as well, is
> just not a regular PCI BAR.
> 
> I would suggest to write a uio driver and base it on
> https://github.com/henning-schild-work/ivshmem-guest-code/tree/jailhouse
> 
> Here is the bit that finds the region
> https://github.com/henning-schild-work/ivshmem-guest-code/blob/jailhouse/kernel_module/uio/uio_ivshmem.c#L96
> 
> Also see:
> https://github.com/henning-schild-work/ivshmem-guest-code/blob/jailhouse/README.jailhouse
> 
> And you should not use JAILHOUSE_SHMEM_PROTO_VETH because you are not
> running a network-device on top of your shmem. Use _UNDEFINED or
> _CUSTOM instead.
> 
> Henning
> 
> Am Tue, 3 Apr 2018 10:47:31 -0700
> schrieb Giovani Gracioli <>:
> 
> > Just another info, after enabling the root cell, I can see the
> > virtual pci devices with lspci -v:
> > 
> > 00:00.0 Unassigned class [ff01]: Red Hat, Inc Inter-VM shared memory
> > Subsystem: Red Hat, Inc Inter-VM shared memory
> > Flags: fast devsel
> > Memory at fc10 (64-bit, non-prefetchable) [disabled]
> > [size=256] Memory at  (64-bit, non-prefetchable)
> > [disabled] Capabilities: [50] MSI-X: Enable- Count=1 Masked-
> > 
> > 00:01.0 Unassigned class [ff01]: Red Hat, Inc Inter-VM shared memory
> > Subsystem: Red Hat, Inc Inter-VM shared memory
> > Flags: fast devsel
> > Memory at fc100100 (64-bit, non-prefetchable) [disabled]
> > [size=256]
> > 
> > 
> > 
> > > Hello,
> > > 
> > > I would like to share buffers among cells on arm64 (Xilinx
> > > ultrascale+). The documentation suggests the use of the ivshmem.
> > > 
> > > In order to use ivshmem, I changed the root cell config as follows
> > > (it is based on the zynqmp-zcu102.c original file):
> > > 
> > > - In the .mem_regions:
> > > 
> > > /* IVSHMEM shared memory region for 00:00.0 */ {
> > >   .phys_start = 0x80040,
> > >   .virt_start = 0x80040,
> > >   .size = 0x10,
> > >   .flags = JAILHOUSE_MEM_READ |
> > > JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, //added
> > > JAILHOUSE_MEM_ROOTSHARED },
> > > 
> > > - In the .pci_devices:
> > > 
> > > /* 00:00.0 */ {
> > >   .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
> > >   .bdf = 0 << 3,
> > >   .bar_mask = {
> > >   0xff00, 0x, 0x,
> > >   0x, 0x, 0x,
> > >   },
> > >

Re: How to send an IPI on arm64 from the root-cell to an inmate cell

2018-04-09 Thread Jan Kiszka

On 2018-04-09 18:51, Giovani Gracioli wrote:
> Hello,
> 
> I would like to send an IPI from the root cell (Linux) to an inmate cell on 
> arm64. I know Jailhouse isolates the physical cores and would not allow to 
> send an IPI to a CPU that does not belong to the cell. However, I would like 
> to test that anyway. 
> 
> I have a kernel module (Linux running on the root cell) that sends an IPI to 
> a core. As I do not have a deep knowledge in Jailhouse, it is not clear to me 
> how Jailhouse intercepts or/and avoids the IPI, when it is sent to a core 
> that does not belong to the root cell.
> 
> Where in the code Jailhouse checks this? What should I change to allow the 
> IPI to be sent?
> 
> On the inmate side, I am running the gic-demo.c and I am just printing the 
> irqn in the handle_IRQ function. Will the IPI be delivered to the handle_IRQ 
> function as well?
> 

We do not support direct exchange of IPIs (SGIs on ARM) between cells
but rather model this case via ivshmem devices. That is the official
answer. If there should be some valid hacking reason for actually
messing with the core: gic_handle_sgir_write does the filtering,
specifically the code blow "/* Route to target CPUs in cell */".

Jan

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Re: [PATCH 1/4] Jetson TX2: root cell config

2018-04-09 Thread Jan Kiszka

On 2018-04-09 16:35, Claudio Scordino wrote:
> 
> 
> 2018-04-09 16:28 GMT+02:00 Lokesh Vutla  >:
> 
> 
> 
> On Monday 09 April 2018 07:53 PM, Claudio Scordino wrote:
> > Signed-off-by: Claudio Scordino  >
> > ---
> >  configs/arm64/jetson-tx2.c | 492
> +
> >  1 file changed, 492 insertions(+)
> >  create mode 100644 configs/arm64/jetson-tx2.c
> >
> > diff --git a/configs/arm64/jetson-tx2.c b/configs/arm64/jetson-tx2.c
> > new file mode 100644
> > index 000..0d23158
> > --- /dev/null
> > +++ b/configs/arm64/jetson-tx2.c
> > @@ -0,0 +1,492 @@
> > +/*
> > + * Jailhouse, a Linux-based partitioning hypervisor
> > + *
> > + * Configuration for Jailhouse Jetson TX2 board
> > + *
> > + * Copyright (C) 2018 Evidence Srl
> > + *
> > + * Authors:
> > + *  Claudio Scordino  >
> > + *
> > + * This work is licensed under the terms of the GNU GPL, version
> 2.  See
> > + * the COPYING file in the top-level directory.
> > + *
> > + * NOTE: Add "mem=7808M vmalloc=512M" to the kernel command line.
> > + *
> > + *   2:7000: inmate (size: 100: = 16 MB)
> > + *   2:7100: hypervisor (size: 400: = 64 MB)
> > + *
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
> > +
> > +struct {
> > +     struct jailhouse_system header;
> > +     __u64 cpus[1];
> > +     struct jailhouse_memory mem_regions[57];
> > +     struct jailhouse_irqchip irqchips[2];
> > +} __attribute__((packed)) config = {
> > +     .header = {
> > +             .signature = JAILHOUSE_SYSTEM_SIGNATURE,
> > +             .revision = JAILHOUSE_CONFIG_REVISION,
> > +             .hypervisor_memory = {
> > +                     .phys_start = 0x27100,
> > +                     .size = 0x400,
> > +             },
> > +             .debug_console = {
> > +                     .address = 0x310,
> > +                     .size = 0x1,
> > +                     .flags = JAILHOUSE_CON1_TYPE_8250 |
> > +                              JAILHOUSE_CON1_ACCESS_MMIO |
> > +                              JAILHOUSE_CON1_REGDIST_4 |
> > +                              JAILHOUSE_CON2_TYPE_ROOTPAGE,
> > +             },
> > +             .platform_info = {
> > +
> > +                     .arm = {
> > +                             .gicd_base = 0x03881000,
> > +                             .gicc_base = 0x03882000,
> > +                             .gich_base = 0x03884000,
> > +                             .gicv_base = 0x03886000,
> > +                             .gic_version = 2,
> > +                             .maintenance_irq = 25,
> > +                     }
> > +             },
> > +             .root_cell = {
> > +                     .name = "Jetson-TX2",
> > +                     .cpu_set_size = sizeof(config.cpus),
> > +                     .num_memory_regions =
> ARRAY_SIZE(config.mem_regions),
> > +                     .num_irqchips = ARRAY_SIZE(config.irqchips),
> > +             },
> > +     },
> > +
> > +     .cpus = {
> > +             0x39,
> > +     },
> 
> Out of curiosity, is it deliberate that cpu1,2 are skipped?
> 
> 
> By default, the Linux kernel shipped by Nvidia boots with those two CPUs
> disabled.
> They can be easily enabled by echoing 1 into
> /sys/devices/system/cpu/cpu*/online.

Are we targeting a downstream kernel here? Because upstream is not
booting at all, or because it is lacking some nice-to-have feature? If
upstream is booting, what is its behavior in this regard? Seems we are
lacking some documentation here.

Jan

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Re: [PATCH] driver, tools: ensure jailhouse is not enabled when VT-X is disabled by firmware

2018-04-09 Thread Jan Kiszka

On 2018-04-09 18:24, f...@ozog.com wrote:
> Whithout the check, jailhouse enable configs/x86/sysconfig.cell results
> in a GP and a reboot
> make sure proper reporting of mandatory firmware enable and optional VMX
> on SMX.
> do not allow enable if firmware has disabled VT-X
> 
> Signed-off-by: Francois-Frederic Ozog 
> ---
>  configs/x86/tiny-demo.c    |  2 +-
>  driver/main.c  | 17 +
>  tools/jailhouse-hardware-check |  4 ++--
>  3 files changed, 20 insertions(+), 3 deletions(-)
> 
> diff --git a/configs/x86/tiny-demo.c b/configs/x86/tiny-demo.c
> index 9666bf63..ac2368e2 100644
> --- a/configs/x86/tiny-demo.c
> +++ b/configs/x86/tiny-demo.c
> @@ -39,7 +39,7 @@ struct {
>     },
> 
>     .cpus = {
> -   0x4,
> +   0x2,

That looks unrelated - if not undesired.

>     },
> 
>     .mem_regions = {
> diff --git a/driver/main.c b/driver/main.c
> index ee585848..7a834977 100644
> --- a/driver/main.c
> +++ b/driver/main.c
> @@ -40,6 +40,12 @@
>  #ifdef CONFIG_ARM
>  #include 
>  #endif
> +#ifdef CONFIG_X86
> +#include 
> +#include 
> +/* as per IA32_FEATURE_CONTROL MSR documentation */
> +#define VMXON_BIOS_ALLOWED (1ULL<<2)

That's FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX.

> +#endif
> 
>  #include "cell.h"
>  #include "jailhouse.h"
> @@ -392,6 +398,17 @@ static int jailhouse_cmd_enable(struct
> jailhouse_system __user *arg)
>     goto error_put_module;
>     }
>  #endif
> +#ifdef CONFIG_X86
> +   {
> +   u64 features;

Coding style: missing blank line.

> +   rdmsrl(MSR_IA32_FEATURE_CONTROL, features);
> +   if ((features & VMXON_BIOS_ALLOWED) == 0) {
> +   pr_err("jailhouse: vt-x disabled by BIOS\n");
> +   err = -ENODEV;
> +   goto error_put_module;
> +   }

I strongly suspect that this breaks AMD...

> +   }
> +#endif
> 
>     /* Load hypervisor image */
>     err = request_firmware(, fw_name, jailhouse_dev);
> diff --git a/tools/jailhouse-hardware-check
> b/tools/jailhouse-hardware-check
> index 67d3b078..f8b35c99 100755
> --- a/tools/jailhouse-hardware-check
> +++ b/tools/jailhouse-hardware-check
> @@ -182,8 +182,8 @@ if cpu_vendor == 'GenuineIntel':
>  check_feature('VT-x (VMX)', 'vmx' in cpu_features)
> 
>  feature = msr.read(MSR.IA32_FEATURE_CONTROL)
> -    check_feature('  VMX without TXT',
> -  (feature & (1 << 0)) == 0 or feature & (1 << 2))
> +    check_feature('  VMX allowed by BIOS', feature & (1 << 2))
> +    check_feature('  VMX without TXT', (feature & (1 << 0)) == 0, True)
>  check_feature('  IA32_TRUE_*_CLTS',
>    msr.read(MSR.IA32_VMX_BASIC) & (1 << 55))
> 

Looks good, but this split-up should be a separate patch.

Thanks,
Jan

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How to send an IPI on arm64 from the root-cell to an inmate cell

2018-04-09 Thread Giovani Gracioli

Hello,

I would like to send an IPI from the root cell (Linux) to an inmate cell on 
arm64. I know Jailhouse isolates the physical cores and would not allow to send 
an IPI to a CPU that does not belong to the cell. However, I would like to test 
that anyway. 

I have a kernel module (Linux running on the root cell) that sends an IPI to a 
core. As I do not have a deep knowledge in Jailhouse, it is not clear to me how 
Jailhouse intercepts or/and avoids the IPI, when it is sent to a core that does 
not belong to the root cell.

Where in the code Jailhouse checks this? What should I change to allow the IPI 
to be sent?

On the inmate side, I am running the gic-demo.c and I am just printing the irqn 
in the handle_IRQ function. Will the IPI be delivered to the handle_IRQ 
function as well?

Best regards,

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Re: [PATCH 1/4] Jetson TX2: root cell config

2018-04-09 Thread Claudio Scordino

2018-04-09 16:28 GMT+02:00 Lokesh Vutla :

>
>
> On Monday 09 April 2018 07:53 PM, Claudio Scordino wrote:
> > Signed-off-by: Claudio Scordino 
> > ---
> >  configs/arm64/jetson-tx2.c | 492 ++
> +++
> >  1 file changed, 492 insertions(+)
> >  create mode 100644 configs/arm64/jetson-tx2.c
> >
> > diff --git a/configs/arm64/jetson-tx2.c b/configs/arm64/jetson-tx2.c
> > new file mode 100644
> > index 000..0d23158
> > --- /dev/null
> > +++ b/configs/arm64/jetson-tx2.c
> > @@ -0,0 +1,492 @@
> > +/*
> > + * Jailhouse, a Linux-based partitioning hypervisor
> > + *
> > + * Configuration for Jailhouse Jetson TX2 board
> > + *
> > + * Copyright (C) 2018 Evidence Srl
> > + *
> > + * Authors:
> > + *  Claudio Scordino 
> > + *
> > + * This work is licensed under the terms of the GNU GPL, version 2.  See
> > + * the COPYING file in the top-level directory.
> > + *
> > + * NOTE: Add "mem=7808M vmalloc=512M" to the kernel command line.
> > + *
> > + *   2:7000: inmate (size: 100: = 16 MB)
> > + *   2:7100: hypervisor (size: 400: = 64 MB)
> > + *
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
> > +
> > +struct {
> > + struct jailhouse_system header;
> > + __u64 cpus[1];
> > + struct jailhouse_memory mem_regions[57];
> > + struct jailhouse_irqchip irqchips[2];
> > +} __attribute__((packed)) config = {
> > + .header = {
> > + .signature = JAILHOUSE_SYSTEM_SIGNATURE,
> > + .revision = JAILHOUSE_CONFIG_REVISION,
> > + .hypervisor_memory = {
> > + .phys_start = 0x27100,
> > + .size = 0x400,
> > + },
> > + .debug_console = {
> > + .address = 0x310,
> > + .size = 0x1,
> > + .flags = JAILHOUSE_CON1_TYPE_8250 |
> > +  JAILHOUSE_CON1_ACCESS_MMIO |
> > +  JAILHOUSE_CON1_REGDIST_4 |
> > +  JAILHOUSE_CON2_TYPE_ROOTPAGE,
> > + },
> > + .platform_info = {
> > +
> > + .arm = {
> > + .gicd_base = 0x03881000,
> > + .gicc_base = 0x03882000,
> > + .gich_base = 0x03884000,
> > + .gicv_base = 0x03886000,
> > + .gic_version = 2,
> > + .maintenance_irq = 25,
> > + }
> > + },
> > + .root_cell = {
> > + .name = "Jetson-TX2",
> > + .cpu_set_size = sizeof(config.cpus),
> > + .num_memory_regions =
> ARRAY_SIZE(config.mem_regions),
> > + .num_irqchips = ARRAY_SIZE(config.irqchips),
> > + },
> > + },
> > +
> > + .cpus = {
> > + 0x39,
> > + },
>
> Out of curiosity, is it deliberate that cpu1,2 are skipped?
>

By default, the Linux kernel shipped by Nvidia boots with those two CPUs
disabled.
They can be easily enabled by echoing 1 into
/sys/devices/system/cpu/cpu*/online.

Best regards,

Claudio

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[PATCH 0/4] Support for Nvidia Jetson TX2

2018-04-09 Thread Claudio Scordino

Tested on the "next" branch against Nvidia's kernel 4.4 by restoring the
ABI for kernels < 4.7 in hypervisor/arch/arm64/entry.S:

/* install bootstrap_vectors */
ldr x0, =bootstrap_vectors
virt2phys x0


Claudio Scordino (4):
  Jetson TX2: root cell config
  Jetson TX2: add inmate support
  Jetson TX2: add demo cell config
  Documentation: Add TX2 to the list of supported hardware

 Documentation/hypervisor-configuration.md |   6 +-
 README.md |   2 +-
 configs/arm64/jetson-tx2-demo.c   |  51 
 configs/arm64/jetson-tx2.c| 492 ++
 inmates/lib/arm64/include/mach.h  |   8 +
 5 files changed, 557 insertions(+), 2 deletions(-)
 create mode 100644 configs/arm64/jetson-tx2-demo.c
 create mode 100644 configs/arm64/jetson-tx2.c

-- 
2.7.4

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[PATCH 2/4] Jetson TX2: add inmate support

2018-04-09 Thread Claudio Scordino

Signed-off-by: Claudio Scordino 
---
 inmates/lib/arm64/include/mach.h | 8 
 1 file changed, 8 insertions(+)

diff --git a/inmates/lib/arm64/include/mach.h b/inmates/lib/arm64/include/mach.h
index 4d18929..02fdcc6 100644
--- a/inmates/lib/arm64/include/mach.h
+++ b/inmates/lib/arm64/include/mach.h
@@ -70,6 +70,14 @@
 #define GICD_V2_BASE   ((void *)0x50041000)
 #define GICC_V2_BASE   ((void *)0x50042000)
 
+#elif defined(CONFIG_MACH_JETSON_TX2)
+#define CON_TYPE   "8250"
+#define CON_BASE   0x310
+
+#define GIC_VERSION2
+#define GICD_V2_BASE   ((void *)0x03881000)
+#define GICC_V2_BASE   ((void *)0x03882000)
+
 #elif defined(CONFIG_MACH_ZYNQMP_ZCU102)
 #define CON_TYPE   "XUARTPS"
 #define CON_BASE   0xff01
-- 
2.7.4

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[PATCH 3/4] Jetson TX2: add demo cell config

2018-04-09 Thread Claudio Scordino

Signed-off-by: Claudio Scordino 
---
 configs/arm64/jetson-tx2-demo.c | 51 +
 1 file changed, 51 insertions(+)
 create mode 100644 configs/arm64/jetson-tx2-demo.c

diff --git a/configs/arm64/jetson-tx2-demo.c b/configs/arm64/jetson-tx2-demo.c
new file mode 100644
index 000..7cb8dbe
--- /dev/null
+++ b/configs/arm64/jetson-tx2-demo.c
@@ -0,0 +1,51 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for gic-demo or uart-demo inmate on Nvidia Jetson TX2:
+ * 1 CPU, 64 MB RAM, serial port 0
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include 
+#include 
+
+#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
+
+struct {
+   struct jailhouse_cell_desc cell;
+   __u64 cpus[1];
+   struct jailhouse_memory mem_regions[2];
+} __attribute__((packed)) config = {
+   .cell = {
+   .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+   .revision = JAILHOUSE_CONFIG_REVISION,
+   .name = "jetson-tx2-demo",
+   .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+   .cpu_set_size = sizeof(config.cpus),
+   .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+   },
+
+   .cpus = {
+   0x1,
+   },
+
+   .mem_regions = {
+   /* UART */ {
+   .phys_start = 0x310,
+   .virt_start = 0x310,
+   .size = 0x1000,
+   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+   JAILHOUSE_MEM_IO,
+   },
+   /* RAM */ {
+   .phys_start = 0x27000,
+   .virt_start = 0,
+   .size = 0x100,
+   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+   JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+   },
+   },
+};
-- 
2.7.4

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[PATCH 1/4] Jetson TX2: root cell config

2018-04-09 Thread Claudio Scordino

Signed-off-by: Claudio Scordino 
---
 configs/arm64/jetson-tx2.c | 492 +
 1 file changed, 492 insertions(+)
 create mode 100644 configs/arm64/jetson-tx2.c

diff --git a/configs/arm64/jetson-tx2.c b/configs/arm64/jetson-tx2.c
new file mode 100644
index 000..0d23158
--- /dev/null
+++ b/configs/arm64/jetson-tx2.c
@@ -0,0 +1,492 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for Jailhouse Jetson TX2 board
+ *
+ * Copyright (C) 2018 Evidence Srl
+ *
+ * Authors:
+ *  Claudio Scordino 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ *
+ * NOTE: Add "mem=7808M vmalloc=512M" to the kernel command line.
+ *
+ * 2:7000: inmate (size: 100: = 16 MB)
+ * 2:7100: hypervisor (size: 400: = 64 MB)
+ *
+ */
+
+#include 
+#include 
+
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
+
+struct {
+   struct jailhouse_system header;
+   __u64 cpus[1];
+   struct jailhouse_memory mem_regions[57];
+   struct jailhouse_irqchip irqchips[2];
+} __attribute__((packed)) config = {
+   .header = {
+   .signature = JAILHOUSE_SYSTEM_SIGNATURE,
+   .revision = JAILHOUSE_CONFIG_REVISION,
+   .hypervisor_memory = {
+   .phys_start = 0x27100,
+   .size = 0x400,
+   },
+   .debug_console = {
+   .address = 0x310,
+   .size = 0x1,
+   .flags = JAILHOUSE_CON1_TYPE_8250 |
+JAILHOUSE_CON1_ACCESS_MMIO |
+JAILHOUSE_CON1_REGDIST_4 |
+JAILHOUSE_CON2_TYPE_ROOTPAGE,
+   },
+   .platform_info = {
+
+   .arm = {
+   .gicd_base = 0x03881000,
+   .gicc_base = 0x03882000,
+   .gich_base = 0x03884000,
+   .gicv_base = 0x03886000,
+   .gic_version = 2,
+   .maintenance_irq = 25,
+   }
+   },
+   .root_cell = {
+   .name = "Jetson-TX2",
+   .cpu_set_size = sizeof(config.cpus),
+   .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+   .num_irqchips = ARRAY_SIZE(config.irqchips),
+   },
+   },
+
+   .cpus = {
+   0x39,
+   },
+
+
+   .mem_regions = {
+   /* BPMP_ATCM */ {
+.phys_start = 0x,
+.virt_start = 0x,
+.size = 0x4,
+.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+JAILHOUSE_MEM_EXECUTE,
+},
+
+   /* MISC */ {
+.phys_start = 0x0010,
+.virt_start = 0x0010,
+.size = 0x1,
+.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+JAILHOUSE_MEM_EXECUTE,
+},
+
+   /* AXIP2P */ {
+   .phys_start = 0x0210,
+   .virt_start = 0x0210,
+   .size = 0x10,
+   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+   JAILHOUSE_MEM_EXECUTE,
+   },
+   /* GPIO_CTL */ {
+   .phys_start = 0x0220,
+   .virt_start = 0x0220,
+   .size = 0x10,
+   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+   JAILHOUSE_MEM_EXECUTE,
+   },
+   /* TSA */ {
+   .phys_start = 0x240,
+   .virt_start = 0x240,
+   .size = 0x2,
+   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+   JAILHOUSE_MEM_EXECUTE,
+   },
+   /* PADCTL_A (PINMUX) */ {
+   .phys_start = 0x0243,
+   .virt_start = 0x0243,
+   .size = 0x15000,
+   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+   JAILHOUSE_MEM_EXECUTE,
+   },
+   /* UFSHC */ {
+   .phys_start = 0x0245,
+   .virt_start = 0x0245,
+   .size = 0x2,
+   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+   JAILHOUSE_MEM_EXECUTE,
+

Re: [EXTERNAL] Re: Try jailhouse on Orange Pi Zero

2018-04-09 Thread Qiu Shui

On Monday, April 9, 2018 at 5:40:48 PM UTC+8, Qiu Shui wrote:
> On Monday, April 9, 2018 at 2:19:13 PM UTC+8, J. Kiszka wrote:
> > On 2018-04-09 02:42, Qiu Shui wrote:
> > > On Sunday, April 8, 2018 at 2:18:28 PM UTC+8, Qiu Shui wrote:
> > >> On Sunday, April 8, 2018 at 11:29:01 AM UTC+8, Qiu Shui wrote:
> > >>> On Monday, April 2, 2018 at 4:33:40 PM UTC+8, Qiu Shui wrote:
> >  On Monday, April 2, 2018 at 3:05:08 PM UTC+8, Nikhil Devshatwar wrote:
> > > On Monday 02 April 2018 11:16 AM, Qiu Shui wrote:
> > >> On Monday, April 2, 2018 at 11:12:12 AM UTC+8, Qiu Shui wrote:
> > >>> On Thursday, March 29, 2018 at 1:09:46 PM UTC+8, Jan Kiszka wrote:
> >  On 2018-03-29 06:36, Qiu Shui wrote:
> > > I build the armbian with these two patches to the kernel:
> > > [1]
> > > http://git.kiszka.org/?p=linux.git;a=commit;h=f057e9bb4ba2fca0b435d36893eb41ddd57b4208
> > > [2]
> > > http://git.kiszka.org/?p=linux.git;a=commit;h=1c926e27072d4cca76a756058554485067ce472b
> > >
> > > But when I build jailhouse with the armbian kernel source 
> > > files(version: Linux orangepizero 4.16.0-rc6-sunxi #2 SMP Wed Mar 
> > > 28 15:33:44 CST 2018 armv7l GNU/Linux), I got these warnings:
> > > WARNING: "__stack_chk_fail" 
> > > [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> > > undefined!
> > > WARNING: "__hyp_stub_vectors" 
> > > [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> > > undefined!
> > > WARNING: "__stack_chk_guard" 
> > > [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> > > undefined!
> > >
> > > I have tried some google solutions but still not solved.
> > >
> > > Are there any suggestions?
> > 
> >  Regarding __hyp_stub_vectors: you also need
> >  http://git.kiszka.org/?p=linux.git;a=commitdiff;h=2a681cb2213e3ea0f142fae7345fb80208a88a53
> > 
> >  The other two issue seem to be related to some build 
> >  inconsistency: Your
> >  kernel was built without CONFIG_CC_STACKPROTECTOR, but when you 
> >  build
> >  the Jailhouse module, this feature is considered to be enabled.
> > 
> >  Jan
> > >>>
> > >>> Thank you very much!
> > >>> After two days trying, I've finally built the kernel and jailhouse 
> > >>> module successfully.
> > >>> (I am using armbian building scripts and modified the 
> > >>> linux-sunxi-dev.config with "# CONFIG_THUMB2_KERNEL is not set")
> > >>>
> > >>> Now I can enable jailhouse and create cell:
> > >>> # jailhouse enable configs/orangepi0.cell
> > >>> # jailhouse cell create configs/orangepi0-gic-demo.cell
> > >>> # jailhouse cell list
> > >>> ID  NameState   Assigned CPUs   
> > >>> Failed CPUs
> > >>> 0   Orange-Pi0  running 0,2-3
> > >>> 1   orangepi0-gic-demo  shut down   1
> > >>>
> > >>> But when I load the gic-demo.bin, it failed:
> > >>> # jailhouse cell load orangepi0-gic-demo 
> > >>> inmates/demos/arm/gic-demo.bin
> > >>> Unhandled data read at 0x1f0(4)
> > >>> FATAL: unhandled trap (exception class 0x24)
> > >>> pc=0xc08cc6c0 cpsr=0x2013 hsr=0x93830007
> > >>> r0=0x0190 r1=0x0002 r2=0xa035 r3=0xcf807000
> > >>> r4=0xcda54e10 r5=0xc1103d00 r6=0x00300402 r7=0xcd8d7480
> > >>> r8=0x0002300c r9=0x0285 r10=0x r11=0xcda47df4
> > >>> r12=0x0030 r13=0xcda47dd0 r14=0xc08c9ab8
> > >>> Parking CPU 3 (Cell: "Orange-Pi0")
> > >>> Cell "orangepi0-gic-demo" can be loaded
> > >>>
> > >>> Any suggestions would be greatly appreciated :)
> > >>>
> > >>> Is there any demo can be used to make sure my jailhouse 
> > >>> environments are ready?
> > >>>
> > >>> Thanks!
> > >>
> > >> I solved this problem by trying some different memory configurations.
> > >> The following does work:
> > >> mem=448M vmalloc=256M
> > >> /* Orangepi0.c */
> > >>  .hypervisor_memory = {
> > >>  .phys_start = 0x5f80,
> > >>  .size = 0x80,
> > >>  },
> > >> ...
> > >>  /* RAM */ {
> > >>  .phys_start = 0x4000,
> > >>  .virt_start = 0x4000,
> > >>  .size =0x1f70,
> > >>  .flags = JAILHOUSE_MEM_READ | 
> > >> JAILHOUSE_MEM_WRITE |
> > >>  JAILHOUSE_MEM_EXECUTE,
> > >>  },
> > >>  /* IVSHMEM shared memory region */ {
> > >>  .phys_start = 0x5f70,
> > >>  .virt_start = 0x5f70,
> > >>

Re: Jailhouse zynqMP

2018-04-09 Thread iallende

El jueves, 22 de marzo de 2018, 16:33:02 (UTC+1), Ralf Ramsauer  escribió:
> On 03/22/2018 04:23 PM, iallende wrote:
> > El miércoles, 21 de marzo de 2018, 15:25:02 (UTC+1), Ralf Ramsauer  
> > escribió:
> >> Hi,
> >>
> >> On 03/21/2018 02:54 PM, iallende wrote:
> >>> Hi everyone,
> >>>
> >>> I am trying to run Jailhouse in the ZynqMP, with Linux PREEMPT RT in 
> >>> another cell. However, I have some problems when I add the second Linux.
> >>>
> >>> root@xilinx-zcu102-2017_4:/# modprobe jailhouse
> >>> [   52.445169] jailhouse: loading out-of-tree module taints kernel.
> >>> root@xilinx-zcu102-2017_4:/# ls /dev/jailhouse ^C
> >>> root@xilinx-zcu102-2017_4:/# jailhouse enable zynqmp-zcu102.cell 
> >>>
> >>> Initializing Jailhouse hypervisor v0.7 (0-g5c13b64) on CPU 2
> >> Please checkout next and try again. This might already fix your issue.
> > With v0.8 i get this WARNING and I can load the module:
> > WARNING: "__hyp_stub_vectors" [/jailhouse/driver/jailhouse.ko] undefined!
> Please switch to next, and not to v0.8. Compile your kernel with
> CONFIG_KALLSYMS_ALL=y, or use this [1] patch.
> 
>   Ralf
> 
> [1]
> http://git.kiszka.org/?p=linux.git;a=commit;h=2a681cb2213e3ea0f142fae7345fb80208a88a53
> >>> Code location: 0xc0200050
> >>> Page pool usage after early setup: mem 33/996, remap 64/131072
> >>> Initializing processors:
> >>>  CPU 2... OK
> >>>  CPU 0... OK
> >>>  CPU 3... OK
> >>>  CPU 1... OK
> >>> Adding virtual PCI device 00:00.0 to cell "ZynqMP-ZCU102"
> >>> Adding virtual PCI device 00:01.0 to cell "ZynqMP-ZCU102"
> >>> Page pool usage after late setup: mem 42/996, remap 69/131072
> >>> Activating hypervisor
> >>> [   63.697232] jailhouse: CONFIG_OF_OVERLAY disabled
> >>> [   63.704029] jailhouse: failed to add virtual host controller
> >>> [   63.711610] The Jailhouse is opening.
> >>>
> >>> root@xilinx-zcu102-2017_4:/# jailhouse cell linux 
> >>> zynqmp-zcu102-linux-demo.cell Image -d system.dtb -i rootfs.cpio 
> >>>
> >>> FATAL: unhandled trap (exception class 0x17)
> >> Exception class 0x17 is a SMC64 call.
> >>
> >>> Cell state before exception:
> >>>  pc: ff800808e390   lr: ff8008467504 spsr: 2145 EL1
> >>>  sp: ffc87b927ab0  esr: 17 1 000
> >>>  x0: c214   x1: fd1a0060   x2: 
> >> Furthermore, it's a SIP_64.
> >>
> >> Commit 2482c47bc2d05f ("arm64: ignore SIPs used for low-power modes") on
> >> next will probably fix your issue.
> >>
> >>   Ralf
> >>>  x3:    x4:    x5: 
> >>>  x6:    x7:    x8: ff8008d27ee0
> >>>  x9: ffc87aaa4b5c  x10: ffc87b927b4c  x11: ff8008c8ccb2
> >>> x12:   x13: 0f93  x14: 0001
> >>> x15:   x16: ff8008193240  x17: 004128f0
> >>> x18: 00040900  x19: ffc87b927b28  x20: 0001
> >>> x21: 4784b740  x22: 4784b740  x23: fffa
> >>> x24: 000f4240  x25: 000f4240  x26: 000f4240
> >>> x27:   x28:   x29: ffc87b927ac0
> >>>
> >>> Parking CPU 2 (Cell: "ZynqMP-ZCU102")
> >>>
> >>>
> >>> Does anyone know why I have this problem? Am I missing any step?
> >>>
> >
I get a similar result with next:

root@xilinx-zcu102-2017_4:/cells# jailhouse cell linux 
zynqmp-zcu102-linux-demo.cell Image -d system.dtb -i rootfs.cpio -c 
"console=ttyS1,1152000"
[  412.856498] CPU2: shutdown
[  412.861054] psci: CPU2 killed.
[  412.900346] CPU3: shutdown
[  412.904853] psci: CPU3 killed.
Adding virtual PCI device 00:00.0 to cell "ZynqMP-linux-demo"
Shared memory connection established: "ZynqMP-linux-demo" <--> "ZynqMP-ZCU102"
Adding virtual PCI device 00:02.0 to cell "ZynqMP-linux-demo"
Created cell "ZynqMP-linux-demo"
Page pool usage after cell creation: mem 59/993, remap 69/131072
[  412.951205] Created Jailhouse cell "ZynqMP-linux-demo"
Cell "ZynqMP-linux-demo" can be loaded
Started cell "ZynqMP-linux-demo"
Unhandled data write at 0xf9020004(4)

FATAL: unhandled trap (exception class 0x24)
Cell state before exception:
 pc: ff800840e4a4   lr: ff800840e49c spsr: 6085 EL1
 sp: ff8008ca3dc0  esr: 24 1 1800047
 x0: 00f0   x1:    x2: ff800800041c
 x3: 0080   x4: a0a0a0a0   x5: ff8008000394
 x6:    x7:    x8: ffc016808400
 x9:   x10: ffbf005a0220  x11: ff800840e238
x12: ff800840dc08  x13:   x14: 
x15:   x16: 0002  x17: 0002
x18:   x19: ff8008caa000  x20: ff8008020004
x21:   x22: ff800800  x23: ff8008ca9ff8
x24: ffc017fcafb8  x25: 0root@xilinx-zcu102-2017_4:/cells# 000  
x26: ffc017fcafb8
x27:   x28: 000810e20018  x29: ff8008ca3dc0


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Re: virtual network interface on x86

2018-04-09 Thread anilappana

On Monday, April 9, 2018 at 11:55:26 AM UTC+5:30, J. Kiszka wrote:
> On 2018-04-08 11:59, anilapp...@gmail.com wrote:
> > On Saturday, April 7, 2018 at 3:24:13 PM UTC+5:30, Jan Kiszka wrote:
> >> On 2018-04-07 06:01, anilapp...@gmail.com wrote:
> >>> Hi Henning,
> >>> Thanks for understanding our issue for ready to help us. I want to inform 
> >>> one more failure which we observed we after non rootcell bootup( it shows 
> >>> io remap failed).
> >>>
> >>>
> >>>
> >>> 0.403714] cpuidle: using governor ladder
> >>> [0.412705] cpuidle: using governor menu
> >>> [0.416813] PCI: Using configuration type 1 for base access
> >>> [0.422401] PCI: ashok JH PCI MMCONFIG
> >>> [0.426159] PCI: MMCONFIG for domain  [bus 00-ff] at [mem 
> >>> 0x8000-0x8fff] (base 0x8000)
> >>> [0.435469] [ cut here ]
> >>> [0.440098] WARNING: CPU: 0 PID: 1 at arch/x86/mm/ioremap.c:121 
> >>> __ioremap_caller+0x286/0x360
> >>> [0.448536] ioremap on RAM at 0x8000 - 0x8fff
> >>> [0.454974] Modules linked in:
> >>> [0.458050] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 
> >>> 4.9.47-rt37+-RedHawk-7.4-custom #27
> >>> [0.466216]  c962bd10 8155da23 c962bd60 
> >>> 
> >>> [0.473666]  c962bd50 81077d1b 0079 
> >>> 1000
> >>> [0.481119]  0002 81d95e3f 8000 
> >>> 
> >>> [0.488573] Call Trace:
> >>> [0.491021]  [] dump_stack+0x85/0xc2
> >>> [0.496159]  [] __warn+0xcb/0xf0
> >>> [0.500945]  [] ? pci_mmcfg_arch_map+0x2f/0x70
> >>> [0.506947]  [] warn_slowpath_fmt+0x4f/0x60
> >>> [0.512685]  [] __ioremap_caller+0x286/0x360
> >>> [0.518510]  [] ? vprintk_default+0x29/0x40
> >>> [0.524249]  [] ? printk+0x48/0x50
> >>> [0.529213]  [] ? pcibios_resource_survey+0x70/0x70
> >>> [0.535641]  [] ioremap_nocache+0x17/0x20
> >>> [0.541205]  [] pci_mmcfg_arch_map+0x2f/0x70
> >>> [0.547029]  [] pci_mmcfg_arch_init+0x1d/0x42
> >>> [0.552941]  [] jailhouse_pci_arch_init+0x40/0x44
> >>> [0.559197]  [] pci_arch_init+0x3b/0x66
> >>> [0.564588]  [] do_one_initcall+0x50/0x190
> >>> [0.570238]  [] ? parse_args+0x26a/0x3f0
> >>> [0.575717]  [] kernel_init_freeable+0x1cf/0x257
> >>> [0.581887]  [] ? rest_init+0x90/0x90
> >>> [0.587102]  [] kernel_init+0xe/0x120
> >>> [0.592321]  [] ret_from_fork+0x2a/0x40
> >>> [0.597728] ---[ end trace 38a36dc7a73d77e3 ]---
> >>> [0.602349] PCI: can't map MMCONFIG at [mem 0x8000-0x8fff]
> >>> [0.609402] kworker/u4:4 (63) used greatest stack depth: 13512 bytes 
> >>> left
> >>>
> >>>
> >>> I attached complete logs for your reference. we will try with what ever 
> >>> the inputs you gave to us and will let you know. I am also sharing 
> >>> rootcell and non root cell configs which we are using.
> >>
> >> You configured a conflict here: The shared memory region is also a RAM
> >> region for the cell.
> >>
> >> Jan
> > 
> > Jan,
> > we added below region for shared memory
> > 
> >.phys_start = 0x40410,   
> > 
> >  .virt_start = 0x40410, 
> >.size = 0x10, 
> > This is not RAM region. I attached iomem file for by Machine. Can you 
> > please check.
> > 
> 
> Ah, sorry, it's not the shared memory, it's the MMCONFIG region:
> 
> [0.440098] WARNING: CPU: 0 PID: 1 at arch/x86/mm/ioremap.c:121 
> __ioremap_caller+0x286/0x360
> [0.448536] ioremap on RAM at 0x8000 - 0x8fff
> 
> because of (fixed)
> 
>   .platform_info = {
>   .pci_mmconfig_base = 0x8000,
>   .pci_mmconfig_end_bus = 0xff,
> 
> 
> vs. 
> 
>/* high RAM */ 
>{
> .phys_start = 0x40430/*0x40110*/,
> .virt_start = 0x0020,
> .size = 0xC000, /*1GB*/
> /*.size = 0x3200, */  /*800MB try*/   
> /*0x1BF0, 400MB rajmohan*/ /*0xC80*/
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
>   JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
>   JAILHOUSE_MEM_LOADABLE,
>},
> 
> BTW, I would recommend to cleanup your configs. They are... hard to read
> now.
> 
> Jan
> -- 
> Siemens AG, Corporate Technology, CT RDA IOT SES-DE
> Corporate Competence Center Embedded Linux

Hi Jan,

>From the above config, pci_mmconfig_base = 0x8000(2GB)  & phys_start = 
>0x40430, size is 0xC000 (1GB)Our hypervisor start addresses is 
>0x4(16Gb).
How will they conflict?
Regards,
Anil

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Re: Jailhouse zynqMP

2018-04-09 Thread iallende

El jueves, 22 de marzo de 2018, 16:33:02 (UTC+1), Ralf Ramsauer  escribió:
> On 03/22/2018 04:23 PM, iallende wrote:
> > El miércoles, 21 de marzo de 2018, 15:25:02 (UTC+1), Ralf Ramsauer  
> > escribió:
> >> Hi,
> >>
> >> On 03/21/2018 02:54 PM, iallende wrote:
> >>> Hi everyone,
> >>>
> >>> I am trying to run Jailhouse in the ZynqMP, with Linux PREEMPT RT in 
> >>> another cell. However, I have some problems when I add the second Linux.
> >>>
> >>> root@xilinx-zcu102-2017_4:/# modprobe jailhouse
> >>> [   52.445169] jailhouse: loading out-of-tree module taints kernel.
> >>> root@xilinx-zcu102-2017_4:/# ls /dev/jailhouse ^C
> >>> root@xilinx-zcu102-2017_4:/# jailhouse enable zynqmp-zcu102.cell 
> >>>
> >>> Initializing Jailhouse hypervisor v0.7 (0-g5c13b64) on CPU 2
> >> Please checkout next and try again. This might already fix your issue.
> > With v0.8 i get this WARNING and I can load the module:
> > WARNING: "__hyp_stub_vectors" [/jailhouse/driver/jailhouse.ko] undefined!
> Please switch to next, and not to v0.8. Compile your kernel with
> CONFIG_KALLSYMS_ALL=y, or use this [1] patch.
> 
>   Ralf
> 
> [1]
> http://git.kiszka.org/?p=linux.git;a=commit;h=2a681cb2213e3ea0f142fae7345fb80208a88a53
> >>> Code location: 0xc0200050
> >>> Page pool usage after early setup: mem 33/996, remap 64/131072
> >>> Initializing processors:
> >>>  CPU 2... OK
> >>>  CPU 0... OK
> >>>  CPU 3... OK
> >>>  CPU 1... OK
> >>> Adding virtual PCI device 00:00.0 to cell "ZynqMP-ZCU102"
> >>> Adding virtual PCI device 00:01.0 to cell "ZynqMP-ZCU102"
> >>> Page pool usage after late setup: mem 42/996, remap 69/131072
> >>> Activating hypervisor
> >>> [   63.697232] jailhouse: CONFIG_OF_OVERLAY disabled
> >>> [   63.704029] jailhouse: failed to add virtual host controller
> >>> [   63.711610] The Jailhouse is opening.
> >>>
> >>> root@xilinx-zcu102-2017_4:/# jailhouse cell linux 
> >>> zynqmp-zcu102-linux-demo.cell Image -d system.dtb -i rootfs.cpio 
> >>>
> >>> FATAL: unhandled trap (exception class 0x17)
> >> Exception class 0x17 is a SMC64 call.
> >>
> >>> Cell state before exception:
> >>>  pc: ff800808e390   lr: ff8008467504 spsr: 2145 EL1
> >>>  sp: ffc87b927ab0  esr: 17 1 000
> >>>  x0: c214   x1: fd1a0060   x2: 
> >> Furthermore, it's a SIP_64.
> >>
> >> Commit 2482c47bc2d05f ("arm64: ignore SIPs used for low-power modes") on
> >> next will probably fix your issue.
> >>
> >>   Ralf
> >>>  x3:    x4:    x5: 
> >>>  x6:    x7:    x8: ff8008d27ee0
> >>>  x9: ffc87aaa4b5c  x10: ffc87b927b4c  x11: ff8008c8ccb2
> >>> x12:   x13: 0f93  x14: 0001
> >>> x15:   x16: ff8008193240  x17: 004128f0
> >>> x18: 00040900  x19: ffc87b927b28  x20: 0001
> >>> x21: 4784b740  x22: 4784b740  x23: fffa
> >>> x24: 000f4240  x25: 000f4240  x26: 000f4240
> >>> x27:   x28:   x29: ffc87b927ac0
> >>>
> >>> Parking CPU 2 (Cell: "ZynqMP-ZCU102")
> >>>
> >>>
> >>> Does anyone know why I have this problem? Am I missing any step?
> >>>
> >

It works with jailhouse-next, however, how can we switch between consoles? 
root@xilinx-zcu102-2017_4:/cells# jailhouse cell list
ID  NameState   Assigned CPUs   Failed 
CPUs 
0   ZynqMP-ZCU102   running 0-1 

1   ZynqMP-linux-demo   running 2-3 
  

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Re: [EXTERNAL] Re: Try jailhouse on Orange Pi Zero

2018-04-09 Thread Qiu Shui

On Monday, April 9, 2018 at 2:19:13 PM UTC+8, J. Kiszka wrote:
> On 2018-04-09 02:42, Qiu Shui wrote:
> > On Sunday, April 8, 2018 at 2:18:28 PM UTC+8, Qiu Shui wrote:
> >> On Sunday, April 8, 2018 at 11:29:01 AM UTC+8, Qiu Shui wrote:
> >>> On Monday, April 2, 2018 at 4:33:40 PM UTC+8, Qiu Shui wrote:
>  On Monday, April 2, 2018 at 3:05:08 PM UTC+8, Nikhil Devshatwar wrote:
> > On Monday 02 April 2018 11:16 AM, Qiu Shui wrote:
> >> On Monday, April 2, 2018 at 11:12:12 AM UTC+8, Qiu Shui wrote:
> >>> On Thursday, March 29, 2018 at 1:09:46 PM UTC+8, Jan Kiszka wrote:
>  On 2018-03-29 06:36, Qiu Shui wrote:
> > I build the armbian with these two patches to the kernel:
> > [1]
> > http://git.kiszka.org/?p=linux.git;a=commit;h=f057e9bb4ba2fca0b435d36893eb41ddd57b4208
> > [2]
> > http://git.kiszka.org/?p=linux.git;a=commit;h=1c926e27072d4cca76a756058554485067ce472b
> >
> > But when I build jailhouse with the armbian kernel source 
> > files(version: Linux orangepizero 4.16.0-rc6-sunxi #2 SMP Wed Mar 
> > 28 15:33:44 CST 2018 armv7l GNU/Linux), I got these warnings:
> > WARNING: "__stack_chk_fail" 
> > [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> > undefined!
> > WARNING: "__hyp_stub_vectors" 
> > [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> > undefined!
> > WARNING: "__stack_chk_guard" 
> > [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> > undefined!
> >
> > I have tried some google solutions but still not solved.
> >
> > Are there any suggestions?
> 
>  Regarding __hyp_stub_vectors: you also need
>  http://git.kiszka.org/?p=linux.git;a=commitdiff;h=2a681cb2213e3ea0f142fae7345fb80208a88a53
> 
>  The other two issue seem to be related to some build inconsistency: 
>  Your
>  kernel was built without CONFIG_CC_STACKPROTECTOR, but when you build
>  the Jailhouse module, this feature is considered to be enabled.
> 
>  Jan
> >>>
> >>> Thank you very much!
> >>> After two days trying, I've finally built the kernel and jailhouse 
> >>> module successfully.
> >>> (I am using armbian building scripts and modified the 
> >>> linux-sunxi-dev.config with "# CONFIG_THUMB2_KERNEL is not set")
> >>>
> >>> Now I can enable jailhouse and create cell:
> >>> # jailhouse enable configs/orangepi0.cell
> >>> # jailhouse cell create configs/orangepi0-gic-demo.cell
> >>> # jailhouse cell list
> >>> ID  NameState   Assigned CPUs 
> >>>   Failed CPUs
> >>> 0   Orange-Pi0  running 0,2-3
> >>> 1   orangepi0-gic-demo  shut down   1
> >>>
> >>> But when I load the gic-demo.bin, it failed:
> >>> # jailhouse cell load orangepi0-gic-demo 
> >>> inmates/demos/arm/gic-demo.bin
> >>> Unhandled data read at 0x1f0(4)
> >>> FATAL: unhandled trap (exception class 0x24)
> >>> pc=0xc08cc6c0 cpsr=0x2013 hsr=0x93830007
> >>> r0=0x0190 r1=0x0002 r2=0xa035 r3=0xcf807000
> >>> r4=0xcda54e10 r5=0xc1103d00 r6=0x00300402 r7=0xcd8d7480
> >>> r8=0x0002300c r9=0x0285 r10=0x r11=0xcda47df4
> >>> r12=0x0030 r13=0xcda47dd0 r14=0xc08c9ab8
> >>> Parking CPU 3 (Cell: "Orange-Pi0")
> >>> Cell "orangepi0-gic-demo" can be loaded
> >>>
> >>> Any suggestions would be greatly appreciated :)
> >>>
> >>> Is there any demo can be used to make sure my jailhouse environments 
> >>> are ready?
> >>>
> >>> Thanks!
> >>
> >> I solved this problem by trying some different memory configurations.
> >> The following does work:
> >> mem=448M vmalloc=256M
> >> /* Orangepi0.c */
> >>.hypervisor_memory = {
> >>.phys_start = 0x5f80,
> >>.size = 0x80,
> >>},
> >> ...
> >>/* RAM */ {
> >>.phys_start = 0x4000,
> >>.virt_start = 0x4000,
> >>.size =0x1f70,
> >>.flags = JAILHOUSE_MEM_READ | 
> >> JAILHOUSE_MEM_WRITE |
> >>JAILHOUSE_MEM_EXECUTE,
> >>},
> >>/* IVSHMEM shared memory region */ {
> >>.phys_start = 0x5f70,
> >>.virt_start = 0x5f70,
> >>.size = 0x10,
> >>.flags = JAILHOUSE_MEM_READ | 
> >> JAILHOUSE_MEM_WRITE,
> >>},
> >> 
> >>
> >> But if I use the following configuration. When I

Re: [EXTERNAL] Re: Try jailhouse on Orange Pi Zero

2018-04-09 Thread Jan Kiszka

On 2018-04-09 02:42, Qiu Shui wrote:
> On Sunday, April 8, 2018 at 2:18:28 PM UTC+8, Qiu Shui wrote:
>> On Sunday, April 8, 2018 at 11:29:01 AM UTC+8, Qiu Shui wrote:
>>> On Monday, April 2, 2018 at 4:33:40 PM UTC+8, Qiu Shui wrote:
 On Monday, April 2, 2018 at 3:05:08 PM UTC+8, Nikhil Devshatwar wrote:
> On Monday 02 April 2018 11:16 AM, Qiu Shui wrote:
>> On Monday, April 2, 2018 at 11:12:12 AM UTC+8, Qiu Shui wrote:
>>> On Thursday, March 29, 2018 at 1:09:46 PM UTC+8, Jan Kiszka wrote:
 On 2018-03-29 06:36, Qiu Shui wrote:
> I build the armbian with these two patches to the kernel:
> [1]
> http://git.kiszka.org/?p=linux.git;a=commit;h=f057e9bb4ba2fca0b435d36893eb41ddd57b4208
> [2]
> http://git.kiszka.org/?p=linux.git;a=commit;h=1c926e27072d4cca76a756058554485067ce472b
>
> But when I build jailhouse with the armbian kernel source 
> files(version: Linux orangepizero 4.16.0-rc6-sunxi #2 SMP Wed Mar 28 
> 15:33:44 CST 2018 armv7l GNU/Linux), I got these warnings:
> WARNING: "__stack_chk_fail" 
> [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> undefined!
> WARNING: "__hyp_stub_vectors" 
> [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> undefined!
> WARNING: "__stack_chk_guard" 
> [/home/liu/project/kiszka/jailhouse-0.8/driver/jailhouse.ko] 
> undefined!
>
> I have tried some google solutions but still not solved.
>
> Are there any suggestions?

 Regarding __hyp_stub_vectors: you also need
 http://git.kiszka.org/?p=linux.git;a=commitdiff;h=2a681cb2213e3ea0f142fae7345fb80208a88a53

 The other two issue seem to be related to some build inconsistency: 
 Your
 kernel was built without CONFIG_CC_STACKPROTECTOR, but when you build
 the Jailhouse module, this feature is considered to be enabled.

 Jan
>>>
>>> Thank you very much!
>>> After two days trying, I've finally built the kernel and jailhouse 
>>> module successfully.
>>> (I am using armbian building scripts and modified the 
>>> linux-sunxi-dev.config with "# CONFIG_THUMB2_KERNEL is not set")
>>>
>>> Now I can enable jailhouse and create cell:
>>> # jailhouse enable configs/orangepi0.cell
>>> # jailhouse cell create configs/orangepi0-gic-demo.cell
>>> # jailhouse cell list
>>> ID  NameState   Assigned CPUs   
>>> Failed CPUs
>>> 0   Orange-Pi0  running 0,2-3
>>> 1   orangepi0-gic-demo  shut down   1
>>>
>>> But when I load the gic-demo.bin, it failed:
>>> # jailhouse cell load orangepi0-gic-demo inmates/demos/arm/gic-demo.bin
>>> Unhandled data read at 0x1f0(4)
>>> FATAL: unhandled trap (exception class 0x24)
>>> pc=0xc08cc6c0 cpsr=0x2013 hsr=0x93830007
>>> r0=0x0190 r1=0x0002 r2=0xa035 r3=0xcf807000
>>> r4=0xcda54e10 r5=0xc1103d00 r6=0x00300402 r7=0xcd8d7480
>>> r8=0x0002300c r9=0x0285 r10=0x r11=0xcda47df4
>>> r12=0x0030 r13=0xcda47dd0 r14=0xc08c9ab8
>>> Parking CPU 3 (Cell: "Orange-Pi0")
>>> Cell "orangepi0-gic-demo" can be loaded
>>>
>>> Any suggestions would be greatly appreciated :)
>>>
>>> Is there any demo can be used to make sure my jailhouse environments 
>>> are ready?
>>>
>>> Thanks!
>>
>> I solved this problem by trying some different memory configurations.
>> The following does work:
>> mem=448M vmalloc=256M
>> /* Orangepi0.c */
>>  .hypervisor_memory = {
>>  .phys_start = 0x5f80,
>>  .size = 0x80,
>>  },
>> ...
>>  /* RAM */ {
>>  .phys_start = 0x4000,
>>  .virt_start = 0x4000,
>>  .size =0x1f70,
>>  .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
>>  JAILHOUSE_MEM_EXECUTE,
>>  },
>>  /* IVSHMEM shared memory region */ {
>>  .phys_start = 0x5f70,
>>  .virt_start = 0x5f70,
>>  .size = 0x10,
>>  .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
>>  },
>> 
>>
>> But if I use the following configuration. When I enable jailhouse, it 
>> says "JAILHOUSE_ENABLE: Invalid argument".
>> /* orangepi0.c */
>>  .hypervisor_memory = {
>>  .phys_start = 0x5c00,
>>  .size = 0x400,
>>  },
>> ..
>>  /* RAM */ {
>>  .phys_start = 0x4000,
>>  .virt_start = 0x4000,
>>

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