Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

Explicit format is always better than an implicit one where 0 stands for inherit, for example. On Sat, Apr 28, 2018 at 8:10 PM, Strontium wrote: > Wayne, > > I think it is an acceptable solution for V5 because this shouldn't get in > the way of a V5 release. > > For V6,

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

Wayne, I think it is an acceptable solution for V5 because this shouldn't get in the way of a V5 release. For V6, would it be feasible to define 0.01/0.1% to be a special value (like zero) which means "effectively zero" and then the pad gui can be updated with this special knowledge

[Kicad-developers] [PATCH] Don't reference CMAKE_INSTALL_PREFIX in installation paths

This is substituted at configuration time, creating an absolute path, which breaks overriding CMAKE_INSTALL_PREFIX at installation time, breaking the workflow for installation using GNU stow. --- CMakeLists.txt | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

2018-04-28 18:35 GMT+03:00 Wayne Stambaugh : > Just to be clear, the library developers are asking for the ability to > ignore clearance and ratio settings when creating solder mask and solder > paste only pads. If this is the case, it will require a board file format >

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

On 28/04/18 09:28, jp charras wrote: For custom shaped pads, building a solder mask shape with a negative margin can create issues (unpredictable shape for non convex polygons). So it is not allowed. One can set a negative margin in the footprint itself. This negative margin is then used

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

On 04/28/2018 11:25 AM, Rene Pöschl wrote: On 28/04/18 14:26, jp charras wrote: you also must set the solder paste ratio clearance clearance to a very small value (for instance 0.1 %) really? so if i set only the solderpaste clearance the global solderpaste ratio still overwrites my

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

Just to be clear, the library developers are asking for the ability to ignore clearance and ratio settings when creating solder mask and solder paste only pads. If this is the case, it will require a board file format change to add a flag to ignore the global and footprint level settings. I

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

On 28/04/18 14:26, jp charras wrote: you also must set the solder paste ratio clearance clearance to a very small value (for instance 0.1 %) really? so if i set only the solderpaste clearance the global solderpaste ratio still overwrites my settings? That would be really strange

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

2018-04-28 15:04 GMT+03:00 Rene Pöschl : > The global settings here are less for ensuring correct alignment and more > for a global paste reduction. That's right, that's what I meant. In the example datasheet you have 0.05mm tolerance for the location of the mask in relation

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

Le 28/04/2018 à 14:04, Rene Pöschl a écrit : > Maybe a bit of further clarification will help. > We are talking about at least two different things here. > > First issue is what i guess most of you have in mind. The thing about mask > clearance. Here the > normal way is of course to enter the

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

Maybe a bit of further clarification will help. We are talking about at least two different things here. First issue is what i guess most of you have in mind. The thing about mask clearance. Here the normal way is of course to enter the restrictions of your board house globally into kicad. But

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

On 28/04/18 18:51, jp charras wrote: Le 28/04/2018 à 10:08, Eeli Kaikkonen a écrit : It still looks to me that the original problem wasn't understood, and I wasn't able to make it clear. A Solder Mask Defined footprint means that the solder mask opening is smaller than the underlying copper

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

Le 28/04/2018 à 10:08, Eeli Kaikkonen a écrit : > It still looks to me that the original problem wasn't understood, and I > wasn't able to make it > clear. A Solder Mask Defined footprint means that the solder mask opening is > smaller than the > underlying copper area. It may also be

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

It still looks to me that the original problem wasn't understood, and I wasn't able to make it clear. A Solder Mask Defined footprint means that the solder mask opening is smaller than the underlying copper area. It may also be differently shaped than the underlying copper pad. Also the paste area

Re: [Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

Le 28/04/2018 à 09:28, jp charras a écrit : > I am guessing there are also similar registration problems for the solder > mask, but I don't know them. ^solder paste -- Jean-Pierre CHARRAS

Re: [Kicad-developers] Mac packaging update

So there is another issue I am facing with new mac packaging. If I removed everything related to kicad and also do clean up as follows: rm -rf ~/Library/Saved Application State/org.kicad-pcb.kicad.savedState rm -rf ~/Library/Preferences/kicad rm -rf ~/Library/Caches/kicad rm -rf

[Kicad-developers] Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?

Le 27/04/2018 à 22:33, Eeli Kaikkonen a écrit : > Do I see some kind of gap in communication here? I know what Rene is talking > about because I have > designed solder mask defined pads. Wayne talks about "tolerances". But this > is not about > tolerances.  It's about designing a mask-only (or