Re: [kicad-users] what is an unspc pin ?

2009-07-03 Thread Marc Olanie
Thank you, Andy. You solved the problem. 

I did’nt catch that “unspc” was standing for “unspecified”… not enough
sleep, too much alcool… or something like that J

The problem was coming from the ULN28xx lib. The “common” input pin is not
declared as a “power pin” by default . Everything is running fine now. 

Modifying ERC rules was not an option… masking an error is not very elegant,
and the problem would have been reported later on the DRC… 

Tnks again, Andy. 

Marc

 

De : kicad-users@yahoogroups.com [mailto:kicad-us...@yahoogroups.com] De la
part de Andy Eskelson
Envoyé : vendredi 3 juillet 2009 00:31
À : kicad-users@yahoogroups.com
Objet : [SPAM+Header] - Re: [kicad-users] what is an unspc pin ? - Email
found in subject

 






The DRC works by a set of rules. Unspecified pins ALWAYS generate a
warning by default. You have a few options.

Ignore the warning a carry on.

Do NOT to use unspecified pins, Perhaps a passive could be used instead.

Modify the rules so that the warning is not generated.
Click on the ERC button and then select the Options tab
If you look at the Unspec pin you will see that it is set to generate
warnings when connected to any other type. You can click on the little
coloured squares to change the rules. 

DO BE CAREFUK as you might set things such that you could miss some
critical errors.

Andy

On Thu, 02 Jul 2009 17:16:34 -
F6ITU marc.ola...@decision.fr mailto:Marc.olanie%40decision.fr  wrote:

 Hi
 I have a serie of ERC errors telling me 
 Pin passive connected to Pin unspc 
 
 what does it mean, and what could be the action to take...
 I did'nt forget to create my power flags, and I had to multiply the +5v
inputs to avoid such errors. But I cannot kill the last 3 remaining errors..
 All those errors are pointing to power supply inputs or IC's pins
connected to VDD/+5v
 
 Tnks
 Marc
 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your
question.
 Please post your bug reports here. They will be picked up by the creator
of Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your
symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the
kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups
Links
 
 
 





Re: [kicad-users] Re: Missing rat nest wires in Pcbnew

2009-07-03 Thread Andy Eskelson
The good grid size is one that matches the libs...

Normally the default is fine. What can happen is that if you create your
own parts, and use a different grid size then things don't align. 

As a silly example, say you set the grid to 55ml when designing the part, and
still used 50ml for the normaly layout. That would cause all sorts of
problems. I've learnt to be very careful with grid sizes when creating parts. 
:-)

OK with ERC that's fine. It's probably a name mismatch as Alan suggests.

Dont forget that there very often there IS NOT a 1:1 relationship between
a lib and mod.

You could have a BC108, 2N3904, and any number of other transistors. They
would all have the same footprints, so you would hope that they would
have the same pin names, i.e. ebc however some get numbered pins. Then
you have FETs, sgd pins rather than ebc but still the same footprint.
I've found diodes with pins 1  2 when a  k would be better. When I
find such problems I normally create another module and name it
something like TO92-ebc or LED-5mm-ak.

Andy



 




On Fri, 03 Jul 2009 01:23:31 -
acidb...@ymail.com sunblast...@gmail.com wrote:

 I always do an ERC check, till it gets to 0.
 Whats a good grid size? I always use the default,which i think
 is 50ml, should i try something smaller?
 BTW this always happens in kicad, i could never figure out why.
 
 
 
 
 --- In kicad-users@yahoogroups.com, Andy Eskelson andyya...@... wrote:
 
  Every connection you make should have a wire in the rats nest.
  
  Have you run an ERC on the circuit?
  The most common problem is that you forget to add junctions when there
  are more than one connection on a wire. (I'm always doing this)
  
  Another problem is that you mess up the grid size and the connection does
  not quite connect to a pin.
  
  In both cases the ERC check you throw up a list of bad connections and
  draw a little arrow where the problem is.
  
  
  Andy
  
  
  
  On Thu, 02 Jul 2009 18:35:13 -
  acidb...@... sunblast...@... wrote:
  
   when i open Pcbnew, after CVPcb, i noticed some of my led's and resistors 
   aren't connected, no rats nest.
   Shouldn't every module have a connection ?
   
   
   
   
   
   Please read the Kicad FAQ in the group files section before posting your 
   question.
   Please post your bug reports here. They will be picked up by the creator 
   of Kicad.
   Please visit http://www.kicadlib.org for details of how to contribute 
   your symbols/modules to the kicad library.
   For building Kicad from source and other development questions visit the 
   kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! 
   Groups Links
   
   
  
 
 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 


Re: [kicad-users] what is an unspc pin ?

2009-07-03 Thread Werner Almesberger
Andy Eskelson wrote:
 Ignore the warning a carry on.

I think it's dangerous to make users ignore warnings or errors.
It's very easy to miss a genuine one if you're already expecting
some non-zero amount of complaints.

 Modify the rules so that the warning is not generated.

That's rather sweeping as well. Furthermore, the rules get reset
each time you run eeschema, so the workflow would get rather
messy.

I wouldn't care so much about unspec pins, but it's also fairly
common to spread a high-current output over multiple pins, and
this also gets us conflicts. A similar case would be multiple
power sources in a serial or parallel configuration.

One solution may be to have a list of known exceptions that are
then ignored. I just posted a proof of concept implementation to
the kicad-devel list.

An example of such an exception file is here:
http://svn.openmoko.org/trunk/gta02-core/gta02-core.erx

Using component references and pin numbers gives use very fine
granularity. I.e., one can silence precisely the one error that's
not an error, without affecting anything else.

- Werner


Re: [kicad-users] what is an unspc pin ?

2009-07-03 Thread Andy Eskelson
Warnings are just that, a warning it's up to the user to heed or ignore.
Nothing sweeping about that.

Modify the rules, to be done with care as I pointed out, and I do agree
that most of the rules should be left alone. Unspecified pins are set
to generate a warning all the time - so as they are unspecified then
I think it's reasonable to use them for a special purpose - the
rules being reset is a bit of a pain however. 

Exception lists... sorry to say this but that's clumsy, long winded,
and not obvious to the untrained eye. It may well be necessary for some
projects and I can see it's use (I do hope you have suggested that the
error output of the ERC is usable as an input) . For most uses I think
that the addition of some user pin types would solve many of these
problems. Assigned on a per-project basis, and you simply tag an existing
pin with a user type and then specify what it connects to. a user pin
connection would over-rule the standard ERC 

Just my 2pennyworth :-)

Andy 


On Fri, 3 Jul 2009 05:46:16 -0700
Werner Almesberger wer...@almesberger.net wrote:

 Andy Eskelson wrote:
  Ignore the warning a carry on.
 
 I think it's dangerous to make users ignore warnings or errors.
 It's very easy to miss a genuine one if you're already expecting
 some non-zero amount of complaints.
 
  Modify the rules so that the warning is not generated.
 
 That's rather sweeping as well. Furthermore, the rules get reset
 each time you run eeschema, so the workflow would get rather
 messy.
 
 I wouldn't care so much about unspec pins, but it's also fairly
 common to spread a high-current output over multiple pins, and
 this also gets us conflicts. A similar case would be multiple
 power sources in a serial or parallel configuration.
 
 One solution may be to have a list of known exceptions that are
 then ignored. I just posted a proof of concept implementation to
 the kicad-devel list.
 
 An example of such an exception file is here:
 http://svn.openmoko.org/trunk/gta02-core/gta02-core.erx
 
 Using component references and pin numbers gives use very fine
 granularity. I.e., one can silence precisely the one error that's
 not an error, without affecting anything else.
 
 - Werner
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 


Re: [kicad-users] Re: Missing rat nest wires in Pcbnew

2009-07-03 Thread Alain Mouette
in eeschema the pin has a name.

in pcbnew the pin also has a name.

the component and the module are independent and were made by different 
persons.

So it is possible (probable) that the pins have not the same name.

Alain

acidb...@ymail.com escreveu:
 Not sure i know what you mean.
 I think your saying if i assigned the wrong module to a part
 in Cvpcb it won't get wired in pcbnew ??
 
 
 --- In kicad-users@yahoogroups.com, Alain Mouette ala...@... wrote:
 You probably have diffent names in eeschema and pcbnew.

 Example: a trandistor with B-C-E and a module with 1-2-3

 Alain

 acidb...@... escreveu:
 I always do an ERC check, till it gets to 0.
 Whats a good grid size? I always use the default,which i think
 is 50ml, should i try something smaller?
 BTW this always happens in kicad, i could never figure out why.




 --- In kicad-users@yahoogroups.com, Andy Eskelson andyyahoo@ wrote:
 Every connection you make should have a wire in the rats nest.

 Have you run an ERC on the circuit?
 The most common problem is that you forget to add junctions when there
 are more than one connection on a wire. (I'm always doing this)

 Another problem is that you mess up the grid size and the connection does
 not quite connect to a pin.

 In both cases the ERC check you throw up a list of bad connections and
 draw a little arrow where the problem is.


 Andy



 On Thu, 02 Jul 2009 18:35:13 -
 acidblue@ sunblaster5@ wrote:

 when i open Pcbnew, after CVPcb, i noticed some of my led's and resistors 
 aren't connected, no rats nest.
 Shouldn't every module have a connection ?



 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator 
 of Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute 
 your symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! 
 Groups Links






 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links





 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 


Re: [kicad-users] what is an unspc pin ?

2009-07-03 Thread Werner Almesberger
Andy Eskelson wrote:
 Warnings are just that, a warning it's up to the user to heed or ignore.

What I mean is that it's easy to miss warnings if your system always
generates some. You're much less likely to miss a warning if your
system normally doesn't complain. This applies also to compilation,
Web browsing, etc.

Likewise, if you disable an entire class of diagostics, you may
easily miss new problems.

 Exception lists... sorry to say this but that's clumsy, long winded,
 and not obvious to the untrained eye.

It tells you if it has hidden any exceptions.

 projects and I can see it's use (I do hope you have suggested that the
 error output of the ERC is usable as an input) .

The current ERC format would be very hard to use for this, since it
doesn't include the full information. Also, you probably don't want
to just make all problems disappear too often, but instead examine
every one of them carefully. Those warnings are there to help you,
not to add more bureaucracy to your life ;-))

 For most uses I think
 that the addition of some user pin types would solve many of these
 problems. Assigned on a per-project basis, and you simply tag an existing
 pin with a user type and then specify what it connects to. a user pin
 connection would over-rule the standard ERC 

Yes, pin type overrides could be used to solve this problem as well,
and they could help with some other issues as well - including making
the constraints even tighter.

If someone implements pin type overrides, I think there should also
be some visual indication that such an override is in effect, or it
will get very hard to review such schematics.

- Werner


[kicad-users] Re: Missing rat nest wires in Pcbnew

2009-07-03 Thread acidb...@ymail.com
ok I think i'm beginning to see.
Now i just need to find I tutorial on how 
to make/change modules.


--- In kicad-users@yahoogroups.com, Andy Eskelson andyya...@... wrote:

 The good grid size is one that matches the libs...
 
 Normally the default is fine. What can happen is that if you create your
 own parts, and use a different grid size then things don't align. 
 
 As a silly example, say you set the grid to 55ml when designing the part, and
 still used 50ml for the normaly layout. That would cause all sorts of
 problems. I've learnt to be very careful with grid sizes when creating parts. 
 :-)
 
 OK with ERC that's fine. It's probably a name mismatch as Alan suggests.
 
 Dont forget that there very often there IS NOT a 1:1 relationship between
 a lib and mod.
 
 You could have a BC108, 2N3904, and any number of other transistors. They
 would all have the same footprints, so you would hope that they would
 have the same pin names, i.e. ebc however some get numbered pins. Then
 you have FETs, sgd pins rather than ebc but still the same footprint.
 I've found diodes with pins 1  2 when a  k would be better. When I
 find such problems I normally create another module and name it
 something like TO92-ebc or LED-5mm-ak.
 
 Andy
 
 
 
  
 
 
 
 
 On Fri, 03 Jul 2009 01:23:31 -
 acidb...@... sunblast...@... wrote:
 
  I always do an ERC check, till it gets to 0.
  Whats a good grid size? I always use the default,which i think
  is 50ml, should i try something smaller?
  BTW this always happens in kicad, i could never figure out why.
  
  
  
  
  --- In kicad-users@yahoogroups.com, Andy Eskelson andyyahoo@ wrote:
  
   Every connection you make should have a wire in the rats nest.
   
   Have you run an ERC on the circuit?
   The most common problem is that you forget to add junctions when there
   are more than one connection on a wire. (I'm always doing this)
   
   Another problem is that you mess up the grid size and the connection does
   not quite connect to a pin.
   
   In both cases the ERC check you throw up a list of bad connections and
   draw a little arrow where the problem is.
   
   
   Andy
   
   
   
   On Thu, 02 Jul 2009 18:35:13 -
   acidblue@ sunblaster5@ wrote:
   
when i open Pcbnew, after CVPcb, i noticed some of my led's and 
resistors aren't connected, no rats nest.
Shouldn't every module have a connection ?





Please read the Kicad FAQ in the group files section before posting 
your question.
Please post your bug reports here. They will be picked up by the 
creator of Kicad.
Please visit http://www.kicadlib.org for details of how to contribute 
your symbols/modules to the kicad library.
For building Kicad from source and other development questions visit 
the kicad-devel group at 
http://groups.yahoo.com/group/kicad-develYahoo! Groups Links


   
  
  
  
  
  
  
  
  Please read the Kicad FAQ in the group files section before posting your 
  question.
  Please post your bug reports here. They will be picked up by the creator of 
  Kicad.
  Please visit http://www.kicadlib.org for details of how to contribute your 
  symbols/modules to the kicad library.
  For building Kicad from source and other development questions visit the 
  kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
  Links
  
  
 





Re: [kicad-users] what is an unspc pin ?

2009-07-03 Thread Andy Eskelson
Agreed that's the problem with warnings... as you say it's the same with
the compiler errors some systems generate. I must admit that once or
twice I've given up on some software due to it generating so many
warnings that I simply could not be bother to sift through the error file
to find the real problem.


The visual indication of a user pin is a good idea, I suppose the obvious
choice would be colour and / or shape. Colour is not over used in
eeschema so I think I would lean more to than than shape.

Andy



On Fri, 3 Jul 2009 08:51:34 -0700
Werner Almesberger wer...@almesberger.net wrote:

 Andy Eskelson wrote:
  Warnings are just that, a warning it's up to the user to heed or ignore.
 
 What I mean is that it's easy to miss warnings if your system always
 generates some. You're much less likely to miss a warning if your
 system normally doesn't complain. This applies also to compilation,
 Web browsing, etc.
 
 Likewise, if you disable an entire class of diagostics, you may
 easily miss new problems.
 
  Exception lists... sorry to say this but that's clumsy, long winded,
  and not obvious to the untrained eye.
 
 It tells you if it has hidden any exceptions.
 
  projects and I can see it's use (I do hope you have suggested that the
  error output of the ERC is usable as an input) .
 
 The current ERC format would be very hard to use for this, since it
 doesn't include the full information. Also, you probably don't want
 to just make all problems disappear too often, but instead examine
 every one of them carefully. Those warnings are there to help you,
 not to add more bureaucracy to your life ;-))
 
  For most uses I think
  that the addition of some user pin types would solve many of these
  problems. Assigned on a per-project basis, and you simply tag an existing
  pin with a user type and then specify what it connects to. a user pin
  connection would over-rule the standard ERC 
 
 Yes, pin type overrides could be used to solve this problem as well,
 and they could help with some other issues as well - including making
 the constraints even tighter.
 
 If someone implements pin type overrides, I think there should also
 be some visual indication that such an override is in effect, or it
 will get very hard to review such schematics.
 
 - Werner
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 


Re: [kicad-users] Re: Missing rat nest wires in Pcbnew

2009-07-03 Thread Andy Eskelson
In your other post you mention a 0.1uF and a 1uF cap as examples.

In eeschema you need to add from the devices lib a C for the 0.1 and a
capapol (polarised cap (electrolytic) for the 1uF

Add the wires, annotate the circuit, then generate the netlist
Then run CvPCB. Select C1 for the 0.1 and C1V5 for the 1uF

Save the result, which will generate a new netlist, and then import that
into PCBnew You should find that all your wires are there.


While you are in CvPCB, goto the 10th icon on the top bar, (Display
footprints list documentation) that's a pdf file of all the included
footprints with Kicad. It's very useful to have that handy when you are
selecting the footprints.


For documentation there is some: libs are covered in the eeschema docs,
and footprints in the PCBnew doc. There is also a tutorial. You should
find them in:

/usr/local/kicad/doc   (for linux)

c:program files/kicad/doc (for windows)

You have to drill down into whatever lang. you want. There is a help
folder and a tutorial folder.

Do run through the tutorial a few times, as it takes a bit of practise to
get the hang of things, the key point to remember is that the pin names
and numbers must agree between the libs and modules.

Also remember to save your libs and modules in your OWN directories, this
just safeguards against a new kicad version overwriting anything you have
done.


Andy



 On Fri, 03 Jul 2009 20:10:37 -
acidb...@ymail.com sunblast...@gmail.com wrote:

 ok I think i'm beginning to see.
 Now i just need to find I tutorial on how 
 to make/change modules.
 
 
 --- In kicad-users@yahoogroups.com, Andy Eskelson andyya...@... wrote:
 
  The good grid size is one that matches the libs...
  
  Normally the default is fine. What can happen is that if you create your
  own parts, and use a different grid size then things don't align. 
  
  As a silly example, say you set the grid to 55ml when designing the part, 
  and
  still used 50ml for the normaly layout. That would cause all sorts of
  problems. I've learnt to be very careful with grid sizes when creating 
  parts. :-)
  
  OK with ERC that's fine. It's probably a name mismatch as Alan suggests.
  
  Dont forget that there very often there IS NOT a 1:1 relationship between
  a lib and mod.
  
  You could have a BC108, 2N3904, and any number of other transistors. They
  would all have the same footprints, so you would hope that they would
  have the same pin names, i.e. ebc however some get numbered pins. Then
  you have FETs, sgd pins rather than ebc but still the same footprint.
  I've found diodes with pins 1  2 when a  k would be better. When I
  find such problems I normally create another module and name it
  something like TO92-ebc or LED-5mm-ak.
  
  Andy
  
  
  
   
  
  
  
  
  On Fri, 03 Jul 2009 01:23:31 -
  acidb...@... sunblast...@... wrote:
  
   I always do an ERC check, till it gets to 0.
   Whats a good grid size? I always use the default,which i think
   is 50ml, should i try something smaller?
   BTW this always happens in kicad, i could never figure out why.
   
   
   
   
   --- In kicad-users@yahoogroups.com, Andy Eskelson andyyahoo@ wrote:
   
Every connection you make should have a wire in the rats nest.

Have you run an ERC on the circuit?
The most common problem is that you forget to add junctions when there
are more than one connection on a wire. (I'm always doing this)

Another problem is that you mess up the grid size and the connection 
does
not quite connect to a pin.

In both cases the ERC check you throw up a list of bad connections and
draw a little arrow where the problem is.


Andy



On Thu, 02 Jul 2009 18:35:13 -
acidblue@ sunblaster5@ wrote:

 when i open Pcbnew, after CVPcb, i noticed some of my led's and 
 resistors aren't connected, no rats nest.
 Shouldn't every module have a connection ?
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting 
 your question.
 Please post your bug reports here. They will be picked up by the 
 creator of Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute 
 your symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit 
 the kicad-devel group at 
 http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
 
 

   
   
   
   
   
   
   
   Please read the Kicad FAQ in the group files section before posting your 
   question.
   Please post your bug reports here. They will be picked up by the creator 
   of Kicad.
   Please visit http://www.kicadlib.org for details of how to contribute 
   your symbols/modules to the kicad library.
   For building Kicad from source and other development questions visit the 
   kicad-devel group at 

[kicad-users] Re: Missing rat nest wires in Pcbnew

2009-07-03 Thread acidb...@ymail.com
Whoops! I spoke too soon everything worked except the 0.1uf caps.
back to square 1.


--- In kicad-users@yahoogroups.com, acidb...@... sunblast...@... wrote:

 Thanks Andy your the Man!
 That worked!
 One more thing, in my schematic i had to use the power-flag tool
 for v+ and gnd.
 Do i have to enter those manually in PCbnew, since there not on my
 board ?
 
 
 --- In kicad-users@yahoogroups.com, Andy Eskelson andyyahoo@ wrote:
 
  In your other post you mention a 0.1uF and a 1uF cap as examples.
  
  In eeschema you need to add from the devices lib a C for the 0.1 and a
  capapol (polarised cap (electrolytic) for the 1uF
  
  Add the wires, annotate the circuit, then generate the netlist
  Then run CvPCB. Select C1 for the 0.1 and C1V5 for the 1uF
  
  Save the result, which will generate a new netlist, and then import that
  into PCBnew You should find that all your wires are there.
  
  
  While you are in CvPCB, goto the 10th icon on the top bar, (Display
  footprints list documentation) that's a pdf file of all the included
  footprints with Kicad. It's very useful to have that handy when you are
  selecting the footprints.
  
  
  For documentation there is some: libs are covered in the eeschema docs,
  and footprints in the PCBnew doc. There is also a tutorial. You should
  find them in:
  
  /usr/local/kicad/doc   (for linux)
  
  c:program files/kicad/doc (for windows)
  
  You have to drill down into whatever lang. you want. There is a help
  folder and a tutorial folder.
  
  Do run through the tutorial a few times, as it takes a bit of practise to
  get the hang of things, the key point to remember is that the pin names
  and numbers must agree between the libs and modules.
  
  Also remember to save your libs and modules in your OWN directories, this
  just safeguards against a new kicad version overwriting anything you have
  done.
  
  
  Andy
  
  
  
   On Fri, 03 Jul 2009 20:10:37 -
  acidblue@ sunblaster5@ wrote:
  
   ok I think i'm beginning to see.
   Now i just need to find I tutorial on how 
   to make/change modules.
   
   
   --- In kicad-users@yahoogroups.com, Andy Eskelson andyyahoo@ wrote:
   
The good grid size is one that matches the libs...

Normally the default is fine. What can happen is that if you create your
own parts, and use a different grid size then things don't align. 

As a silly example, say you set the grid to 55ml when designing the 
part, and
still used 50ml for the normaly layout. That would cause all sorts of
problems. I've learnt to be very careful with grid sizes when creating 
parts. :-)

OK with ERC that's fine. It's probably a name mismatch as Alan suggests.

Dont forget that there very often there IS NOT a 1:1 relationship 
between
a lib and mod.

You could have a BC108, 2N3904, and any number of other transistors. 
They
would all have the same footprints, so you would hope that they would
have the same pin names, i.e. ebc however some get numbered pins. Then
you have FETs, sgd pins rather than ebc but still the same footprint.
I've found diodes with pins 1  2 when a  k would be better. When I
find such problems I normally create another module and name it
something like TO92-ebc or LED-5mm-ak.

Andy



 




On Fri, 03 Jul 2009 01:23:31 -
acidblue@ sunblaster5@ wrote:

 I always do an ERC check, till it gets to 0.
 Whats a good grid size? I always use the default,which i think
 is 50ml, should i try something smaller?
 BTW this always happens in kicad, i could never figure out why.
 
 
 
 
 --- In kicad-users@yahoogroups.com, Andy Eskelson andyyahoo@ wrote:
 
  Every connection you make should have a wire in the rats nest.
  
  Have you run an ERC on the circuit?
  The most common problem is that you forget to add junctions when 
  there
  are more than one connection on a wire. (I'm always doing this)
  
  Another problem is that you mess up the grid size and the 
  connection does
  not quite connect to a pin.
  
  In both cases the ERC check you throw up a list of bad connections 
  and
  draw a little arrow where the problem is.
  
  
  Andy
  
  
  
  On Thu, 02 Jul 2009 18:35:13 -
  acidblue@ sunblaster5@ wrote:
  
   when i open Pcbnew, after CVPcb, i noticed some of my led's and 
   resistors aren't connected, no rats nest.
   Shouldn't every module have a connection ?
   
   
   
   
   
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