On 09/16/2012 08:07 PM, Avi Kivity wrote:
While unspecified, the behaviour of Intel processors is to first
perform the page table walk, then, if the walk was successful, to
atomically update the accessed and dirty bits of walked paging elements.
While we are not required to follow this
Could be that windows is seeing a USB 1 device while needing a USB 2.
You might solve this by passing through the devices explicitly; go to the Qemu
console, and type USB-INFO(if I remember rightly) while the device is plugged
in.
This will show you all connected devices, including vendor id
On 09/16/2012 08:07 PM, Avi Kivity wrote:
@@ -3672,20 +3672,17 @@ static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu, unsigned long gva,
gpa_t *gpa, struct x86_exception *exception,
bool write)
{
- u32 access =
On 09/16/2012 08:07 PM, Avi Kivity wrote:
- pt_access = ACC_ALL;
+ pt_access = pte_access = ACC_ALL;
+ ++walker-level;
- for (;;) {
+ do {
gfn_t real_gfn;
unsigned long host_addr;
+ pt_access = pte_access;
+
On 09/16/2012 08:07 PM, Avi Kivity wrote:
'eperm' is no longer used in the walker loop, so we can eliminate it.
Reviewed-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
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This series of 2 patches makes it possible for userspace to save and
restore the complete register state of a Book3S HV guest. Currently
it is not possible to save/restore several SPRs or any of the
floating-point state (including VMX/Altivec and VSX state). This
series extends the
This enables userspace to get and set all the guest floating-point
state using the KVM_[GS]ET_ONE_REG ioctls. The floating-point state
includes all of the traditional floating-point registers and the
FPSCR (floating point status/control register), all the VMX/Altivec
vector registers and the VSCR
This enables userspace to get and set various SPRs (special-purpose
registers) using the KVM_[GS]ET_ONE_REG ioctls. With this, userspace
can get and set all the SPRs that are part of the guest state, either
through the KVM_[GS]ET_REGS ioctls, the KVM_[GS]ET_SREGS ioctls, or
the KVM_[GS]ET_ONE_REG
On 09/16/2012 08:07 PM, Avi Kivity wrote:
+ /*
+ * On a write fault, fold the dirty bit into accessed_dirty by shifting
it one
+ * place right.
+ *
+ * On a read fault, do nothing.
+ */
+ accessed_dirty = pte (write_fault ilog2(PFERR_WRITE_MASK));
It
On 09/16/2012 08:07 PM, Avi Kivity wrote:
Instead of branchy code depending on level, gpte.ps, and mmu configuration,
prepare everything in a bitmap during mode changes and look it up during
runtime.
Avi,
Can we introduce ignore_bits_mask[] (like rsvd_bits_mask), if pse is not
supported,
On 09/15/2012 11:13 PM, Marcelo Tosatti wrote:
On Fri, Sep 14, 2012 at 05:57:22PM +0800, Xiao Guangrong wrote:
We can not directly call kvm_release_pfn_clean to release the pfn
since we can meet noslot pfn which is used to cache mmio info into
spte
Signed-off-by: Xiao Guangrong
On 09/15/2012 11:25 PM, Marcelo Tosatti wrote:
On Fri, Sep 14, 2012 at 05:59:06PM +0800, Xiao Guangrong wrote:
Wrap the common operations into these two functions
Signed-off-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Why? I think people are used to
spin_lock(lock)
sequence
On 09/15/2012 11:31 PM, Marcelo Tosatti wrote:
On Fri, Sep 14, 2012 at 06:13:11PM +0800, Xiao Guangrong wrote:
On 09/14/2012 05:59 PM, Xiao Guangrong wrote:
+ return FNAME(prefetch_gpte)(vcpu, sp, spte, gptep[i], true);
Sorry, this was wrong. Update this patch.
[PATCH v2 5/5]
On 09/16/2012 05:58 PM, Avi Kivity wrote:
On 09/14/2012 08:59 AM, Xiao Guangrong wrote:
On 09/10/2012 05:26 PM, Xiao Guangrong wrote:
On 09/10/2012 05:09 PM, Avi Kivity wrote:
On 09/07/2012 09:16 AM, Xiao Guangrong wrote:
mmu_notifier is the interface to broadcast the mm events to KVM, the
While it shouldn't happen on regular guests, we sometimes hit it when fuzzing
within the guest, which would cause the lkvm process to exit - which is
undesired.
Our PIT tests were using the debug port to trigger a reboot. Instead of using
that port we now use the reboot line of our i8042
This patch adds a mmio bar to the qemu standard vga which allows to
access the standard vga registers and bochs dispi interface registers
via mmio.
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
hw/vga-pci.c | 97
On 09/17/12 22:12, Peter Lieven wrote:
On 09/17/12 10:41, Kevin Wolf wrote:
Am 16.09.2012 12:13, schrieb Peter Lieven:
Hi,
when trying to block migrate a VM from one node to another, the source
VM crashed with the following assertion:
block.c:3829: bdrv_set_in_use: Assertion `bs-in_use !=
Am 18.09.2012 12:28, schrieb Peter Lieven:
On 09/17/12 22:12, Peter Lieven wrote:
On 09/17/12 10:41, Kevin Wolf wrote:
Am 16.09.2012 12:13, schrieb Peter Lieven:
Hi,
when trying to block migrate a VM from one node to another, the source
VM crashed with the following assertion:
On Tue, 2012-09-18 at 11:51 +0200, Gerd Hoffmann wrote:
This patch adds a mmio bar to the qemu standard vga which allows to
access the standard vga registers and bochs dispi interface registers
via mmio.
I had a patch like that somewhere (or is that it ? :-)
I dropped it in favor of a more
On Tue, Sep 18, 2012 at 09:14:55AM +0100, Richard Davies wrote:
Hi Mel,
Thanks for your latest patch, I attach a perf report below with this on top
of all previous patches. There is still lock contention, though in a
different place.
59.97% qemu-kvm [kernel.kallsyms] [k]
On 09/18/12 12:32, Benjamin Herrenschmidt wrote:
On Tue, 2012-09-18 at 11:51 +0200, Gerd Hoffmann wrote:
This patch adds a mmio bar to the qemu standard vga which allows to
access the standard vga registers and bochs dispi interface registers
via mmio.
I had a patch like that somewhere (or
Hi Christoffer,
On Sat, Sep 15, 2012 at 04:34:29PM +0100, Christoffer Dall wrote:
The following series implements KVM support for ARM processors,
specifically on the Cortex A-15 platform. We feel this is ready to be
merged.
Work is done in collaboration between Columbia University, Virtual
On Sat, Sep 15, 2012 at 04:34:36PM +0100, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
The KVM hypervisor mmu code requires access to the mem_type prot_pte
field when setting up page tables pointing to a device. Unfortunately,
the mem_type structure is opaque.
Add an
On Tue, Sep 18, 2012 at 8:21 AM, Will Deacon will.dea...@arm.com wrote:
Hi Christoffer,
On Sat, Sep 15, 2012 at 04:34:29PM +0100, Christoffer Dall wrote:
The following series implements KVM support for ARM processors,
specifically on the Cortex A-15 platform. We feel this is ready to be
On Sat, Sep 15, 2012 at 04:34:43PM +0100, Christoffer Dall wrote:
KVM uses the stage-2 page tables and the Hyp page table format,
so let's define the fields we need to access in KVM.
We use pgprot_guest to indicate stage-2 entries.
Christoffer Dall c.d...@virtualopensystems.com
---
On Sat, Sep 15, 2012 at 04:34:49PM +0100, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Add a HYP pgd to the core code (so it can benefit all Linux
hypervisors).
Populate this pgd with an identity mapping of the code contained
in the .hyp.idmap.text section
Offer a
On Sat, Sep 15, 2012 at 04:34:55PM +0100, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/mm/idmap.c |4
1 file changed, 4 insertions(+)
Just fold this into the previous patch.
Will
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To unsubscribe
On Sat, Sep 15, 2012 at 04:35:02PM +0100, Christoffer Dall wrote:
From: Rusty Russell rusty.russ...@linaro.org
We want some of these for use in KVM, so pull them out of
arch/arm/kernel/perf_event_v7.c into their own asm/perf_bits.h.
Signed-off-by: Rusty Russell rusty.russ...@linaro.org
Juan Quintela quint...@redhat.com wrote:
Hi
Please send in any agenda items you are interested in covering.
there are no agenda so . call is cancelled.
Happy hacking, Juan.
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To unsubscribe from this list: send the line unsubscribe kvm in
the body of a message to
On 9/17/12 2:31 AM, Dong Hao wrote:
From: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Then, the code can be shared between kvm events and perf stat
[ Dong Hao haod...@linux.vnet.ibm.com: rebase it on acme's git tree ]
Signed-off-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Hi Steve,
Do you think these patches will make their way into the redhat kernel sometime
soon?
What is the state of support for NFS over RDMA support at redhat?
Thanks,
Andrew
On Sep 11, 2012, at 7:03 PM, Steve Dickson wrote:
On 09/04/2012 05:31 AM, Andrew Holway wrote:
Hello.
#
On 09/18/2012 09:14 AM, Paul Mackerras wrote:
This enables userspace to get and set various SPRs (special-purpose
registers) using the KVM_[GS]ET_ONE_REG ioctls. With this, userspace
can get and set all the SPRs that are part of the guest state, either
through the KVM_[GS]ET_REGS ioctls, the
On 18 September 2012 13:47, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:34:43PM +0100, Christoffer Dall wrote:
+#define L_PTE2_SHAREDL_PTE_SHARED
+#define L_PTE2_READ (_AT(pteval_t, 1) 6) /* HAP[0] */
+#define L_PTE2_WRITE (_AT(pteval_t,
Am Dienstag 18 September 2012, 06:42:18 schrieb Veruca Salt:
Could be that windows is seeing a USB 1 device while needing a USB 2.
You might solve this by passing through the devices explicitly; go to the
Qemu console, and type USB-INFO(if I remember rightly) while the device is
plugged in.
-Original Message-
From: Avi Kivity [mailto:a...@redhat.com]
Sent: Friday, September 07, 2012 12:02 AM
To: Li, Jiongxi
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH 1/5]KVM: x86, apicv: add APICv register virtualization
support
On 09/05/2012 08:41 AM, Li, Jiongxi wrote:
- APIC
Looking at http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
The new value for EAX is 0x4001.
This depends on
http://lists.gnu.org/archive/html/qemu-devel/2012-09/msg02497.html
As far as I known it is #5. It depends on (1), (2), (3) and (4).
Based on cpu-queue[1] branch.
From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
EAX should be KVM_CPUID_FEATURES (0x4001) not 0.
---
target-i386/kvm.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 761a9b1..0c9f5dd 100644
---
From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
EAX should be KVM_CPUID_FEATURES (0x4001) not 0.
If kvm is not configured, the additional option of hypervisor-level=1
(or hypervisor-level=0x4001) needs to be specified to get this.
---
target-i386/cpu.c | 12
On Tue, Sep 18, 2012 at 10:49:52AM -0400, Don Slutz wrote:
From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
EAX should be KVM_CPUID_FEATURES (0x4001) not 0.
---
target-i386/kvm.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
On Tue, Sep 18, 2012 at 10:06 AM, Catalin Marinas
catalin.mari...@arm.com wrote:
On 18 September 2012 13:47, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:34:43PM +0100, Christoffer Dall wrote:
+#define L_PTE2_SHAREDL_PTE_SHARED
+#define L_PTE2_READ
On Tue, Sep 18, 2012 at 04:05:13PM +0100, Christoffer Dall wrote:
On Tue, Sep 18, 2012 at 10:06 AM, Catalin Marinas
catalin.mari...@arm.com wrote:
On 18 September 2012 13:47, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:34:43PM +0100, Christoffer Dall wrote:
+#define
On Tue, Sep 18, 2012 at 11:07 AM, Catalin Marinas
catalin.mari...@arm.com wrote:
On Tue, Sep 18, 2012 at 04:05:13PM +0100, Christoffer Dall wrote:
On Tue, Sep 18, 2012 at 10:06 AM, Catalin Marinas
catalin.mari...@arm.com wrote:
On 18 September 2012 13:47, Will Deacon will.dea...@arm.com
On 16.08.2012 14:47, Richard Davies wrote:
http://marc.info/?l=qemu-develm=134304194329745
We have been experiencing this problem for a while now too, using qemu-kvm
(currently at 1.1.1).
Unfortunately, hv_relaxed doesn't seem to fix it. The following command line
produces the issue:
Found by http://coccinelle.lip6.fr/
Signed-off-by: Peter Senna Tschudin peter.se...@gmail.com
---
arch/x86/kernel/alternative.c | 4 ++--
arch/x86/kernel/apic/apic.c| 2 +-
arch/x86/kvm/vmx.c | 2 +-
arch/x86/pci/mmconfig-shared.c | 2 +-
4 files changed, 5 insertions(+), 5
On Tue, Sep 18, 2012 at 10:49:53AM -0400, Don Slutz wrote:
From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
EAX should be KVM_CPUID_FEATURES (0x4001) not 0.
If kvm is not configured, the additional option of hypervisor-level=1
(or hypervisor-level=0x4001) needs
On Tue, Sep 18, 2012 at 8:23 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:34:36PM +0100, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
The KVM hypervisor mmu code requires access to the mem_type prot_pte
field when setting up page tables pointing to
On 9/17/12 2:31 AM, Dong Hao wrote:
From: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Then, the code can be shared between kvm events and perf stat
[ Dong Hao haod...@linux.vnet.ibm.com: rebase it on acme's git tree ]
Signed-off-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
On 09/18/12 13:00, Eduardo Habkost wrote:
On Tue, Sep 18, 2012 at 10:49:53AM -0400, Don Slutz wrote:
From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
EAX should be KVM_CPUID_FEATURES (0x4001) not 0.
If kvm is not configured, the additional option of hypervisor-level=1
On 09/13/2012 11:59 AM, Avi Kivity wrote:
On 09/12/2012 09:11 PM, Jiri Slaby wrote:
On 09/12/2012 10:18 AM, Avi Kivity wrote:
On 09/12/2012 11:13 AM, Jiri Slaby wrote:
Please provide the output of vmxcap
(http://goo.gl/c5lUO),
Unrestricted guest no
The big
On Tue, 18 Sep 2012 21:40:31 +0200
Jiri Slaby jsl...@suse.cz wrote:
On 09/13/2012 11:59 AM, Avi Kivity wrote:
On 09/12/2012 09:11 PM, Jiri Slaby wrote:
On 09/12/2012 10:18 AM, Avi Kivity wrote:
On 09/12/2012 11:13 AM, Jiri Slaby wrote:
Please provide the output of vmxcap
On 09/18/12 11:05, Eduardo Habkost wrote:
On Tue, Sep 18, 2012 at 10:49:52AM -0400, Don Slutz wrote:
From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
EAX should be KVM_CPUID_FEATURES (0x4001) not 0.
---
target-i386/kvm.c |2 +-
1 files changed, 1 insertions(+),
On Sat, Sep 15, 2012 at 11:34:36AM -0400, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
The KVM hypervisor mmu code requires access to the mem_type prot_pte
field when setting up page tables pointing to a device. Unfortunately,
the mem_type structure is opaque.
Add an
On Tue, Sep 18, 2012 at 5:04 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Sat, Sep 15, 2012 at 11:34:36AM -0400, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
The KVM hypervisor mmu code requires access to the mem_type prot_pte
field when setting up page
On Tue, Sep 18, 2012 at 8:47 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:34:43PM +0100, Christoffer Dall wrote:
KVM uses the stage-2 page tables and the Hyp page table format,
so let's define the fields we need to access in KVM.
We use pgprot_guest to indicate
On Tue, Sep 18, 2012 at 9:08 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:35:02PM +0100, Christoffer Dall wrote:
From: Rusty Russell rusty.russ...@linaro.org
We want some of these for use in KVM, so pull them out of
arch/arm/kernel/perf_event_v7.c into their own
On Mon, Sep 17, 2012 at 09:16:28PM -0600, Alex Williamson wrote:
To emulate level triggered interrupts, add a resample option to
KVM_IRQFD. When specified, a new resamplefd is provided that notifies
the user when the irqchip has been resampled by the VM. This may, for
instance, indicate an
Hi Andrew,
On Tue, 18 Sep 2012 12:46:46 -0700 Andrew Morton a...@linux-foundation.org
wrote:
hm, thanks. This will probably take some time to resolve so I think
I'll drop
mm-move-all-mmu-notifier-invocations-to-be-done-outside-the-pt-lock.patch
On Tue, Sep 18, 2012 at 04:06:25PM +0200, Alexander Graf wrote:
Could you please merge the registers that you share with book3s pr
into shared code?
OK - that's just DAR and DSISR for this patch, isn't it?
And basically all of the FP/VMX/VSX regs in the second patch?
(Does VSX work in PR KVM?)
On Wed, 19 Sep 2012 10:00:34 +1000 Stephen Rothwell s...@canb.auug.org.au
wrote:
Hi Andrew,
On Tue, 18 Sep 2012 12:46:46 -0700 Andrew Morton a...@linux-foundation.org
wrote:
hm, thanks. This will probably take some time to resolve so I think
I'll drop
Hi Andrew,
On Tue, 18 Sep 2012 17:20:29 -0700 Andrew Morton a...@linux-foundation.org
wrote:
On Wed, 19 Sep 2012 10:00:34 +1000 Stephen Rothwell s...@canb.auug.org.au
wrote:
On Tue, 18 Sep 2012 12:46:46 -0700 Andrew Morton
a...@linux-foundation.org wrote:
hm, thanks. This will
On 09/19/2012 03:18 AM, David Ahern wrote:
On 9/17/12 2:31 AM, Dong Hao wrote:
From: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Then, the code can be shared between kvm events and perf stat
[ Dong Hao haod...@linux.vnet.ibm.com: rebase it on acme's git tree ]
Signed-off-by: Xiao
On Fri, 2012-09-14 at 03:44 +0200, Alexander Graf wrote:
We're slowly moving towards ONE_REG. ARM is already going full steam
ahead and I'd like to have every new register in PPC be modeled with
it as well. The old interface broke on us one time too often now :).
As I said, if we run into
On 9/18/12 7:53 PM, Xiao Guangrong wrote:
Does not apply to Arnaldo's latest perf/core branch.
The patch has already been applied to this branch:
http://git.kernel.org/?p=linux/kernel/git/acme/linux.git;a=commit;h=0007eceaceb11520071d053acfe06ee3326b1d13
Did not expect that. ok. I'll try
Tom Herbert therb...@google.com writes:
On Tue, Sep 11, 2012 at 10:49 PM, Rusty Russell ru...@rustcorp.com.auwrote:
Perhaps Tom can explain how we avoid out-of-order receive for the
accelerated RFS case? It's not clear to me, but we need to be able to
do that for virtio-net if it implements
Will Deacon will.dea...@arm.com writes:
On Sat, Sep 15, 2012 at 04:35:02PM +0100, Christoffer Dall wrote:
From: Rusty Russell rusty.russ...@linaro.org
We want some of these for use in KVM, so pull them out of
arch/arm/kernel/perf_event_v7.c into their own asm/perf_bits.h.
Signed-off-by:
On 09/18/12 12:31, Kevin Wolf wrote:
Am 18.09.2012 12:28, schrieb Peter Lieven:
On 09/17/12 22:12, Peter Lieven wrote:
On 09/17/12 10:41, Kevin Wolf wrote:
Am 16.09.2012 12:13, schrieb Peter Lieven:
Hi,
when trying to block migrate a VM from one node to another, the source
VM crashed with
This enables userspace to get and set various SPRs (special-purpose
registers) using the KVM_[GS]ET_ONE_REG ioctls. With this, userspace
can get and set all the SPRs that are part of the guest state, either
through the KVM_[GS]ET_REGS ioctls, the KVM_[GS]ET_SREGS ioctls, or
the KVM_[GS]ET_ONE_REG
On 09/18/2012 09:14 AM, Paul Mackerras wrote:
This enables userspace to get and set various SPRs (special-purpose
registers) using the KVM_[GS]ET_ONE_REG ioctls. With this, userspace
can get and set all the SPRs that are part of the guest state, either
through the KVM_[GS]ET_REGS ioctls, the
On Tue, Sep 18, 2012 at 04:06:25PM +0200, Alexander Graf wrote:
Could you please merge the registers that you share with book3s pr
into shared code?
OK - that's just DAR and DSISR for this patch, isn't it?
And basically all of the FP/VMX/VSX regs in the second patch?
(Does VSX work in PR KVM?)
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