Re: [PATCH kvm-unit-tests 2/4] x86: replace set_exception_return with longjmp-based implementation

On Tue, Dec 15, 2015 at 11:25:36AM +0100, Paolo Bonzini wrote: > set_exception_return forces exceptions handlers to return to a specific > address instead of returning to the instruction address pushed by the > CPU at the time of the exception. The unit tests apic.c and vmx.c use > this

[Question] Switching VCPU CPL from the hypervisor ?

Hi, I working on an application in which I control an arbitrary process to execute an a given code (injected code for example). I want the process I'm controlling to execute my code with root privilege. Is it possible to arbitrary switch vcpu cpl to 0 from the hypervisor level (process is in user

Re: [PATCH v7 15/19] KVM: ARM64: Add access handler for PMUSERENR register

On 15/12/15 15:59, Shannon Zhao wrote: > > > On 2015/12/15 22:58, Marc Zyngier wrote: >> On 15/12/15 08:49, Shannon Zhao wrote: From: Shannon Zhao The reset value of PMUSERENR_EL0 is UNKNOWN, use reset_unknown. PMUSERENR_EL0 holds some bits which

Re: [PATCH kvm-unit-tests 1/4] lib: add setjmp header and x86 implementation

On Tue, Dec 15, 2015 at 11:25:35AM +0100, Paolo Bonzini wrote: > Signed-off-by: Paolo Bonzini > --- > config/config-i386.mak | 2 ++ > config/config-x86-common.mak | 4 +++- > config/config-x86_64.mak | 2 ++ > lib/setjmp.h | 12 >

Re: [PATCH kvm-unit-tests 1/4] lib: add setjmp header and x86 implementation

On 15/12/2015 17:43, Andrew Jones wrote: > How about making this a "real" test, i.e. > > report("longjmp", i == 10); > return report_summary(); > > I have patches that allow adding timeouts to tests, that I've been > thinking about posting upstream. With those we could add a short > timeout to

Re: [Question] Switching VCPU CPL from the hypervisor ?

On 15/12/2015 17:20, Yacine HEBBAL wrote: > Hi, > I working on an application in which I control an arbitrary process to > execute an a given code (injected code for example). I want the process I'm > controlling to execute my code with root privilege. Is it possible to > arbitrary switch vcpu

Re: [PATCH kvm-unit-tests 3/4] x86: remove test_for_exception

On Tue, Dec 15, 2015 at 11:25:37AM +0100, Paolo Bonzini wrote: > Test functions know whether an exception was generated simply by checking > the last value returned by set_exception_jmpbuf. The exception number is > passed to set_exception_jmpbuf so that it can set up the exception handler. > >

Re: [Question] Switching VCPU CPL from the hypervisor ?

> > Would a hypercall do? VMCALL can be executed from CPL 3. > > Paolo > -- > > What I want to do is: when a controlled process is in user mode, i change its cpl to 0, force it to execute a code that is injected in the VM, set back its cpl to 3 and let it run like if nothing happened Yacine

Re: [GIT PULL 2/4] KVM: s390: obey kptr_restrict in traces

On Tue, Dec 15, 2015 at 11:23 AM, Christian Borntraeger wrote: > The s390dbf and trace events provide a debugfs interface. > If kptr_restrict is active, we should not expose kernel > pointers. We can fence the debugfs output by using %pK > instead of %p. > > Cc: Kees Cook

Re: [PATCH v10 0/6] QEMU support for KVM Guest Debug on arm64

On 8 December 2015 at 18:32, Alex Bennée wrote: > Hi, > > Here is the latest patch set to support debugging of KVM guests on > arm64. The main changes are fixing arm32 compiles (mostly with stubs > for the upcomming arm32 debug) and the usual bunch of minor tweaks and >

[GIT PULL 2/4] KVM: s390: obey kptr_restrict in traces

The s390dbf and trace events provide a debugfs interface. If kptr_restrict is active, we should not expose kernel pointers. We can fence the debugfs output by using %pK instead of %p. Cc: Kees Cook Reviewed-by: Cornelia Huck Signed-off-by:

[GIT PULL 1/4] KVM: s390: use assignment instead of memcpy

Replace two memcpy with proper assignment. Suggested-by: Paolo Bonzini Reviewed-by: David Hildenbrand Acked-by: Cornelia Huck Signed-off-by: Christian Borntraeger --- arch/s390/kvm/kvm-s390.c | 6

[GIT PULL 0/4] KVM: s390 features and fixes for 4.5 (kvm/next)

Paolo, here is the 2nd part of the s390 queue for 4.5 The following changes since commit 460146348518a1c4e810d01baf81847f8c6a1c73: Merge tag 'kvm-s390-next-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD (2015-12-02 13:50:04 +0100) are available in the git

[GIT PULL 3/4] KVM: s390: fix mismatch between user and in-kernel guest limit

From: Dominik Dingel While the userspace interface requests the maximum size the gmap code expects to get a maximum address. This error resulted in bigger page tables than necessary for some guest sizes, e.g. a 2GB guest used 3 levels instead of 2. At the same time

[GIT PULL 4/4] KVM: s390: consider system MHA for guest storage

From: Guenther Hutzl Verify that the guest maximum storage address is below the MHA (maximum host address) value allowed on the host. Acked-by: Michael Holzheu Reviewed-by: Cornelia Huck Reviewed-by: David

Re: [PATCH v7 19/19] KVM: ARM64: Add a new kvm ARM PMU device

On Tue, Dec 15, 2015 at 03:59:31PM +, Marc Zyngier wrote: > On 15/12/15 15:50, Shannon Zhao wrote: > > > > > > On 2015/12/15 23:33, Marc Zyngier wrote: > >> On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > Add a new kvm device type

Re: [PATCH kvm-unit-tests 3/4] x86: remove test_for_exception

On Tue, Dec 15, 2015 at 2:25 AM, Paolo Bonzini wrote: > Test functions know whether an exception was generated simply by checking > the last value returned by set_exception_jmpbuf. The exception number is > passed to set_exception_jmpbuf so that it can set up the exception

[PATCH v7 17/19] KVM: ARM64: Reset PMU state when resetting vcpu

From: Shannon Zhao When resetting vcpu, it needs to reset the PMU state to initial status. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/reset.c | 3 +++ include/kvm/arm_pmu.h | 2 ++ virt/kvm/arm/pmu.c | 17 + 3 files

[PATCH v7 16/19] KVM: ARM64: Add PMU overflow interrupt routing

From: Shannon Zhao When calling perf_event_create_kernel_counter to create perf_event, assign a overflow handler. Then when the perf event overflows, set the corresponding bit of guest PMOVSSET register. If this counter is enabled and its interrupt is enabled as well,

[PATCH v7 00/19] KVM: ARM64: Add guest PMU support

From: Shannon Zhao This patchset adds guest PMU support for KVM on ARM64. It takes trap-and-emulate approach. When guest wants to monitor one event, it will be trapped by KVM and KVM will call perf_event API to create a perf event and call relevant perf_event APIs to get

[PATCH v7 04/19] KVM: ARM64: Add access handler for PMCR register

From: Shannon Zhao Add reset handler which gets host value of PMCR_EL0 and make writable bits architecturally UNKNOWN except PMCR.E which is zero. Add an access handler for PMCR. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/sys_regs.c | 39

[PATCH v7 01/19] ARM64: Move PMU register related defines to asm/pmu.h

From: Shannon Zhao To use the ARMv8 PMU related register defines from the KVM code, we move the relevant definitions to asm/pmu.h header file. Signed-off-by: Anup Patel Signed-off-by: Shannon Zhao ---

[PATCH v7 13/19] KVM: ARM64: Add access handler for PMSWINC register

From: Shannon Zhao Add access handler which emulates writing and reading PMSWINC register and add support for creating software increment event. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/sys_regs.c | 14 +-

Re: ARM64/KVM: Bad page state in process iperf

On Tue, Dec 15, 2015 at 03:46:03AM +, Bhushan Bharat wrote: > > Hi All, > > I am running "iperf" in KVM guest on ARM64 machine and observing below crash. Which host/guest kernel version is this? Which hardware? -Christoffer > > = > $iperf -c 3.3.3.3 -P 4 -t 0

Re: ARM64/KVM: Bad page state in process iperf

On 15/12/15 03:46, Bhushan Bharat wrote: > > Hi All, > > I am running "iperf" in KVM guest on ARM64 machine and observing below crash. > > = > $iperf -c 3.3.3.3 -P 4 -t 0 -i 5 -w 90k > > Client connecting

Re: [PATCH 06/11] KVM: MMU: let page fault handler be aware tracked page

On 12/01/2015 02:26 AM, Xiao Guangrong wrote: The page fault caused by write access on the write tracked page can not be fixed, it always need to be emulated. page_fault_handle_page_track() is the fast path we introduce here to skip holding mmu-lock and shadow page table walking Why can it be

[PATCH v7 18/19] KVM: ARM64: Free perf event of PMU when destroying vcpu

From: Shannon Zhao When KVM frees VCPU, it needs to free the perf_event of PMU. Signed-off-by: Shannon Zhao --- arch/arm/kvm/arm.c| 1 + include/kvm/arm_pmu.h | 2 ++ virt/kvm/arm/pmu.c| 21 + 3 files changed, 24

[PATCH v7 06/19] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register

From: Shannon Zhao Add access handler which gets host value of PMCEID0 or PMCEID1 when guest access these registers. Writing action to PMCEID0 or PMCEID1 is ignored. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/sys_regs.c | 26

Re: kvmclock doesn't work, help?

On 14/12/2015 23:31, Andy Lutomirski wrote: > > RAW TSC NTP corrected TSC > > t0 10 10 > > t1 20 19.99 > > t2 30 29.98 > > t3 40 39.97 > > t4 50

Re: [PATCH 09/11] KVM: MMU: simplify mmu_need_write_protect

On 12/15/2015 04:43 PM, Kai Huang wrote: On 12/01/2015 02:26 AM, Xiao Guangrong wrote: Now, all non-leaf shadow page are page tracked, if gfn is not tracked there is no non-leaf shadow page of gfn is existed, we can directly make the shadow page of gfn to unsync Signed-off-by: Xiao

[PATCH v7 11/19] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register

From: Shannon Zhao Since the reset value of PMINTENSET and PMINTENCLR is UNKNOWN, use reset_unknown for its reset handler. Add a handler to emulate writing PMINTENSET or PMINTENCLR register. Signed-off-by: Shannon Zhao ---

[PATCH v7 10/19] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register

From: Shannon Zhao Since the reset value of PMCNTENSET and PMCNTENCLR is UNKNOWN, use reset_unknown for its reset handler. Add a handler to emulate writing PMCNTENSET or PMCNTENCLR register. When writing to PMCNTENSET, call perf_event_enable to enable the perf event.

[PATCH v7 03/19] KVM: ARM64: Add offset defines for PMU registers

From: Shannon Zhao We are about to trap and emulate accesses to each PMU register individually. This adds the context offsets for the AArch64 PMU registers. Signed-off-by: Shannon Zhao --- arch/arm64/include/asm/kvm_asm.h | 25

Re: [PATCH 06/11] KVM: MMU: let page fault handler be aware tracked page

On 12/15/2015 04:11 PM, Kai Huang wrote: On 12/01/2015 02:26 AM, Xiao Guangrong wrote: The page fault caused by write access on the write tracked page can not be fixed, it always need to be emulated. page_fault_handle_page_track() is the fast path we introduce here to skip holding mmu-lock

Re: [PATCH 09/11] KVM: MMU: simplify mmu_need_write_protect

On 12/15/2015 04:47 PM, Kai Huang wrote: A further thinking is can we move it to mmu_need_write_protect? Passing can_unsync as parameter to kvm_unsync_pages sounds a little bit odd. + if (s->unsync) continue; WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);

Re: [PATCH 08/11] KVM: MMU: use page track for non-leaf shadow pages

On 12/15/2015 03:52 PM, Kai Huang wrote: On 12/01/2015 02:26 AM, Xiao Guangrong wrote: non-leaf shadow pages are always write protected, it can be the user of page track Signed-off-by: Xiao Guangrong --- arch/x86/include/asm/kvm_page_track.h | 8 +

Re: [PATCH 09/11] KVM: MMU: simplify mmu_need_write_protect

On 12/01/2015 02:26 AM, Xiao Guangrong wrote: Now, all non-leaf shadow page are page tracked, if gfn is not tracked there is no non-leaf shadow page of gfn is existed, we can directly make the shadow page of gfn to unsync Signed-off-by: Xiao Guangrong ---

[PATCH v7 12/19] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register

From: Shannon Zhao Since the reset value of PMOVSSET and PMOVSCLR is UNKNOWN, use reset_unknown for its reset handler. Add a handler to emulate writing PMOVSSET or PMOVSCLR register. When writing non-zero value to PMOVSSET, pend PMU interrupt. Signed-off-by: Shannon

[PATCH v7 02/19] KVM: ARM64: Define PMU data structure for each vcpu

From: Shannon Zhao Here we plan to support virtual PMU for guest by full software emulation, so define some basic structs and functions preparing for futher steps. Define struct kvm_pmc for performance monitor counter and struct kvm_pmu for performance monitor unit for

[PATCH v7 05/19] KVM: ARM64: Add access handler for PMSELR register

From: Shannon Zhao Since the reset value of PMSELR_EL0 is UNKNOWN, use reset_unknown for its reset handler. When reading PMSELR, return the PMSELR.SEL field to guest. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/sys_regs.c | 17

[PATCH v7 07/19] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function

From: Shannon Zhao When we use tools like perf on host, perf passes the event type and the id of this event type category to kernel, then kernel will map them to hardware event number and write this number to PMU PMEVTYPER_EL0 register. When getting the event number in

[PATCH v7 08/19] KVM: ARM64: Add access handler for event typer register

From: Shannon Zhao These kind of registers include PMEVTYPERn, PMCCFILTR and PMXEVTYPER which is mapped to PMEVTYPERn or PMCCFILTR. The access handler translates all aarch32 register offsets to aarch64 ones and uses vcpu_sys_reg() to access their values to avoid taking

[PATCH v7 14/19] KVM: ARM64: Add helper to handle PMCR register bits

From: Shannon Zhao According to ARMv8 spec, when writing 1 to PMCR.E, all counters are enabled by PMCNTENSET, while writing 0 to PMCR.E, all counters are disabled. When writing 1 to PMCR.P, reset all event counters, not including PMCCNTR, to zero. When writing 1 to

[PATCH v7 19/19] KVM: ARM64: Add a new kvm ARM PMU device

From: Shannon Zhao Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement the kvm_device_ops for it. Signed-off-by: Shannon Zhao --- Documentation/virtual/kvm/devices/arm-pmu.txt | 16 arch/arm64/include/uapi/asm/kvm.h

[PATCH v7 09/19] KVM: ARM64: Add access handler for event counter register

From: Shannon Zhao These kind of registers include PMEVCNTRn, PMCCNTR and PMXEVCNTR which is mapped to PMEVCNTRn. The access handler translates all aarch32 register offsets to aarch64 ones and uses vcpu_sys_reg() to access their values to avoid taking care of big

[PATCH v7 15/19] KVM: ARM64: Add access handler for PMUSERENR register

From: Shannon Zhao The reset value of PMUSERENR_EL0 is UNKNOWN, use reset_unknown. PMUSERENR_EL0 holds some bits which decide whether PMU registers can be accessed from EL0. Add some check helpers to handle the access from EL0. Signed-off-by: Shannon Zhao

Re: [PATCH 04/11] KVM: page track: add the framework of guest page tracking

On 12/15/2015 03:06 PM, Kai Huang wrote: Hi Guangrong, I am starting to review this series, and should have some comments or questions, you can determine whether they are valuable :) Thank you very much for your review and breaking the silent on this patchset. ;) +static void

Re: [PATCH 08/11] KVM: MMU: use page track for non-leaf shadow pages

On 12/15/2015 03:52 PM, Kai Huang wrote: static bool __mmu_gfn_lpage_is_disallowed(gfn_t gfn, int level, @@ -2140,12 +2150,18 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, hlist_add_head(>hash_link,

Re: [PATCH 09/11] KVM: MMU: simplify mmu_need_write_protect

On 12/15/2015 04:43 PM, Kai Huang wrote: On 12/01/2015 02:26 AM, Xiao Guangrong wrote: Now, all non-leaf shadow page are page tracked, if gfn is not tracked there is no non-leaf shadow page of gfn is existed, we can directly make the shadow page of gfn to unsync Signed-off-by: Xiao

RE: ARM64/KVM: Bad page state in process iperf

Hi Mark, > -Original Message- > From: Marc Zyngier [mailto:marc.zyng...@arm.com] > Sent: Tuesday, December 15, 2015 3:05 PM > To: Bhushan Bharat-R65777 ; > kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org; linux-arm- > ker...@lists.infradead.org;

RE: ARM64/KVM: Bad page state in process iperf

> -Original Message- > From: Christoffer Dall [mailto:christoffer.d...@linaro.org] > Sent: Tuesday, December 15, 2015 2:59 PM > To: Bhushan Bharat-R65777 > Cc: kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org; linux-arm- > ker...@lists.infradead.org;

Re: [PATCH v3 3/4] VSOCK: Introduce vhost-vsock.ko

On Fri, Dec 11, 2015 at 01:45:29PM +, Alex Bennée wrote: > > + if (head == vq->num) { > > + if (unlikely(vhost_enable_notify(>dev, vq))) { > > + vhost_disable_notify(>dev, vq); > > + continue; > > Why are we doing

Re: [PATCH 05/11] KVM: page track: introduce kvm_page_track_{add,remove}_page

On 12/15/2015 03:15 PM, Kai Huang wrote: On 12/01/2015 02:26 AM, Xiao Guangrong wrote: These two functions are the user APIs: - kvm_page_track_add_page(): add the page to the tracking pool after that later specified access on that page will be tracked - kvm_page_track_remove_page():

Re: [PATCH v3 4/4] VSOCK: Add Makefile and Kconfig

On Fri, Dec 11, 2015 at 05:19:08PM +, Alex Bennée wrote: > > +config VHOST_VSOCK > > + tristate "vhost virtio-vsock driver" > > + depends on VSOCKETS && EVENTFD > > + select VIRTIO_VSOCKETS_COMMON > > + select VHOST > > + select VHOST_RING > > + default n > > + ---help--- > > +

Re: ARM64/KVM: Bad page state in process iperf

On 15/12/15 09:53, Bhushan Bharat wrote: > Hi Mark, > >> -Original Message- >> From: Marc Zyngier [mailto:marc.zyng...@arm.com] >> Sent: Tuesday, December 15, 2015 3:05 PM >> To: Bhushan Bharat-R65777 ; >> kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org;

Re: [PATCH kvm-unit-tests 0/6] Improve the output of test runners

On 14/12/2015 22:24, Radim Krčmář wrote: > This series is a mix of patches that change the output of run_tests.sh > and x86-run. The output of ./run_tests.sh now looks like this: I like the idea, thanks! I agree with Andrew about pretty much everything, except that I like having the summary

[PATCH kvm-unit-tests 1/4] lib: add setjmp header and x86 implementation

Signed-off-by: Paolo Bonzini --- config/config-i386.mak | 2 ++ config/config-x86-common.mak | 4 +++- config/config-x86_64.mak | 2 ++ lib/setjmp.h | 12 lib/x86/setjmp32.S | 25 +

[PATCH kvm-unit-tests 2/4] x86: replace set_exception_return with longjmp-based implementation

set_exception_return forces exceptions handlers to return to a specific address instead of returning to the instruction address pushed by the CPU at the time of the exception. The unit tests apic.c and vmx.c use this functionality to recover from expected exceptions. When using

[PATCH kvm-unit-tests 4/4] x86: apic: cleanup

Signed-off-by: Paolo Bonzini --- x86/apic.c | 26 +++--- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/x86/apic.c b/x86/apic.c index de19724..dfaea35 100644 --- a/x86/apic.c +++ b/x86/apic.c @@ -66,7 +66,7 @@ static bool

[PATCH kvm-unit-tests 0/3] use setjmp/longjmp to catch exceptions

This is an attempt to fix David's reported problem with set_exception_return and make it more robust. Patch 1 introduces setjmp; patches 2 and 3 replace test_for_exception and set_exception_return with setjmp/longjmp. Patch 4 provides further cleanups. Paolo Paolo Bonzini (4): lib: add

[PATCH kvm-unit-tests 3/4] x86: remove test_for_exception

Test functions know whether an exception was generated simply by checking the last value returned by set_exception_jmpbuf. The exception number is passed to set_exception_jmpbuf so that it can set up the exception handler. Signed-off-by: Paolo Bonzini --- lib/x86/desc.c |

RE: ARM64/KVM: Bad page state in process iperf

> -Original Message- > From: Marc Zyngier [mailto:marc.zyng...@arm.com] > Sent: Tuesday, December 15, 2015 3:50 PM > To: Bhushan Bharat-R65777 ; > kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org; linux-arm- > ker...@lists.infradead.org;

RE: ARM64/KVM: Bad page state in process iperf

> -Original Message- > From: Marc Zyngier [mailto:marc.zyng...@arm.com] > Sent: Tuesday, December 15, 2015 4:49 PM > To: Bhushan Bharat-R65777 ; > kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org; linux-arm- > ker...@lists.infradead.org;

Re: ARM64/KVM: Bad page state in process iperf

On 15/12/15 10:57, Bhushan Bharat wrote: > > >> -Original Message- >> From: Marc Zyngier [mailto:marc.zyng...@arm.com] >> Sent: Tuesday, December 15, 2015 3:50 PM >> To: Bhushan Bharat-R65777 ; >> kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org; linux-arm-

Re: [PATCH v7 01/19] ARM64: Move PMU register related defines to asm/pmu.h

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > To use the ARMv8 PMU related register defines from the KVM code, > we move the relevant definitions to asm/pmu.h header file. > > Signed-off-by: Anup Patel > Signed-off-by: Shannon

Re: [PATCH v7 01/19] ARM64: Move PMU register related defines to asm/pmu.h

On 2015/12/15 19:34, Marc Zyngier wrote: On 15/12/15 08:49, Shannon Zhao wrote: From: Shannon Zhao To use the ARMv8 PMU related register defines from the KVM code, we move the relevant definitions to asm/pmu.h header file. Signed-off-by: Anup Patel

[3.19.y-ckt stable] Patch "MIPS: KVM: Uninit VCPU in vcpu_create error path" has been added to staging queue

This is a note to let you know that I have just added a patch titled MIPS: KVM: Uninit VCPU in vcpu_create error path to the linux-3.19.y-queue branch of the 3.19.y-ckt extended stable tree which can be found at: http://kernel.ubuntu.com/git/ubuntu/linux.git/log/?h=linux-3.19.y-queue

[3.19.y-ckt stable] Patch "MIPS: KVM: Fix CACHE immediate offset sign extension" has been added to staging queue

This is a note to let you know that I have just added a patch titled MIPS: KVM: Fix CACHE immediate offset sign extension to the linux-3.19.y-queue branch of the 3.19.y-ckt extended stable tree which can be found at:

[3.19.y-ckt stable] Patch "MIPS: KVM: Fix ASID restoration logic" has been added to staging queue

This is a note to let you know that I have just added a patch titled MIPS: KVM: Fix ASID restoration logic to the linux-3.19.y-queue branch of the 3.19.y-ckt extended stable tree which can be found at: http://kernel.ubuntu.com/git/ubuntu/linux.git/log/?h=linux-3.19.y-queue This patch

Re: [PATCH v7 19/19] KVM: ARM64: Add a new kvm ARM PMU device

On Tue, Dec 15, 2015 at 03:59:31PM +, Marc Zyngier wrote: > On 15/12/15 15:50, Shannon Zhao wrote: > > > > > > On 2015/12/15 23:33, Marc Zyngier wrote: > >> On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > Add a new kvm device type

[PATCH v2] KVM: PPC: Exit guest upon fatal machine check exception

This patch modifies KVM to cause a guest exit with KVM_EXIT_NMI instead of immediately delivering a 0x200 interrupt to guest upon machine check exception in guest address. Exiting the guest enables QEMU to build error log and deliver machine check exception to guest OS (either via guest OS

Re: [PATCH 07/11] KVM: page track: add notifier support

On 12/01/2015 02:26 AM, Xiao Guangrong wrote: Notifier list is introduced so that any node wants to receive the track event can register to the list Two APIs are introduced here: - kvm_page_track_register_notifier(): register the notifier to receive track event -

[PATCH v2] KVM: PPC: Exit guest upon fatal machine check exception

This patch modifies KVM to cause a guest exit with KVM_EXIT_NMI instead of immediately delivering a 0x200 interrupt to guest upon machine check exception in guest address. Exiting the guest enables QEMU to build error log and deliver machine check exception to guest OS (either via guest OS

Re: [PATCH v7 19/19] KVM: ARM64: Add a new kvm ARM PMU device

On 2015/12/15 23:33, Marc Zyngier wrote: On 15/12/15 08:49, Shannon Zhao wrote: >From: Shannon Zhao > >Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement >the kvm_device_ops for it. > >Signed-off-by: Shannon Zhao >--- >

Re: [PATCH v7 15/19] KVM: ARM64: Add access handler for PMUSERENR register

On 2015/12/15 22:58, Marc Zyngier wrote: On 15/12/15 08:49, Shannon Zhao wrote: >From: Shannon Zhao > >The reset value of PMUSERENR_EL0 is UNKNOWN, use reset_unknown. > >PMUSERENR_EL0 holds some bits which decide whether PMU registers can be >accessed from EL0. Add

Re: [PATCH v7 19/19] KVM: ARM64: Add a new kvm ARM PMU device

On 15/12/15 15:50, Shannon Zhao wrote: > > > On 2015/12/15 23:33, Marc Zyngier wrote: >> On 15/12/15 08:49, Shannon Zhao wrote: From: Shannon Zhao Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement the kvm_device_ops for it.

Re: [PATCH kvm-unit-tests 1/6] lib/report: allow test skipping

2015-12-14 16:12-0600, Andrew Jones: > On Mon, Dec 14, 2015 at 04:00:19PM -0600, Andrew Jones wrote: >> On Mon, Dec 14, 2015 at 10:24:16PM +0100, Radim Krčmář wrote: >> > --- >> > diff --git a/lib/libcflat.h b/lib/libcflat.h >> > -void va_report_xfail(const char *msg_fmt, bool xfail, bool cond,

Re: [PATCH kvm-unit-tests 2/6] x86/*: report skipped tests

2015-12-14 16:07-0600, Andrew Jones: > On Mon, Dec 14, 2015 at 10:24:17PM +0100, Radim Krčmář wrote: >> No care to consistency or exhaustivity was given. >> >> (svm-disabled test should be redone and it's weird that x86/hyperv_synic >> is about the only one that does report_skip when

Re: [PATCH kvm-unit-tests 0/6] Improve the output of test runners

2015-12-15 11:19+0100, Paolo Bonzini: > On 14/12/2015 22:24, Radim Krčmář wrote: >> This series is a mix of patches that change the output of run_tests.sh >> and x86-run. The output of ./run_tests.sh now looks like this: > > I like the idea, thanks! I agree with Andrew about pretty much >

Re: [PATCH v7 08/19] KVM: ARM64: Add access handler for event typer register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > These kind of registers include PMEVTYPERn, PMCCFILTR and PMXEVTYPER > which is mapped to PMEVTYPERn or PMCCFILTR. > > The access handler translates all aarch32 register offsets to aarch64 > ones and uses

Re: [PATCH v7 11/19] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMINTENSET and PMINTENCLR is UNKNOWN, use > reset_unknown for its reset handler. Add a handler to emulate writing > PMINTENSET or PMINTENCLR register. > > Signed-off-by: Shannon

Re: [PATCH v7 09/19] KVM: ARM64: Add access handler for event counter register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > These kind of registers include PMEVCNTRn, PMCCNTR and PMXEVCNTR which > is mapped to PMEVCNTRn. > > The access handler translates all aarch32 register offsets to aarch64 > ones and uses vcpu_sys_reg() to

Re: [PATCH v7 10/19] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMCNTENSET and PMCNTENCLR is UNKNOWN, use > reset_unknown for its reset handler. Add a handler to emulate writing > PMCNTENSET or PMCNTENCLR register. > > When writing to

Re: [PATCH kvm-unit-tests 3/6] x86/pmu: expect failure with nmi_watchdog

2015-12-14 16:05-0600, Andrew Jones: > On Mon, Dec 14, 2015 at 10:24:18PM +0100, Radim Krčmář wrote: >> diff --git a/x86/pmu.c b/x86/pmu.c >> @@ -291,7 +292,7 @@ static void check_counters_many(void) >> if (!verify_counter([i])) >> break; >> >> -report("all

Re: [PATCH kvm-unit-tests 4/6] run_tests: generalize check

2015-12-14 16:11-0600, Andrew Jones: > On Mon, Dec 14, 2015 at 10:24:19PM +0100, Radim Krčmář wrote: > > --- >> diff --git a/run_tests.sh b/run_tests.sh >> @@ -35,17 +35,10 @@ function run() >> return >> fi >> >> -# check a file for a particular value before running a test >> -

Re: [Qemu-devel] [Patch V2 1/2] x86, mce: Basic support to add LMCE support to QEMU

On Mon, Dec 14, 2015 at 07:17:27PM -0500, Raj, Ashok wrote: > I can see how this hurts.. since the poller isn't doing cpu model > specific stuff..? The poller sees mca_cfg.ser set on an AMD guest and then the whole handling/decoding goes wrong. > in the LMCE case, even if you advertise

[Question] KVM memory usage (cache and buffers): LVM or Disk files

Hi all, At home I'm using Qemu/KVM for years now on some host with 64GB memory running around 20 VMs all using files for their disks (qcow2 or vmdk). On this host all free memory is used by "buffers", according to "free" command. Now I'm about to deploy a bunch of VMs on some physical hosts (new

Re: [PATCH kvm-unit-tests 0/6] Improve the output of test runners

2015-12-14 16:20-0600, Andrew Jones: > On Mon, Dec 14, 2015 at 10:24:15PM +0100, Radim Krčmář wrote: >> > skip vmx (0 tests, 0 unexpected failures) >> > PASS debug (7 tests, 0 unexpected failures) >> > qemu-kvm: Property '.hv-synic' not found >> > skip hyperv_synic (failed $(echo quit | $qemu

[PATCH v2 0/2] Add vector-hashing support for lowest-priority interrupts delivery

This series add vector-hashing support for lowest-priority interrupts delivery. As an example, modern Intel CPUs in server platform can use this method to handle lowest-priority interrupts. v2: - Add vector-hashing support for non-vt-d PI case - Fix some bugs Radim pointed out in v1 - Use a

[PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

Use vector-hashing to deliver lowest-priority interrupts for VT-d posted-interrupts. Signed-off-by: Feng Wu --- arch/x86/kvm/lapic.c | 67 arch/x86/kvm/lapic.h | 2 ++ arch/x86/kvm/vmx.c | 12 -- 3 files changed,

[PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts

Use vector-hashing to deliver lowest-priority interrupts, As an example, modern Intel CPUs in server platform use this method to handle lowest-priority interrupts. Signed-off-by: Feng Wu --- arch/x86/kvm/irq_comm.c | 27 ++- arch/x86/kvm/lapic.c| 57

Re: [PATCH v7 13/19] KVM: ARM64: Add access handler for PMSWINC register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > Add access handler which emulates writing and reading PMSWINC > register and add support for creating software increment event. > > Signed-off-by: Shannon Zhao > --- >

Re: [PATCH v7 08/19] KVM: ARM64: Add access handler for event typer register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > These kind of registers include PMEVTYPERn, PMCCFILTR and PMXEVTYPER > which is mapped to PMEVTYPERn or PMCCFILTR. > > The access handler translates all aarch32 register offsets to aarch64 > ones and uses

Re: [PATCH v7 12/19] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMOVSSET and PMOVSCLR is UNKNOWN, use > reset_unknown for its reset handler. Add a handler to emulate writing > PMOVSSET or PMOVSCLR register. > > When writing non-zero value to

Re: [PATCH v7 06/19] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > Add access handler which gets host value of PMCEID0 or PMCEID1 when > guest access these registers. Writing action to PMCEID0 or PMCEID1 is > ignored. > > Signed-off-by: Shannon Zhao

Re: [PATCH v7 15/19] KVM: ARM64: Add access handler for PMUSERENR register

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > The reset value of PMUSERENR_EL0 is UNKNOWN, use reset_unknown. > > PMUSERENR_EL0 holds some bits which decide whether PMU registers can be > accessed from EL0. Add some check helpers to handle the access

Re: [PATCH 04/11] KVM: page track: add the framework of guest page tracking

On 12/15/2015 04:46 PM, Xiao Guangrong wrote: On 12/15/2015 03:06 PM, Kai Huang wrote: Hi Guangrong, I am starting to review this series, and should have some comments or questions, you can determine whether they are valuable :) Thank you very much for your review and breaking the

Re: [PATCH 08/11] KVM: MMU: use page track for non-leaf shadow pages

On 12/15/2015 05:10 PM, Xiao Guangrong wrote: On 12/15/2015 03:52 PM, Kai Huang wrote: static bool __mmu_gfn_lpage_is_disallowed(gfn_t gfn, int level, @@ -2140,12 +2150,18 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, hlist_add_head(>hash_link,

Re: [PATCH v7 16/19] KVM: ARM64: Add PMU overflow interrupt routing

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > When calling perf_event_create_kernel_counter to create perf_event, > assign a overflow handler. Then when the perf event overflows, set the > corresponding bit of guest PMOVSSET register. If this counter is

Re: [PATCH v7 19/19] KVM: ARM64: Add a new kvm ARM PMU device

On 15/12/15 08:49, Shannon Zhao wrote: > From: Shannon Zhao > > Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement > the kvm_device_ops for it. > > Signed-off-by: Shannon Zhao > --- >

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