On Fri, Feb 05, 2021 at 12:12:51AM +, Daniel Kiss wrote:
>
>
> > On 4 Feb 2021, at 18:36, Dave Martin wrote:
> >
> > On Tue, Feb 02, 2021 at 07:52:54PM +0100, Daniel Kiss wrote:
> >> CPUs that support SVE are architecturally required to support the
> &g
On Tue, Feb 02, 2021 at 07:52:54PM +0100, Daniel Kiss wrote:
> CPUs that support SVE are architecturally required to support the
> Virtualization Host Extensions (VHE), so far the kernel supported
> SVE alongside KVM with VHE enabled. In same cases it is desired to
> run nVHE config even when VHE
On Fri, Jan 22, 2021 at 06:21:21PM +, Marc Zyngier wrote:
> Daniel,
>
> Please consider cc'ing the maintainer (me) as well as the KVM/arm64
> reviewers (Julien, James, Suzuki) and the kvmarm list (all now Cc'd).
>
> On 2021-01-22 01:07, Daniel Kiss wrote:
> >CPUs that support SVE are
ZFR0_EL1 accessors
>
> arch/arm64/kvm/sys_regs.c | 108 --
> arch/arm64/kvm/sys_regs.h | 16 +++---
> 2 files changed, 41 insertions(+), 83 deletions(-)
Thanks for the updates.
Looks like I missed the opportunity to revie
On Tue, Nov 03, 2020 at 02:52:44PM +0100, Andrew Jones wrote:
> On Tue, Nov 03, 2020 at 11:37:27AM +0000, Dave Martin wrote:
> > On Mon, Nov 02, 2020 at 07:50:34PM +0100, Andrew Jones wrote:
> > > 张东旭 reported a regression seen with CentOS
> > > when migrating from
On Tue, Nov 03, 2020 at 02:46:40PM +0100, Andrew Jones wrote:
> On Tue, Nov 03, 2020 at 11:32:08AM +0000, Dave Martin wrote:
> > On Mon, Nov 02, 2020 at 07:50:37PM +0100, Andrew Jones wrote:
> > > The AA64ZFR0_EL1 accessors are just the general accessors with
> > > i
On Tue, Nov 03, 2020 at 02:38:36PM +0100, Andrew Jones wrote:
> On Tue, Nov 03, 2020 at 11:23:54AM +0000, Dave Martin wrote:
> > On Mon, Nov 02, 2020 at 07:50:36PM +0100, Andrew Jones wrote:
> > > The instruction encodings of ID registers are preallocated. Until an
> >
On Tue, Nov 03, 2020 at 02:32:15PM +0100, Andrew Jones wrote:
> On Tue, Nov 03, 2020 at 11:18:19AM +0000, Dave Martin wrote:
> > On Mon, Nov 02, 2020 at 07:50:35PM +0100, Andrew Jones wrote:
> > > ID registers are RAZ until they've been allocated a purpose, but
> > > th
On Mon, Nov 02, 2020 at 07:50:34PM +0100, Andrew Jones wrote:
> 张东旭 reported a regression seen with CentOS
> when migrating from an old kernel to a new one. The problem was
> that QEMU rejected the migration since KVM_GET_REG_LIST reported
> a register was missing on the destination. Extra
On Mon, Nov 02, 2020 at 07:50:37PM +0100, Andrew Jones wrote:
> The AA64ZFR0_EL1 accessors are just the general accessors with
> its visibility function open-coded. It also skips the if-else
> chain in read_id_reg, but there's no reason not to go there.
> Indeed consolidating ID register accessors
On Mon, Nov 02, 2020 at 07:50:36PM +0100, Andrew Jones wrote:
> The instruction encodings of ID registers are preallocated. Until an
> encoding is assigned a purpose the register is RAZ. KVM's general ID
> register accessor functions already support both paths, RAZ or not.
> If for each ID
On Mon, Nov 02, 2020 at 07:50:35PM +0100, Andrew Jones wrote:
> ID registers are RAZ until they've been allocated a purpose, but
> that doesn't mean they should be removed from the KVM_GET_REG_LIST
> list. So far we only have one register, SYS_ID_AA64ZFR0_EL1, that
> is hidden from userspace when
On Mon, Oct 19, 2020 at 05:23:11PM +0200, Andrew Jones wrote:
> On Mon, Oct 19, 2020 at 03:58:40PM +0100, Dave Martin wrote:
> > On Mon, Oct 19, 2020 at 03:18:11PM +0100, Peter Maydell wrote:
> > > On Mon, 19 Oct 2020 at 14:40, Andrew Jones wrote:
> > > >
> &g
On Mon, Oct 19, 2020 at 03:18:11PM +0100, Peter Maydell wrote:
> On Mon, 19 Oct 2020 at 14:40, Andrew Jones wrote:
> >
> > On Mon, Oct 19, 2020 at 12:43:33PM +0100, Peter Maydell wrote:
> > > Well, ID regs are special in the architecture -- they always exist
> > > and must RAZ/WI, even if they're
On Mon, Oct 19, 2020 at 11:25:25AM +0200, Andrew Jones wrote:
> On Thu, Oct 15, 2020 at 03:57:02PM +0100, Peter Maydell wrote:
> > On Thu, 15 Oct 2020 at 15:41, Andrew Jones wrote:
> > > The reporter states neither the source nor destination hardware supports
> > > SVE. My guess is that what's
On Wed, Jul 22, 2020 at 05:36:34PM +0100, Marc Zyngier wrote:
> On 2020-07-22 17:24, Dave Martin wrote:
> >On Mon, Jul 13, 2020 at 10:05:01PM +0100, Andrew Scull wrote:
> >>The aim is to keep management of the flags in the host and out of hyp
> >>where possible.
On Mon, Jul 13, 2020 at 10:05:04PM +0100, Andrew Scull wrote:
vv Nit: Message body doesn't say what changed _or_ why. See comments on
patch 2.
> The task state can be checked by the host and the vcpu flags updated
> before calling into hyp. Hyp simply acts on the state provided to it by
> the
On Mon, Jul 13, 2020 at 10:05:01PM +0100, Andrew Scull wrote:
> The aim is to keep management of the flags in the host and out of hyp
> where possible. I find this makes it easier to understand how the flags
> are used as the responsibilities are clearly divided.
>
> The series applies on top of
e:
Reviewed-by: Dave Martin
> ---
> arch/arm64/include/asm/kvm_host.h | 2 --
> arch/arm64/kvm/fpsimd.c | 11 +--
> 2 files changed, 1 insertion(+), 12 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_host.h
> b/arch/arm64/include/asm/kvm_host.h
&
mapping in host-specific stuff (the thread flags).
So maybe this change isn't that useful?
I don't have a strong opinion though. If this change fits in better
with the broader KVM work you're doing, I don't see a problem with it.
So, FWIW:
Reviewed-by: Dave Martin
> ---
> arch/arm6
On Mon, Jul 13, 2020 at 10:05:03PM +0100, Andrew Scull wrote:
> If the system doesn't support FPSIMD features then the flags must never
Mustn't they? Why not? I think the flags are currently ignored in this
case, which is just as good.
I'm not disagreeing with the change here; I just want to
On Mon, Jul 13, 2020 at 09:42:04PM +0100, Andrew Scull wrote:
> On Mon, Jul 13, 2020 at 05:04:21PM +0100, Dave Martin wrote:
> > On Fri, Jul 10, 2020 at 10:57:54AM +0100, Andrew Scull wrote:
> > > The task state can be checked by the host and the vcpu flags updated
> > &
On Fri, Jul 10, 2020 at 10:57:54AM +0100, Andrew Scull wrote:
> The task state can be checked by the host and the vcpu flags updated
> before calling into hyp. This more neatly separates the concerns and
> removes the need to map the task flags to EL2.
>
> Hyp acts on the state provided to it by
On Tue, Jul 07, 2020 at 03:57:13PM +0100, Andrew Scull wrote:
> The FPSIMD registers can be in one of three states:
> (a) loaded with the user task's state
> (b) loaded with the vcpu's state
> (c) dirty with transient state
>
> KVM_ARM64_FP_HOST identifies the case (a). When loading the vcpu
On Tue, Jul 07, 2020 at 10:33:50PM +0100, Andrew Scull wrote:
> On Tue, Jul 07, 2020 at 05:59:58PM +0100, Dave Martin wrote:
> > On Tue, Jul 07, 2020 at 03:57:13PM +0100, Andrew Scull wrote:
> > > The FPSIMD registers can be in one of three states:
> > > (a) loaded
On Tue, Jul 07, 2020 at 03:57:13PM +0100, Andrew Scull wrote:
> The FPSIMD registers can be in one of three states:
> (a) loaded with the user task's state
> (b) loaded with the vcpu's state
> (c) dirty with transient state
>
> KVM_ARM64_FP_HOST identifies the case (a). When loading the vcpu
On Wed, Jun 24, 2020 at 10:38:48AM +0100, Catalin Marinas wrote:
> On Tue, Jun 23, 2020 at 07:05:07PM +0100, Peter Maydell wrote:
> > On Wed, 17 Jun 2020 at 13:39, Steven Price wrote:
> > > These patches add support to KVM to enable MTE within a guest. It is
> > > based on Catalin's v4 MTE user
On Mon, Jun 15, 2020 at 02:22:19PM +0100, Marc Zyngier wrote:
> Hi Dave,
>
> On 2020-06-15 13:59, Dave Martin wrote:
> >On Mon, Jun 15, 2020 at 09:19:50AM +0100, Marc Zyngier wrote:
> >>Not having PtrAuth on non-VHE KVM (for whatever reason VHE is not
> >>ena
On Mon, Jun 15, 2020 at 09:19:50AM +0100, Marc Zyngier wrote:
> Not having PtrAuth on non-VHE KVM (for whatever reason VHE is not
> enabled on a v8.3 system) has always looked like an oddity. This
> trivial series remedies it, and allows a non-VHE KVM to offer PtrAuth
> to its guests.
How likely
On Mon, Jul 15, 2019 at 03:44:46PM +0100, Mark Rutland wrote:
> On Mon, Jul 15, 2019 at 03:26:39PM +0100, James Morse wrote:
> > On 15/07/2019 14:48, Mark Rutland wrote:
> > > On Mon, Jul 15, 2019 at 02:41:00PM +0100, Dave Martin wrote:
> > >> One option (suggest
On Mon, Jul 15, 2019 at 02:48:49PM +0100, Mark Rutland wrote:
> On Mon, Jul 15, 2019 at 02:41:00PM +0100, Dave Martin wrote:
[...]
> > So long as KVM_EXIT_HYPERCALL reports sufficient information so that
> > userspace can identify the cause as an SMC and retrieve the SMC
>
On Sat, Jul 13, 2019 at 05:53:57PM +0800, Guoheyi wrote:
> Hi folks,
>
> Do it make sense to implement virtual SDEI in qemu? So that we can have the
> standard way for guest to handle NMI watchdog, RAS events and something else
> which involves SDEI in a physical ARM64 machine.
>
> My basic idea
On Thu, Jul 04, 2019 at 02:24:42PM +0200, Paolo Bonzini wrote:
> On 04/07/19 10:20, Marc Zyngier wrote:
> > +KVM, Paolo and Radim,
> >
> > Guys, do you mind picking this single patch and sending it to Linus?
> > That's the only fix left for 5.2. Alternatively, I can send you a pull
> > request,
On Thu, Jul 04, 2019 at 10:04:08AM +, Zhang, Lei wrote:
> Hi guys,
>
> I have started up KVM guest os successfully with SVE feature with Dave' patch.
>
> Tested-by: Zhang Lei
Thanks for verifying.
It's really your fix, I only wrote a commit message for it :)
[...]
Cheers
---Dave
On Wed, Jul 03, 2019 at 10:21:57AM +0100, Marc Zyngier wrote:
> On 24/06/2019 13:48, Dave Martin wrote:
> > On Fri, Jun 21, 2019 at 02:50:08PM +0100, Marc Zyngier wrote:
> >> On 21/06/2019 14:24, Julien Thierry wrote:
> >>>
> >>>
> >>>
On Thu, Jul 04, 2019 at 08:32:52AM +0530, Viresh Kumar wrote:
> On 03-07-19, 18:42, Dave Martin wrote:
> > From: Zhang Lei
> >
> > The original implementation of vq_present() relied on aggressive
> > inlining in order for the compiler to know that the code is
>
On Wed, Jul 03, 2019 at 12:04:11PM +, Zhang, Lei wrote:
> Hi guys,
>
> I can't start up KVM guest os with SVE feature with your patch.
> The error message is
> qemu-system-aarch64: kvm_init_vcpu failed: Invalid argument.
>
> My test enviroment.
> kernel linux-5.2-rc6
> qemu [Qemu-devel]
valid SVE vector length configurations as
invalid, and vice versa.
Fix it by forcing the returned value to a bool.
Signed-off-by: Zhang Lei
Fixes: 0c529ff789bc ("KVM: arm64: Implement vq_present() as a macro")
Signed-off-by: Dave Martin [commit message rewrite]
Cc: Viresh Kumar
--
On Wed, Jul 03, 2019 at 01:20:55PM +0100, Marc Zyngier wrote:
> On 24/06/2019 13:54, Dave Martin wrote:
> > On Fri, Jun 21, 2019 at 10:37:51AM +0100, Marc Zyngier wrote:
> >> From: Jintack Lim
> >>
> >> ARM v8.3 introduces a new bit in the HCR_EL2, which is t
On Wed, Jul 03, 2019 at 12:53:58PM +0100, Marc Zyngier wrote:
> On 24/06/2019 12:28, Dave Martin wrote:
> > On Fri, Jun 21, 2019 at 10:37:48AM +0100, Marc Zyngier wrote:
> >> From: Christoffer Dall
> >>
> >> Introduce the feature bit and a primitive that chec
On Wed, Jul 03, 2019 at 12:56:51PM +0100, Marc Zyngier wrote:
> On 24/06/2019 12:43, Dave Martin wrote:
> > On Fri, Jun 21, 2019 at 10:37:48AM +0100, Marc Zyngier wrote:
> >> From: Christoffer Dall
> >>
> >> Introduce the feature bit and a primitive that chec
On Wed, Jul 03, 2019 at 10:30:03AM +0100, Marc Zyngier wrote:
> On 24/06/2019 12:19, Dave Martin wrote:
> > On Fri, Jun 21, 2019 at 10:37:46AM +0100, Marc Zyngier wrote:
> >> Having __load_guest_stage2 in kvm_hyp.h is quickly going to trigger
> >> a circular include
On Wed, Jul 03, 2019 at 10:35:37AM +0100, Will Deacon wrote:
> On Fri, Jun 07, 2019 at 12:26:21PM +0100, Dave Martin wrote:
> > This series, based on kvmtool master [1], implements basic support for
> > pointer authentication and SVE for guests. This superseded the
> >
On Fri, Jun 21, 2019 at 10:37:53AM +0100, Marc Zyngier wrote:
> From: Christoffer Dall
>
> When running a nested hypervisor we commonly have to figure out if
> the VCPU mode is running in the context of a guest hypervisor or guest
> guest, or just a normal guest.
>
> Add convenient primitives
On Fri, Jun 21, 2019 at 10:37:52AM +0100, Marc Zyngier wrote:
> The VMPIDR_EL2 and VPIDR_EL2 are architecturally UNKNOWN at reset, but
> let's be nice to a guest hypervisor behaving foolishly and reset these
> to something reasonable anyway.
Why be nice? Generally we do try to initialise UNKNOWN
On Fri, Jun 21, 2019 at 10:37:51AM +0100, Marc Zyngier wrote:
> From: Jintack Lim
>
> ARM v8.3 introduces a new bit in the HCR_EL2, which is the NV bit. When
> this bit is set, accessing EL2 registers in EL1 traps to EL2. In
> addition, executing the following instructions in EL1 will trap to
On Fri, Jun 21, 2019 at 02:50:08PM +0100, Marc Zyngier wrote:
> On 21/06/2019 14:24, Julien Thierry wrote:
> >
> >
> > On 21/06/2019 10:37, Marc Zyngier wrote:
> >> From: Christoffer Dall
> >>
> >> We were not allowing userspace to set a more privileged mode for the VCPU
> >> than EL1, but we
On Fri, Jun 21, 2019 at 10:37:49AM +0100, Marc Zyngier wrote:
> From: Christoffer Dall
>
> Reset the VCPU with PSTATE.M = EL2h when the nested virtualization
> feature is enabled on the VCPU.
>
> Signed-off-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/kvm/reset.c | 7
On Fri, Jun 21, 2019 at 10:37:48AM +0100, Marc Zyngier wrote:
> From: Christoffer Dall
>
> Introduce the feature bit and a primitive that checks if the feature is
> set behind a static key check based on the cpus_have_const_cap check.
>
> Checking nested_virt_in_use() on systems without nested
On Fri, Jun 21, 2019 at 10:37:47AM +0100, Marc Zyngier wrote:
> From: Jintack Lim
>
> Add a new ARM64_HAS_NESTED_VIRT feature to indicate that the
> CPU has the ARMv8.3 nested virtualization capability.
>
> This will be used to support nested virtualization in KVM.
>
> Signed-off-by: Jintack
On Fri, Jun 21, 2019 at 10:37:45AM +0100, Marc Zyngier wrote:
> From: Dave Martin
>
> Currently, the {read,write}_sysreg_el*() accessors for accessing
> particular ELs' sysregs in the presence of VHE rely on some local
> hacks and define their system register enc
.
Cc: sta...@vger.kernel.org
Fixes: d26c25a9d19b ("arm64: KVM: Tighten guest core register access from
userspace")
Signed-off-by: Dave Martin
Reviewed-by: Andrew Jones
Tested-by: Andrew Jones
---
This is just a repost of [1], with Andrew Jones' reviewer tags added.
[1] [PATCH] KVM: arm64: Fil
On Mon, Jun 10, 2019 at 03:20:30PM +0530, Viresh Kumar wrote:
> On 10-06-19, 10:09, Dave Martin wrote:
> > You could drop the extra level of indirection on vqs now. The only
> > thing it achieves is to enforce the size of the array via type-
> > checkout, but the
On Mon, Jun 10, 2019 at 11:36:33AM +0530, Viresh Kumar wrote:
> This routine is a one-liner and doesn't really need to be function and
> should be rather implemented as a macro.
>
> Suggested-by: Dave Martin
> Signed-off-by: Viresh Kumar
> ---
> V1->V2:
> -
On Fri, Jun 07, 2019 at 11:30:37AM +0530, Viresh Kumar wrote:
> On 04-06-19, 10:59, Dave Martin wrote:
> > On Tue, Jun 04, 2019 at 10:13:19AM +0530, Viresh Kumar wrote:
> > > We currently get following compilation warning:
> > >
> > > arch/arm64/kvm/guest.c: I
future maintainers.
Signed-off-by: Dave Martin
Reviewed-by: Andre Przywara
---
util/update_headers.sh | 2 ++
1 file changed, 2 insertions(+)
diff --git a/util/update_headers.sh b/util/update_headers.sh
index 4ba1b9f..a7e21b8 100755
--- a/util/update_headers.sh
+++ b/util/update_headers.sh
update_headers.sh can break if the current working directory has a
funny name or if something odd is passed for LINUX_ROOT.
In the interest of cleanliness, quote where appropriate.
Signed-off-by: Dave Martin
Reviewed-by: Andre Przywara
---
util/update_headers.sh | 10 +-
1 file
The SVE KVM support for arm64 includes the additional backend
header from .
So update this header if it is available.
To avoid creating a sudden dependency on a specific minimum kernel
version, ignore such optional headers if the source kernel tree
doesn't have them.
Signed-off-by: Dave Martin
Pull in upstream UAPI headers, for subsequent arm64 SVE / ptrauth
support (among other things).
Signed-off-by: Dave Martin
Reviewed-by: Andre Przywara
---
arm/aarch64/include/asm/kvm.h | 43
arm/aarch64/include/asm/sve_context.h | 53
Will says that the command-line arguments for controlling optional
vcpu features are superfluous: we don't attempt to support
migration, and this isn't QEMU.
So, remove the command-line arguments and just default pointer auth
to on if supported.
Signed-off-by: Dave Martin
---
Changes since v3
.
Command line options --enable-ptrauth and --disable-ptrauth are added
to use this feature. However, if those options are not provided then
also this feature is enabled if host supports this capability.
Signed-off-by: Amit Daniel Kachhap
Signed-off-by: Dave Martin [merge new kernel heaers]
---
arm
-by: Dave Martin
---
Changes since v3:
* Drop command-line options and simply default SVE to on where
supported.
---
arm/aarch32/include/kvm/kvm-cpu-arch.h | 4
arm/aarch64/include/kvm/kvm-cpu-arch.h | 1 +
arm/aarch64/kvm-cpu.c | 18 ++
arm/kvm-cpu.c
feature setup code compile on arm, it is no longer needed: inline
and remove it.
Signed-off-by: Dave Martin
---
arm/aarch32/include/kvm/kvm-cpu-arch.h | 3 ++-
arm/aarch64/include/kvm/kvm-cpu-arch.h | 3 +--
arm/aarch64/kvm-cpu.c | 10 ++
arm/kvm-cpu.c
KVM: arm/arm64: Add a vcpu feature for pointer authentication
Dave Martin (7):
update_headers.sh: Add missing shell quoting
update_headers.sh: Cleanly report failure on error
update_headers.sh: arm64: Copy sve_context.h if available
update_headers: Sync kvm UAPI headers with linux v5.2-rc1
On Thu, Jun 06, 2019 at 01:06:33PM +0100, Marc Zyngier wrote:
> On 06/06/2019 11:58, Dave Martin wrote:
> > kvm_vgic_set_owner() leaks a reference on the vgic_irq descriptor,
> > which does not seem to match up with any vgic_put_irq() that I can
> > find.
> >
t;, pid 13799, jiffies 4299827317 (age 1569.844s)
[...]
backtrace:
[<a08b80e2>] kmem_cache_alloc+0x178/0x208
[<dcad2bd3>] kvm_vm_ioctl+0x350/0xbc0
Fix it.
Cc: Andre Przywara
Fixes: 1085fdc68c60 ("KVM: arm64: vgic-its: Introduce new KVM ITS devic
cwriter+0x78/0x98
[<8659acd2>] dispatch_mmio_write+0xd4/0x120
[...]
Cc: Christoffer Dall
Fixes: c6ccd30e0de3 ("KVM: arm/arm64: Introduce an allocator for in-kernel irq
lines")
Signed-off-by: Dave Martin
---
Based on the limited testing I've done so far, the patch _appears_
I may have overlooked
something.
Tested with qemu on ThunderX2.
Dave Martin (2):
KVM: arm/arm64: vgic: Fix kvm_device leak in vgic_its_destroy
KVM: arm/arm64: vgic: Fix irq refcount leak in kvm_vgic_set_owner()
virt/kvm/arm/vgic/vgic-its.c | 1 +
virt/kvm/arm/vgic/vgic.c | 1 +
2 files
On Tue, Jun 04, 2019 at 10:13:19AM +0530, Viresh Kumar wrote:
> We currently get following compilation warning:
>
> arch/arm64/kvm/guest.c: In function 'set_sve_vls':
> arch/arm64/kvm/guest.c:262:18: warning: passing argument 1 of 'vq_present'
> from incompatible pointer type
>
On Tue, Jun 04, 2019 at 03:01:53PM +0530, Viresh Kumar wrote:
> On 04-06-19, 10:26, Dave Martin wrote:
> > I'm in two minds about whether this is worth fixing, but if you want to
> > post a patch to remove the extra const (or convert vq_present() to a
> > mac
On Tue, Jun 04, 2019 at 11:23:01AM +0200, Andrew Jones wrote:
> On Mon, Jun 03, 2019 at 05:52:07PM +0100, Dave Martin wrote:
> > Since commit d26c25a9d19b ("arm64: KVM: Tighten guest core register
> > access from userspace"), KVM_{GET,SET}_ONE_REG rejects register IDs
&
On Tue, Jun 04, 2019 at 02:25:45PM +0530, Viresh Kumar wrote:
> On 04-06-19, 09:43, Catalin Marinas wrote:
> > On Tue, Jun 04, 2019 at 10:13:19AM +0530, Viresh Kumar wrote:
> > > We currently get following compilation warning:
> > >
> > > arch/arm64/kvm/guest.c: In function 'set_sve_vls':
> > >
.
Cc: sta...@vger.kernel.org
Fixes: d26c25a9d19b ("arm64: KVM: Tighten guest core register access from
userspace")
Signed-off-by: Dave Martin
---
Changes since v3:
* Rebased onto v5.2-rc1.
* Tested with qemu by migrating from one qemu instance to another on
ThunderX2.
---
arch/ar
On Mon, Jun 03, 2019 at 03:03:48PM +0100, Andre Przywara wrote:
> On Mon, 3 Jun 2019 12:23:03 +0100
> Dave Martin wrote:
>
> Hi Dave,
>
> > On Fri, May 31, 2019 at 06:04:16PM +0100, Andre Przywara wrote:
> > > On Thu, 30 May 2019 16:13:10 +0100
> > > Da
On Mon, Jun 03, 2019 at 03:07:06PM +0100, Will Deacon wrote:
> On Mon, Jun 03, 2019 at 12:23:03PM +0100, Dave Martin wrote:
> > On Fri, May 31, 2019 at 06:04:16PM +0100, Andre Przywara wrote:
> > > On Thu, 30 May 2019 16:13:10 +0100
> > > Dave Martin wrote:
>
@Peter, do you have an opinion on this (below) ?
On Thu, May 30, 2019 at 04:13:10PM +0100, Dave Martin wrote:
> From: Amit Daniel Kachhap
>
> This patch adds a runtime capabality for KVM tool to enable Arm64 8.3
> Pointer Authentication in guest kernel. Two vcpu features
> KVM_AR
On Fri, May 31, 2019 at 06:04:16PM +0100, Andre Przywara wrote:
> On Thu, 30 May 2019 16:13:10 +0100
> Dave Martin wrote:
>
> > From: Amit Daniel Kachhap
> >
> > This patch adds a runtime capabality for KVM tool to enable Arm64 8.3
> > Pointer Authentication i
On Fri, May 31, 2019 at 06:13:31PM +0100, Andre Przywara wrote:
> On Thu, 30 May 2019 16:13:13 +0100
> Dave Martin wrote:
>
> > This patch adds --enable-sve/--disable-sve command line options to
> > allow the user to control whether the Scalable Vector Extension
On Fri, May 31, 2019 at 06:05:01PM +0100, Andre Przywara wrote:
> On Thu, 30 May 2019 16:13:12 +0100
> Dave Martin wrote:
>
> > To help the user understand what is going on, amend ptrauth
> > configuration diagnostic messages to refer to command line options
>
On Fri, May 31, 2019 at 06:03:19PM +0100, Andre Przywara wrote:
> On Thu, 30 May 2019 16:13:09 +0100
> Dave Martin wrote:
>
> > Subject: [PATCH kvmtool v3 4/9] update_headers: Sync kvm UAPI headers with
> > linux v5.1-rc1
>
> This is actually v5.2-rc1, isn't it?
Do
On Fri, May 31, 2019 at 06:04:36PM +0100, Andre Przywara wrote:
> On Thu, 30 May 2019 16:13:11 +0100
> Dave Martin wrote:
>
> > In the interest of readability, factor out the vcpu feature setup
> > for ptrauth into a separate function.
> >
> > Also, because
On Fri, May 31, 2019 at 06:03:40PM +0100, Andre Przywara wrote:
> On Thu, 30 May 2019 16:13:08 +0100
> Dave Martin wrote:
>
> > The SVE KVM support for arm64 includes the additional backend
> > header from .
> >
> > So update this header if it is available.
&g
On Fri, May 31, 2019 at 06:03:10PM +0100, Andre Przywara wrote:
> On Thu, 30 May 2019 16:13:07 +0100
> Dave Martin wrote:
>
> > If in intermediate step fails, update_headers.sh blindly continues
> > and may return success status.
> >
> > To avoid errors going u
On Fri, May 31, 2019 at 06:02:53PM +0100, Andre Przywara wrote:
> On Thu, 30 May 2019 16:13:06 +0100
> Dave Martin wrote:
>
> > update_headers.sh can break if the current working directory has a
> > funny name or if something odd is passed for LINUX_ROOT.
>
> Do you a
() is
added to provide an appropriate place to do this work.
By default, SVE is enabled for the guest if the host supports it.
Signed-off-by: Dave Martin
---
arm/aarch32/include/kvm/kvm-cpu-arch.h| 4 +++
arm/aarch64/include/kvm/kvm-config-arch.h | 6 -
arm/aarch64/include/kvm/kvm-cpu-arch.h
feature setup code compile on arm, it is no longer needed: inline
and remove it.
Signed-off-by: Dave Martin
---
arm/aarch32/include/kvm/kvm-cpu-arch.h | 3 ++-
arm/aarch64/include/kvm/kvm-cpu-arch.h | 3 +--
arm/aarch64/kvm-cpu.c | 22 ++
arm/kvm-cpu.c
support are given
to the guest, as before.
Signed-off-by: Dave Martin
---
arm/aarch64/include/kvm/kvm-config-arch.h | 8 +++-
arm/aarch64/kvm-cpu.c | 80 ++-
arm/include/arm-common/kvm-config-arch.h | 1 +
3 files changed, 87 insertions(+), 2
Signed-off-by: Dave Martin
---
arm/aarch64/include/kvm/kvm-config-arch.h | 4 ++--
arm/aarch64/kvm-cpu.c | 15 +++
arm/kvm-cpu.c | 8 ++--
3 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/arm/aarch64/include/kvm/kvm-config
-off-by: Amit Daniel Kachhap
Signed-off-by: Dave Martin [merge new kernel heaers]
---
arm/aarch32/include/kvm/kvm-cpu-arch.h| 2 ++
arm/aarch64/include/kvm/kvm-config-arch.h | 6 +-
arm/aarch64/include/kvm/kvm-cpu-arch.h| 3 +++
arm/include/arm-common/kvm-config-arch.h | 2 ++
arm
The SVE KVM support for arm64 includes the additional backend
header from .
So update this header if it is available.
To avoid creating a sudden dependency on a specific minimum kernel
version, ignore the header if the source kernel tree doesn't have
it.
Signed-off-by: Dave Martin
---
util
Pull in upstream UAPI headers, for subsequent arm64 SVE / ptrauth
support (among other things).
Signed-off-by: Dave Martin
---
arm/aarch64/include/asm/kvm.h | 43
arm/aarch64/include/asm/sve_context.h | 53 +++
include/linux
future maintainers.
Signed-off-by: Dave Martin
---
util/update_headers.sh | 2 ++
1 file changed, 2 insertions(+)
diff --git a/util/update_headers.sh b/util/update_headers.sh
index 4ba1b9f..a7e21b8 100755
--- a/util/update_headers.sh
+++ b/util/update_headers.sh
@@ -7,6 +7,8 @@
# using the lib
update_headers.sh can break if the current working directory has a
funny name or if something odd is passed for LINUX_ROOT.
In the interest of cleanliness, quote where appropriate.
Signed-off-by: Dave Martin
---
util/update_headers.sh | 10 +-
1 file changed, 5 insertions(+), 5
pu feature for pointer authentication
Dave Martin (8):
update_headers.sh: Add missing shell quoting
update_headers.sh: Cleanly report failure on error
update_headers.sh: arm64: Copy sve_context.h if available
update_headers: Sync kvm UAPI headers with linux v5.1-rc1
arm/arm64: Factor out pt
On Tue, May 28, 2019 at 06:18:16PM +0530, Amit Daniel Kachhap wrote:
> Hi Dave,
[...]
> >Were you planning to repost this?
> >
> >Alternatively, I can fix up the diagnostic messages discussed here and
> >post it together with the SVE support. I'll do that locally for now,
> >but let me know
(0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> > +(0xfUL << ID_AA64ISAR1_API_SHIFT) |
> > +(0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> > +(0xfUL << ID_AA64ISAR1_GPI_SHIFT));
> > }
> >
On Thu, Apr 25, 2019 at 04:04:36PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > On Thu, Apr 25, 2019 at 01:30:29PM +0100, Alex Bennée wrote:
> >>
> >> Dave Martin writes:
> >>
> >> > Currently, the way error codes are generated
On Wed, Apr 24, 2019 at 03:51:32PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > On Thu, Apr 04, 2019 at 10:35:02AM +0200, Andrew Jones wrote:
> >> On Thu, Apr 04, 2019 at 09:10:08AM +0100, Dave Martin wrote:
> >> > On Wed, Apr 03, 2019 at
On Wed, Apr 24, 2019 at 04:21:22PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > This patch adds the necessary support for context switching ZCR_EL1
> > for each vcpu.
> >
> > ZCR_EL1 is trapped alongside the FPSIMD/SVE registers, so it makes
>
On Thu, Apr 25, 2019 at 01:35:56PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > This series contains some cleanups applicable to the SVE KVM support
> > patches merged into kvmarm/next. These arose from Andrew Jones'
> > review.
> >
> > Apart
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