not enumerate any 2048-bit register unless
userspace explicitly opts in to the relevant architecture-specific
features.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
include/uapi/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux
are now responsible for
clearing bits they know about from type, so that if any remain
after all such functions are called, we know they are invalid.
No functional change.
Signed-off-by: Dave Martin
---
Changes since RFC v2:
* New patch.
**Discussion required**
This change facilitates
for the vcpu.
Signed-off-by: Dave Martin
---
Changes since RFC v2:
* Add KVM_SVE_{Z,P}REG_SIZE, KVM_SVE_SLICES(vcpu) macros to abstract
out awkward expressions for the size of SVE registers and number
of register slices.
The underlying expressions are rather awkward and best not spelled
kvm_host.h uses DECLARE_BITMAP() to declare the features member of
struct vcpu_arch, but the corresponding #include for this is
missing.
This patch adds a suitable #include for . Although
the header builds without it today, this should help to avoid
future surprises.
Signed-off-by: Dave Martin
Since SVE will be enabled or disabled on a per-vcpu basis, a flag
is needed in order to track which vcpus have it enabled.
This patch adds a suitable flag and a helper for checking it.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/include/asm/kvm_host.h | 4
1 file
-SVE-capable hardware (as was
done unconditionally prior to this patch).
No SVE handling is added on non-VHE-only paths, since VHE is an
architectural and Kconfig prerequisite of SVE.
Signed-off-by: Dave Martin
---
Changes since RFC v2:
* Remove pointless return value from __hyp_switch_fpsimd
these
functions.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/include/asm/fpsimd.h | 29 +
arch/arm64/kernel/fpsimd.c | 35 ---
2 files changed, 37 insertions(+), 27 deletions(-)
diff --git a/arch/arm64/include
This patch adds sections to the KVM API documentation describing
the extensions for supporting the Scalable Vector Extension (SVE)
in guests.
Signed-off-by: Dave Martin
---
Changes since RFC v2:
* Fix documentation regarding which SVE Zn register bits must be
accessed in order to get
Since the the sizes of members the core arm64 registers vary, the
list of register encodings that make sense is not a simple linear
sequence.
To clarify which encodings to use, this patch adds a brief list
to the documentation.
Signed-off-by: Dave Martin
---
Documentation/virtual/kvm/api.txt
for abstracting other parts of the code
to handle conditionally-present sysregs, if required.
Signed-off-by: Dave Martin
---
arch/arm64/kvm/sys_regs.c | 10 +++---
arch/arm64/kvm/sys_regs.h | 4
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm
or
migrating a VM).
Signed-off-by: Dave Martin
---
Changes since RFC v2:
* Removed the arch vcpu ioctl hook in favour or
kvm_arm_vcpu_sve_config() (with a suitable dummy version for
arch/arm. The ioctl is not relevant for arm, so a dummy struct
kvm_sve_vls definition is added
at all for KVM_GET_REG_LIST
in this case. For consistency we also reject ioctl access to the
register. This ensures that a non-SVE-enabled guest looks the same
to userspace, irrespective of whether the kernel KVM implementation
supports SVE.
Signed-off-by: Dave Martin
---
Changes since RFC v2
for example.
This patch propagates vcpu into read_id_reg() so that future
patches can add run-time checks on the guest configuration here.
For now, there is no functional change.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/kvm/sys_regs.c | 23 +--
1
-in feature for userspace, this will not affect
existing users.
Signed-off-by: Dave Martin
---
Changes since RFC v2:
* New patch
The initial code was split from "KVM: arm64/sve: Add SVE support to
register access ioctl interface". However, some additional
refactoring makes this ch
the term one per line, for
maximum readability.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/kvm/guest.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index 1d547db..0bf0ed3 100644
--- a/arch/arm64
__fpsimd_enabled() no longer exists, but a dangling declaration has
survived in kvm_hyp.h.
This patch gets rid of it.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/include/asm/kvm_hyp.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/include/asm/kvm_hyp.h b
cases are reordered appropriately in order
to make the code more consistent, although there should be no
functional difference since these cases are protected by
local_bh_disable() anyway.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/kernel/fpsimd.c | 25
ail/kvmarm/2018-December/033710.html
Dave Martin (24):
arm64: fpsimd: Always set TIF_FOREIGN_FPSTATE on task state flush
KVM: arm64: Delete orphaned declaration for __fpsimd_enabled()
KVM: arm64: Refactor kvm_arm_num_regs() for easier maintenance
KVM: arm64: Add missing #include of to
any cost off the hyp switch critical
path, to vcpu_load/put().
Cc: Marc Zyngier
Cc: Christoffer Dall
Cc: Alexander Graf
Signed-off-by: Dave Martin
---
**Build-tested only**
This is a repost of an otherwise unmodified patch discussed previously
[1]. It turned out that I had confused myself
copy_core_reg_indices(),
consistently with the way other classes of registers are handled.
No functional change.
Signed-off-by: Dave Martin
---
arch/arm64/kvm/guest.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
erformance-
critical for userspace.
Fixes: d26c25a9d19b ("arm64: KVM: Tighten guest core register access from
userspace")
Signed-off-by: Dave Martin
---
arch/arm64/kvm/guest.c | 49 ++---
1 file changed, 42 insertions(+), 7 deletions(-)
dif
.
Subsequent patches will make use of these changes.
No functional change.
Signed-off-by: Dave Martin
---
arch/arm64/kvm/guest.c | 35 ++-
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index dd436a5
of the fix.
An equivalent fix should go to stable, but we may want something more
self-contained for that case.
Comments welcome.
This series has not been tested yet.
Dave Martin (3):
KVM: arm64: Factor out core register size determination and validation
KVM: arm64: Factor out KVM_GET_REG
On Thu, Nov 22, 2018 at 03:23:13PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > This patch adds the necessary API extensions to allow userspace to
> > detect SVE support for guests and enable it.
> >
> > A new capability KVM_CAP_ARM_SVE is defined
On Thu, Nov 22, 2018 at 03:31:51PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > This patch adds sections to the KVM API documentation describing
> > the extensions for supporting the Scalable Vector Extension (SVE)
> > in guests.
> &g
On Thu, Nov 22, 2018 at 03:34:16PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > This series implements basic support for allowing KVM guests to use the
> > Arm Scalable Vector Extension (SVE).
> >
> > The patches are based on v4.19-rc5.
>
> > [Adding Peter and Alex for their view on the QEMU side]
> > > >
> > > > On Thu, Nov 15, 2018 at 05:27:11PM +, Dave Martin wrote:
> > > >> On Fri, Nov 02, 2018 at 09:16:25AM +0100, Christoffer Dall wrote:
> > > >> > On Fri, Sep 28, 2
On Wed, Nov 21, 2018 at 03:20:15PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > This patch adds the following registers for access via the
> > KVM_{GET,SET}_ONE_REG interface:
> >
> > * KVM_REG_ARM64_SVE_ZREG(n, i) (n = 0..31) (in 2048-bit slices)
&
On Wed, Nov 21, 2018 at 04:49:59PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > On Wed, Nov 21, 2018 at 04:09:03PM +, Alex Bennée wrote:
> >>
> >> Dave Martin writes:
[...]
> >> > diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm
On Wed, Nov 21, 2018 at 04:16:42PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > KVM will need to interrogate the set of SVE vector lengths
> > available on the system.
> >
> > This patch exposes the relevant bits to the kernel, along with a
>
On Wed, Nov 21, 2018 at 04:09:03PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > This patch includes the SVE register IDs in the list returned by
> > KVM_GET_REG_LIST, as appropriate.
> >
> > On a non-SVE-enabled vcpu, no extra IDs are adde
On Tue, Nov 20, 2018 at 03:30:29PM +, Alex Bennée wrote:
>
> Dave Martin writes:
[...]
> >> Put calculating guest_has_sve at the top of __hyp_switch_fpsimd make
> >> most of that go away and just moves things around a little bit. So I
> >> guess it could m
On Tue, Nov 20, 2018 at 11:58:52AM +0100, Christoffer Dall wrote:
> On Thu, Nov 15, 2018 at 06:04:22PM +0000, Dave Martin wrote:
> > On Fri, Nov 02, 2018 at 09:32:27AM +0100, Christoffer Dall wrote:
> > > On Fri, Sep 28, 2018 at 02:39:24PM +0100, Dave Martin wrote:
> > >
On Tue, Nov 20, 2018 at 12:25:12PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > On Mon, Nov 19, 2018 at 04:36:01PM +, Alex Bennée wrote:
> >>
> >> Dave Martin writes:
> >>
> >> > In order to give each vcpu its own view of the
On Mon, Nov 19, 2018 at 04:48:36PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > The Arm SVE architecture defines registers that are up to 2048 bits
> > in size (with some possibility of further future expansion).
> >
> > In order to avoid the nee
On Mon, Nov 19, 2018 at 04:36:01PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > In order to give each vcpu its own view of the SVE registers, this
> > patch adds context storage via a new sve_state pointer in struct
> > vcpu_arch. An additional memb
On Fri, Nov 02, 2018 at 09:32:27AM +0100, Christoffer Dall wrote:
> On Fri, Sep 28, 2018 at 02:39:24PM +0100, Dave Martin wrote:
> > To enable arm64-specific vm ioctls to be added cleanly, this patch
> > adds a kvm_arm_arch_vm_ioctl() hook so that these don't pollute the
> > c
On Thu, Nov 15, 2018 at 04:37:59PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > This patch adds the necessary support for context switching ZCR_EL1
> > for each vcpu.
> >
> > ZCR_EL1 is trapped alongside the FPSIMD/SVE registers, so it makes
>
On Fri, Nov 02, 2018 at 09:16:25AM +0100, Christoffer Dall wrote:
> On Fri, Sep 28, 2018 at 02:39:15PM +0100, Dave Martin wrote:
> > KVM_GET_REG_LIST should only enumerate registers that are actually
> > accessible, so it is necessary to filter out any register that is
> > not
On Fri, Nov 02, 2018 at 09:11:19AM +0100, Christoffer Dall wrote:
> On Fri, Sep 28, 2018 at 02:39:14PM +0100, Dave Martin wrote:
> > The reset_unknown() system register helper initialises a guest
> > register to a distinctive junk value on vcpu reset, to help expose
> >
On Thu, Nov 15, 2018 at 03:39:01PM +, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > Due to the way the effective SVE vector length is controlled and
> > trapped at different exception levels, certain mismatches in the
> > sets of vector lengths supported
On Fri, Nov 02, 2018 at 09:05:36AM +0100, Christoffer Dall wrote:
> On Fri, Sep 28, 2018 at 02:39:09PM +0100, Dave Martin wrote:
> > In preparation for adding support for SVE in guests on arm64, a
> > hook is needed for freeing additional per-vcpu memory when a vcpu
> &g
On Mon, Nov 05, 2018 at 02:36:14PM +, Marc Zyngier wrote:
> Some implementations may be forced to use VHE to work around HW
> errata, for example. Let's introduce a helper that checks for
> these cases.
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm/include/asm/kvm_host.h | 1 +
>
On Tue, Nov 06, 2018 at 08:52:51AM +0100, Christoffer Dall wrote:
> On Mon, Nov 05, 2018 at 02:36:13PM +, Marc Zyngier wrote:
> > An SVE system is so far the only case where we mandate VHE. As we're
> > starting to grow this requirements, let's slightly rework the way we
> > deal with that
Since the the sizes of members the core arm64 registers vary, the
list of register encodings that make sense is not a simple linear
sequence.
To clarify which encodings to use, this patch adds a brief list
to the documentation.
Signed-off-by: Dave Martin
---
Draft only -- encodings not checked
at all for KVM_GET_REG_LIST
in this case. For consistency we also reject ioctl access to the
register. This ensures that a non-SVE-enabled guest looks the same
to userspace, irrespective of whether the kernel KVM implementation
supports SVE.
Signed-off-by: Dave Martin
---
Changes since RFCv1
, a subsidiary hook kvm_arm_arch_vcpu_uninit()
is added (with trivial implementations for now) to enable separate
specialisation for arm and arm64.
No functional change.
Signed-off-by: Dave Martin
---
Changes since RFCv1:
* The vcpu _init_ hook that was added by the former version of this
patch
-SVE-capable hardware (as was
done unconditionally prior to this patch).
No SVE handling is added on non-VHE-only paths, since VHE is an
architectural and Kconfig prerequisite of SVE.
Signed-off-by: Dave Martin
---
Changes since RFCv1:
* Add a if_sve () helper macro to efficiently skip
other similar contexts).
Signed-off-by: Dave Martin
---
arch/arm/include/asm/kvm_host.h | 7 +++
arch/arm64/include/asm/kvm_host.h | 2 ++
arch/arm64/kvm/guest.c| 6 ++
virt/kvm/arm/arm.c| 2 +-
4 files changed, 16 insertions(+), 1 deletion(-)
diff --git
This patch adds sections to the KVM API documentation describing
the extensions for supporting the Scalable Vector Extension (SVE)
in guests.
Signed-off-by: Dave Martin
---
Documentation/virtual/kvm/api.txt | 142 +-
1 file changed, 139 insertions(+), 3
for the vcpu.
Signed-off-by: Dave Martin
---
Changes since RFCv1:
* Simplify enumerate_sve_regs() based on Andrew Jones' approach.
* Reg copying loops are inverted for brevity, since the order we
spit out the regs in doesn't really matter.
(I tried to keep part of my approach to avoid
lengths available
to the guest on this vcpu (for use when snapshotting or
migrating a VM).
Signed-off-by: Dave Martin
---
Changes since RFCv1:
* The new feature bit for PREFERRED_TARGET / VCPU_INIT is gone in
favour of a capability and a new ioctl to enable/configure SVE.
Perhaps
Since SVE will be enabled or disabled on a per-vcpu basis, a flag
is needed in order to track which vcpus have it enabled.
This patch adds a suitable flag and a helper for checking it.
Signed-off-by: Dave Martin
---
Changes since RFCv1:
* Convert vcpu_has_sve() to a macro so that it can
. This avoids some complex and pointless emluation
in the kernel.
Signed-off-by: Dave Martin
---
Changes since RFCv1:
* Refactored to remove emulation of FPSIMD registers with the SVE
register view and vice-versa. This simplifies the code a fair bit.
* Fixed a couple of range errors
these
functions, so they are given a __ prefix to warn people not to use
them unless they really know what they are doing.
Signed-off-by: Dave Martin
---
arch/arm64/include/asm/fpsimd.h | 29 +
arch/arm64/kernel/fpsimd.c | 35 ---
2
for example.
This patch propagates vcpu into read_id_reg() so that future
patches can add run-time checks on the guest configuration here.
For now, there is no functional change.
Signed-off-by: Dave Martin
---
arch/arm64/kvm/sys_regs.c | 23 +--
1 file changed, 13 insertions
cases are reordered appropriately in order
to make the code more consistent, although there should be no
functional difference since these cases are protected by
local_bh_disable() anyway.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/kernel/fpsimd.c | 25
analyses the extent to which SVE can be virtualised
safely without interfering with migration of vcpus between physical
CPUs, and rejects late secondary CPUs that would erode the
situation further.
It is left up to KVM to decide what to do with this information.
Signed-off-by: Dave Martin
---
Changes
the term one per line, for
maximum readability.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/kvm/guest.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index 07256b0..953a5c9 100644
--- a/arch/arm64
at vcpu context bind time, the specified vector
length will not be used for anything yet. In later patches TIF_SVE
will be set here as appropriate, and the appropriate maximum vector
length for the vcpu will be passed when binding.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64
for abstracting other parts of the code
to handle conditionally-present sysregs, if required.
Signed-off-by: Dave Martin
---
arch/arm64/kvm/sys_regs.c | 10 +++---
arch/arm64/kvm/sys_regs.h | 4
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm
,
this patch makes no functional change for currently defined
registers.
Future patches will make use of non-zero val.
Signed-off-by: Dave Martin
---
arch/arm64/kvm/sys_regs.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm
kvm_host.h uses DECLARE_BITMAP() to declare the features member of
struct vcpu_arch, but the corresponding #include for this is
missing.
This patch adds a suitable #include for . Although
the header builds without it today, this should help to avoid
future surprises.
Signed-off-by: Dave Martin
__fpsimd_enabled() no longer exists, but a dangling declaration has
survived in kvm_hyp.h.
This patch gets rid of it.
Signed-off-by: Dave Martin
Reviewed-by: Alex Bennée
---
arch/arm64/include/asm/kvm_hyp.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/include/asm/kvm_hyp.h b
=linux-dm.git;a=shortlog;h=refs/heads/sve-kvm/rfcv2
git://linux-arm.org/linux-dm.git sve-kvm/rfcv2
[2] [RFC PATCH 00/16] KVM: arm64: Initial support for SVE guests
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-June/585467.html
Dave Martin (23):
arm64: fpsimd: Always set
On Wed, Sep 12, 2018 at 01:21:57PM +0200, Christoffer Dall wrote:
> On Wed, Sep 12, 2018 at 12:16:26PM +0100, Dave Martin wrote:
> > On Wed, Sep 12, 2018 at 12:17:04PM +0200, Christoffer Dall wrote:
[...]
> > > I think the point was actually to avoid saving/restoring FPEXC32_
On Wed, Sep 12, 2018 at 12:17:04PM +0200, Christoffer Dall wrote:
> On Wed, Sep 05, 2018 at 02:19:13PM +0100, Dave Martin wrote:
> > Currently FPEXC32_EL2 is handled specially when context-switching.
> > This made sense for arm, where FPEXC affects host execution
> > (includ
On Wed, Sep 05, 2018 at 05:03:21PM +0200, Christoffer Dall wrote:
> On Wed, Sep 05, 2018 at 12:28:46PM +0100, Dave Martin wrote:
[...]
> > You can try taking a look at the archietctural pseudocode -- see the
> > CheckFPAdvSIMDEnabled64() (for AArch64) and CheckFPAdvSIMDEnabled() (
On Wed, Sep 05, 2018 at 05:08:38PM +0200, Christoffer Dall wrote:
> On Wed, Sep 05, 2018 at 02:19:13PM +0100, Dave Martin wrote:
> > Currently FPEXC32_EL2 is handled specially when context-switching.
> > This made sense for arm, where FPEXC affects host execution
> > (includ
Zyngier
Cc: Christoffer Dall
Cc: Alexander Graf
Signed-off-by: Dave Martin
---
I could do with some confirmation from someone that my interpretation of
the architecture is in fact correct here. The CheckFPAdvSIMDEnabled64()
and CheckAdvSIMDEnabled() pseudocode functions may be a reasonable
starting
On Tue, Sep 04, 2018 at 02:51:21PM +0200, Christoffer Dall wrote:
> On Tue, Sep 04, 2018 at 12:39:54PM +0100, Dave Martin wrote:
> > On Mon, Sep 03, 2018 at 03:45:14PM +0200, Christoffer Dall wrote:
> > > From: Marc Zyngier
> > >
> > > If trapping FPSIM
ap on arm64 irrespective of FPEXC32_EL2.
I'll try to cook up a cleanup patch to apply on top, but it can be
treated as non-urgent.
Cheers
---Dave
>
> Fixes: e6b673b741ea ("KVM: arm64: Optimise FPSIMD handling to reduce
> guest/host thrashing")
> Cc: Dave Martin
> Report
On Wed, Aug 08, 2018 at 03:03:31PM +0100, Peter Maydell wrote:
> On 8 August 2018 at 10:11, Dave Martin wrote:
> > At its heart, I'm trying to abstract out the special behaviour of
> > all unallocated ID registers, so that we can decide at runtime which
> > ones to hide
On Tue, Aug 07, 2018 at 09:35:12PM +0200, Christoffer Dall wrote:
> On Tue, Aug 07, 2018 at 12:09:58PM +0100, Dave Martin wrote:
> > On Mon, Aug 06, 2018 at 03:03:24PM +0200, Christoffer Dall wrote:
> > > Hi Dave,
> > >
> > > I think there's a typ
On Tue, Aug 07, 2018 at 09:20:10PM +0200, Christoffer Dall wrote:
[...]
> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> > index a436373..31a351a 100644
> > --- a/arch/arm64/kvm/sys_regs.c
> > +++ b/arch/arm64/kvm/sys_regs.c
> > @@ -1840,7 +1840,7 @@ static int
On Tue, Aug 07, 2018 at 10:08:28PM +0200, Christoffer Dall wrote:
> On Tue, Aug 07, 2018 at 12:23:45PM +0100, Dave Martin wrote:
> > On Mon, Aug 06, 2018 at 03:41:33PM +0200, Christoffer Dall wrote:
[...]
> > > I'm personally fine with both feature flags and vcpu device ioctl
On Tue, Aug 07, 2018 at 09:43:38PM +0200, Christoffer Dall wrote:
> On Tue, Aug 07, 2018 at 12:15:26PM +0100, Dave Martin wrote:
> > On Mon, Aug 06, 2018 at 03:19:10PM +0200, Christoffer Dall wrote:
[...]
> > > nit: this may also be folded nicely into a static bool
> > &g
On Mon, Aug 06, 2018 at 03:41:33PM +0200, Christoffer Dall wrote:
> On Thu, Jul 26, 2018 at 02:18:02PM +0100, Dave Martin wrote:
> > On Wed, Jul 25, 2018 at 06:52:56PM +0200, Andrew Jones wrote:
> > > On Wed, Jul 25, 2018 at 04:27:49PM +0100, Dave Martin wrote:
> > > &
On Mon, Aug 06, 2018 at 03:05:00PM +0200, Christoffer Dall wrote:
> On Thu, Jun 21, 2018 at 03:57:24PM +0100, Dave Martin wrote:
> > This series implements basic support for allowing KVM guests to use the
> > Arm Scalable Vector Extension (SVE).
> >
> > The patches
On Mon, Aug 06, 2018 at 03:19:10PM +0200, Christoffer Dall wrote:
> On Thu, Jun 21, 2018 at 03:57:36PM +0100, Dave Martin wrote:
> > In order to give each vcpu its own view of the SVE registers, this
> > patch adds context storage via a new sve_state pointer in struct
> > vcpu
On Mon, Aug 06, 2018 at 03:03:24PM +0200, Christoffer Dall wrote:
> Hi Dave,
>
> I think there's a typo in the subject "to be" rather than "to by".
>
> On Thu, Jun 21, 2018 at 03:57:33PM +0100, Dave Martin wrote:
> > When a feature-dependent ID regist
On Fri, Aug 03, 2018 at 05:11:09PM +0200, Andrew Jones wrote:
> On Fri, Aug 03, 2018 at 03:57:59PM +0100, Dave Martin wrote:
> > On Thu, Jul 19, 2018 at 03:04:33PM +0200, Andrew Jones wrote:
> > > On Thu, Jun 21, 2018 at 03:57:38PM +0100, Dave Martin wrote:
> > > >
On Thu, Jul 19, 2018 at 03:04:33PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:38PM +0100, Dave Martin wrote:
> > This patch adds the following registers for access via the
> > KVM_{GET,SET}_ONE_REG interface:
> >
> > * KVM_REG_ARM64_SVE_ZREG(n, i) (n =
On Thu, Jul 26, 2018 at 02:55:44PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > On Wed, Jul 25, 2018 at 04:58:30PM +0100, Alex Bennée wrote:
> >>
> >> Dave Martin writes:
> >>
> >> > The Arm SVE architecture defines regist
On Thu, Jul 19, 2018 at 05:24:20PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:40PM +0100, Dave Martin wrote:
> > This patch reports the availability of KVM SVE support to userspace
> > via a new vcpu feature flag KVM_ARM_VCPU_SVE. This flag is
&
On Wed, Jul 25, 2018 at 06:52:56PM +0200, Andrew Jones wrote:
> On Wed, Jul 25, 2018 at 04:27:49PM +0100, Dave Martin wrote:
> > On Thu, Jul 19, 2018 at 04:59:21PM +0200, Andrew Jones wrote:
> > > On Thu, Jun 21, 2018 at 03:57:40PM +0100,
On Wed, Jul 25, 2018 at 07:20:57PM +0200, Andrew Jones wrote:
> On Wed, Jul 25, 2018 at 03:06:21PM +0100, Dave Martin wrote:
> > On Thu, Jul 19, 2018 at 03:04:33PM +0200, Andrew Jones wrote:
> > > On Thu, Jun 21, 2018 at 03:57:38PM +0100, Dave Martin wrote:
> > > &g
On Wed, Jul 25, 2018 at 04:58:30PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > The Arm SVE architecture defines registers that are up to 2048 bits
> > in size (with some possibility of further future expansion).
> >
> > In order to avoid the nee
On Wed, Jul 25, 2018 at 04:41:44PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > On Wed, Jul 25, 2018 at 03:12:15PM +0100, Alex Bennée wrote:
> >>
> >> Dave Martin writes:
> >>
> >> > Some system registers may or may not logicall
On Thu, Jul 19, 2018 at 04:59:21PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:40PM +0100, Dave Martin wrote:
> > This patch reports the availability of KVM SVE support to userspace
> > via a new vcpu feature flag KVM_ARM_VCPU_SVE. This flag is
&
On Thu, Jul 19, 2018 at 04:12:32PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:39PM +0100, Dave Martin wrote:
> > This patch includes the SVE register IDs in the list returned by
> > KVM_GET_REG_LIST, as appropriate.
> >
> > On a non-SVE-enabled v
On Wed, Jul 25, 2018 at 03:43:59PM +0200, Andrew Jones wrote:
> On Wed, Jul 25, 2018 at 12:41:06PM +0100, Dave Martin wrote:
[...]
> > The main purpose of system_supports_sve() here is to shadow the check on
> > vcpu_arch->flags with a static branch. If the system doesn't s
On Wed, Jul 25, 2018 at 02:58:29PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > The current FPSIMD/SVE context handling support for non-task (i.e.,
> > KVM vcpu) contexts does not take SVE into account. This means that
> > only task contexts ca
On Wed, Jul 25, 2018 at 03:12:15PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > Some system registers may or may not logically exist for a vcpu
> > depending on whether certain architectural features are enabled for
> > the vcpu.
> >
> > In ord
On Wed, Jul 25, 2018 at 03:57:33PM +0200, Andrew Jones wrote:
> On Wed, Jul 25, 2018 at 12:50:45PM +0100, Dave Martin wrote:
> > > > + if (system_supports_sve() && guest_has_sve)
> >
> > As elsewhere, the system_supports_sve() check uses a static key an
On Thu, Jul 19, 2018 at 03:04:33PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:38PM +0100, Dave Martin wrote:
> > This patch adds the following registers for access via the
> > KVM_{GET,SET}_ONE_REG interface:
> >
> > * KVM_REG_ARM64_SVE_ZREG(n, i) (n =
On Thu, Jul 19, 2018 at 03:13:38PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:36PM +0100, Dave Martin wrote:
> > In order to give each vcpu its own view of the SVE registers, this
> > patch adds context storage via a new sve_state pointer in struct
> > vcpu
On Thu, Jul 19, 2018 at 05:02:44PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:34PM +0100, Dave Martin wrote:
> > Since SVE will be enabled or disabled on a per-vcpu basis, a flag
> > is needed in order to track which vcpus have it enabled.
> >
> > This
On Thu, Jul 19, 2018 at 01:08:10PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:34PM +0100, Dave Martin wrote:
> > Since SVE will be enabled or disabled on a per-vcpu basis, a flag
> > is needed in order to track which vcpus have it enabled.
> >
> > This
On Thu, Jul 19, 2018 at 01:11:17PM +0200, Andrew Jones wrote:
> On Thu, Jun 21, 2018 at 03:57:35PM +0100, Dave Martin wrote:
> > This patch adds the necessary support for context switching ZCR_EL1
> > for each vcpu.
> >
> > The ID_AA64PFR0_EL1 emulation code is updated
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