Re: IV generation in cryptographic driver in AEAD

On 05/20/2016 06:31 PM, Herbert Xu wrote: On Fri, May 20, 2016 at 10:50:38AM -0500, Gary R Hook wrote: Why is (or should) setting geniv (be) required? crypto_givcipher_default() appears to call crypto_default_geniv() if the geniv member is NULL. That function returns "eseqiv" or "chainiv"

[PATCH 3/4] ARM: dts: nsp: Add rng device tree entry

Add support for the random number generator to the Northstar Plus SoC device tree. Signed-off-by: Yendapally Reddy Dhananjaya Reddy --- arch/arm/boot/dts/bcm-nsp.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi

[PATCH] hwrng: stm32 - fix build warning

We have been getting build warning about: drivers/char/hw_random/stm32-rng.c: In function 'stm32_rng_read': drivers/char/hw_random/stm32-rng.c:82:19: warning: 'sr' may be used uninitialized in this function On checking the code it turns out that sr can

[PATCH 4/4] hwrng: bcm2835: Read as much data as available

Read the requested number of data from the fifo Signed-off-by: Yendapally Reddy Dhananjaya Reddy --- drivers/char/hw_random/bcm2835-rng.c | 12 ++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/char/hw_random/bcm2835-rng.c

[PATCH 0/4] hw rng support for NSP SoC

This patchset contains the hw random number generator support for the Broadcom's NSP SoC. The block is similar to the block available in bcm2835 with different default interrupt mask value. Due to lack of documentation, I cannot confirm the interrupt mask register details in bcm2835. In an effort

[PATCH 2/4] hwrng: bcm2835: Support Broadcom NSP SoC rng

This supports the random number generator available in NSP SoC. Masks the rng interrupt for NSP. Signed-off-by: Yendapally Reddy Dhananjaya Reddy --- drivers/char/hw_random/Kconfig | 2 +- drivers/char/hw_random/bcm2835-rng.c | 34

[PATCH 1/4] dt-bindings: rng: Northstar Plus SoC rng bindings

Document the bindings used by Northstar Plus(NSP) SoC random number generator. Signed-off-by: Yendapally Reddy Dhananjaya Reddy --- Documentation/devicetree/bindings/rng/brcm,bcm2835.txt | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git

RE: [PATCH v6 0/3] Key-agreement Protocol Primitives (KPP) API

Hi Stephan, > -Original Message- > From: Stephan Mueller [mailto:smuel...@chronox.de] > Sent: Monday, May 23, 2016 7:44 PM > To: Benedetto, Salvatore > Cc: herb...@gondor.apana.org.au; linux-crypto@vger.kernel.org > Subject: Re: [PATCH v6 0/3] Key-agreement

key retention service: DH support

Hi David, With the new DH support for the key retention service, support for DH derived keys pops up. The implementation in security/keys/dh.c returns the DH shared secret straight to the user space caller. I implemented a KDF with that exact scenario already in mind: [1]. I am wondering

Re: [PATCH v6 0/3] Key-agreement Protocol Primitives (KPP) API

Am Mittwoch, 11. Mai 2016, 08:26:00 schrieb Salvatore Benedetto: Hi Salvatore, > Hi Herb, > > the following patchset introduces a new API for abstracting key-agreement > protocols such as DH and ECDH. It provides the primitives required for > implementing the protocol, thus the name KPP

Re: [PATCH v6 0/3] Key-agreement Protocol Primitives (KPP) API

Am Montag, 23. Mai 2016, 20:26:15 schrieb Benedetto, Salvatore: Hi Salvatore, > > http://permalink.gmane.org/gmane.linux.kernel.lsm/27456 > > As mentioned in the cover letter of that patch, KEYCTL_DH_COMPUTE will be > converted to kpp once accepted. Ok, I have overlooked that one :-)

Re: [PATCH] hwrng: stm32 - fix build warning

On Monday, May 23, 2016 6:14:08 PM CEST Sudip Mukherjee wrote: > We have been getting build warning about: > drivers/char/hw_random/stm32-rng.c: In function 'stm32_rng_read': > drivers/char/hw_random/stm32-rng.c:82:19: warning: 'sr' may be used > uninitialized

Re: [PATCH] crypto: ccp - Fix AES XTS error for request sizes above 4096

On 05/20/2016 06:35 PM, Herbert Xu wrote: > On Fri, May 20, 2016 at 05:33:03PM -0500, Tom Lendacky wrote: >> The ccp-crypto module for AES XTS support has a bug that can allow requests >> greater than 4096 bytes in size to be passed to the CCP hardware. The CCP >> hardware does not support request

Re: [PATCH 1/4] dt-bindings: rng: Northstar Plus SoC rng bindings

Yendapally Reddy Dhananjaya Reddy writes: > Document the bindings used by Northstar Plus(NSP) SoC random number > generator. > > Signed-off-by: Yendapally Reddy Dhananjaya Reddy > Acked-by: Eric Anholt

Re: [PATCH 4/4] hwrng: bcm2835: Read as much data as available

Yendapally Reddy Dhananjaya Reddy writes: > Read the requested number of data from the fifo > > Signed-off-by: Yendapally Reddy Dhananjaya Reddy > > --- > drivers/char/hw_random/bcm2835-rng.c | 12 ++-- > 1 file changed, 10

Re: [PATCH 1/4] dt-bindings: rng: Northstar Plus SoC rng bindings

On Mon, May 23, 2016 at 12:20:48PM -0400, Yendapally Reddy Dhananjaya Reddy wrote: > Document the bindings used by Northstar Plus(NSP) SoC random number > generator. > > Signed-off-by: Yendapally Reddy Dhananjaya Reddy > > --- >

Re: ATH9K RNG

Stephan Mueller writes: > considering the patch ed14dc0af7ccea867b479feb88efdfe43ca2a0f9 which adds the > invocation of add_hwgenerator_randomness to the ATH9K driver, may I ask about > more details about how you concluded that the data from the ATH chip is > entropic? >

ATH9K RNG

Hi Miaoqing, Kalle, considering the patch ed14dc0af7ccea867b479feb88efdfe43ca2a0f9 which adds the invocation of add_hwgenerator_randomness to the ATH9K driver, may I ask about more details about how you concluded that the data from the ATH chip is entropic? In addition, can you please

RE: [PATCH v6 0/3] crypto: caam - add support for RSA algorithm

Hi Stephan, > as I am looking into the RSA countermeasures, I am wondering how much of > countermeasures are actually applied inside hardware implementations. Please point me to the reference RSA countermeasures so that we have a common point of start. Thanks, ta -- To unsubscribe from this

Re: [PATCH v6 0/3] crypto: caam - add support for RSA algorithm

Am Montag, 23. Mai 2016, 12:56:18 schrieb Tudor-Dan Ambarus: Hi Tudor, > Hi Stephan, > > > as I am looking into the RSA countermeasures, I am wondering how much of > > countermeasures are actually applied inside hardware implementations. > > Please point me to the reference RSA countermeasures