I saw in Jeff Garzik the link to http://www.t13.org/ for the ata 's
documentation. Unfortunately , I do seem to be able to correlate the
errors in the specs to the errors appear in dmesg. If you would be
kind to direct me a little, I would write a code that dumps more
information, something like
This is Palmchip BK3710 IDE controller support for kernel version 2.6.24.
The IDE controller logic supports PIO, multiword DMA and ultra-DMA modes.
Supports interface to compact Flash (CF) configured in True-IDE mode.
Signed-off-by: Anton Salnikov [EMAIL PROTECTED]
---
drivers/ide/Kconfig
Mark Lord wrote:
sata_mv Comments and version bump.
Remove some obsolete comments, and bump up the driver version number.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
..
Mmm.. something weird happened with that original patch,
in that it somehow also had this:
-int want_ncq =
Konstantin A. Lepikhov wrote:
Hi Tejun!
Friday 25, at 02:50:06 PM you wrote:
Andrew Paprocki wrote:
I have an SB600/RS690 here with SATA drives connected. I haven't been
following this thread, but I can help test something if it would help.
We're trying to determine whether SB600 ahci
Raz wrote:
I saw in Jeff Garzik the link to http://www.t13.org/ for the ata 's
documentation. Unfortunately , I do seem to be able to correlate the
errors in the specs to the errors appear in dmesg. If you would be
kind to direct me a little, I would write a code that dumps more
information,
Lars Michael Jogbäck wrote:
Hello,
I've got a couple of older PMP's with Sil3726.
I wonder if it's possible from Linux to check which firmware version
it is on the Sil3726 and on the Sil3124?
Is it possible to upgrade the firmware/bios on Sil3726 and Sil3124
from Linux?
That is done
Mark Lord wrote:
sata_mv Add want_ncq parameter for EDMA configuration.
An extra EDMA config bit is required for NCQ operation.
So set/clear it as needed, and cache current setting in port_priv.
For now though, it will always be off (0).
Signed-off-by: Mark Lord [EMAIL PROTECTED]
ACK, though
Mark Lord wrote:
sata_mv Restrict max_sectors to 8-bits on GenII NCQ.
The GenII chips have only 8-bits for the sector_count field when
performing NCQ.
Add a dev_config method to restrict this when necessary, taking care not to
override any other restriction already in place (likely none, but
Mark Lord wrote:
sata_mv Use DMA memory pools for hardware memory tables.
Create module-owned DMA memory pools, for use in allocating/freeing
per-port
command/response queues and SG tables. This gives us a way to guarantee we
meet the hardware address alignment requirements, and also reduces
Mark Lord wrote:
sata_mv Enable NCQ operation.
Final changes to actually turn on NCQ in the driver for GEN II/IIE
hardware.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
ACK
though personally I would merge the -dev_config() patch into this one
-
To unsubscribe from this list: send the line
Mark Lord wrote:
sata_mv No soft resets.
Soft resets rarely have significant effect with these chips,
so always do a hard reset instead.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c2008-01-24 14:49:28.0 -0500
+++ new/drivers/ata/sata_mv.c2008-01-24
Mark Lord wrote:
sata_mv Introduce per-tag SG tables.
In preparation for supporting NCQ, we must allocate separate SG tables
for each command tag, rather than just a single table per port as before.
Gen-I hardware cannot do NCQ, though, so we still allocate just a single
table for that, but
Mark Lord wrote:
sata_mv Use hqtag instead of ioid.
Simplify tag handling by using the cid/hqtag field instead of ioid,
as recommended by Marvell.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c2008-01-24 12:07:16.0 -0500
+++ new/drivers/ata/sata_mv.c
Mark Lord wrote:
Here is a set of 12 patches that gradually add working NCQ support to
sata_mv.
The driver still has issues afterwards, but nothing new that wasn't
broken already.
I am working on additional patches to correct the interrupt and error
handling
problems that still exist in the
Mark Lord wrote:
sata_mv EH fixes.
A hard reset is necessary after hotplug events.
Only clear the error irq bits that were set on entry.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c2008-01-24 10:40:11.0 -0500
+++ new/drivers/ata/sata_mv.c2008-01-24
Mark Lord wrote:
sata_mv Add missing qc_defer op.
This is necessary now that we support NCQ in the driver.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
---
Who says a 14-patch series cannot have a 15th patch? :)
--- old/drivers/ata/sata_mv.c2008-01-24 18:55:12.0 -0500
+++
Mark Lord wrote:
sata_mv Fix EDMA configuration.
Simplify and fix EDMA configuration setup to match Marvell specificiations.
The chip documentation gives a specific (re)init sequence, which we now
follow.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c2008-01-24
Hello, Konstantin.
Konstantin A. Lepikhov wrote:
$ lspci -nn
00:00.0 Host bridge [0600]: ATI Technologies Inc RD580 [CrossFire Xpress
3200] Chipset Host Bridge [1002:5952]
00:02.0 PCI bridge [0604]: ATI Technologies Inc RS480 PCI-X Root Port
[1002:5a34]
00:05.0 PCI bridge [0604]: ATI
Mark Lord wrote:
sata_mv Mask transient IRQs.
The chips can handle many transient errors internally without a software
IRQ.
We now mask/ignore those interrupts here. This is necessary for NCQ,
later on.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c2008-01-24
I'll try to get that configuration together.. right now I only have 2
1gb sticks installed on the board, so I would need to track down 2gb
ones. If I can find some laying around, I'll let you know.
Thanks,
-Andrew
On Jan 25, 2008 12:50 AM, Tejun Heo [EMAIL PROTECTED] wrote:
Andrew Paprocki
On Fri, 25 Jan 2008 10:04:08 -0600
Kumar Gala [EMAIL PROTECTED] wrote:
On Jan 24, 2008, at 8:46 PM, Kim Phillips wrote:
The mpc8315 shares the same SATA controller as the mpc837x,
and likelihood is that future SoCs from Freescale will also.
Signed-off-by: Jerry Huang [EMAIL
On Thursday 24 January 2008, Aristeu Rozanski wrote:
Currently it's possible to ide-cd to set an incorrect blocksize by
reading garbage if the drive is dead:
ide_cd_probe()
- cdrom_read_toc()
- cdrom_read_capacity()
- cdrom_queue_packet_command()
-
On Thu, 24 Jan 2008, Kim Phillips wrote:
The mpc8315 shares the same SATA controller as the mpc837x,
and likelihood is that future SoCs from Freescale will also.
Signed-off-by: Jerry Huang [EMAIL PROTECTED]
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
---
Kumar, let me know if you want me
Hi Tejun!
Friday 25, at 02:50:06 PM you wrote:
Andrew Paprocki wrote:
I have an SB600/RS690 here with SATA drives connected. I haven't been
following this thread, but I can help test something if it would help.
We're trying to determine whether SB600 ahci controller can do 64bit DMA
or
Hello,
I've got a couple of older PMP's with Sil3726.
I wonder if it's possible from Linux to check which firmware version it is on
the Sil3726 and on the Sil3124?
Is it possible to upgrade the firmware/bios on Sil3726 and Sil3124 from Linux?
Best Regards,
/LM
-
To unsubscribe from this
On Thu, 2008-01-24 at 23:29 -0500, Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
..
Super! You've done a great job with this stuff, Tejun!
Thanks but I can't really say nice things about how sata_sil24's
qc_defer() is implemented or how we generally handle command deferring.
James Bottomley wrote:
On Thu, 2008-01-24 at 23:29 -0500, Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
..
Super! You've done a great job with this stuff, Tejun!
Thanks but I can't really say nice things about how sata_sil24's
qc_defer() is implemented or how we generally handle
On Fri, 2008-01-25 at 10:18 -0500, Mark Lord wrote:
James Bottomley wrote:
On Thu, 2008-01-24 at 23:29 -0500, Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
..
Super! You've done a great job with this stuff, Tejun!
Thanks but I can't really say nice things about how sata_sil24's
added some more printk's based on what I saw -
maybe some issue with the dma port?
...tom
Thomas Evans wrote:
Tejun (and all) -
I've attached a log from my machine marked up with a few extra printk's.
I did add the ssleep() you suggested off line - made no difference.
I'll be happy to add
Saw something that caught my attention might be nothing ...
When initialized, the port address is a 64 bit address:
sil24_init_one init_one: port:FD00:09AA
sil24_init_one init_one: port:FD00:09AA2000
sil24_init_one init_one: port:FD00:09AA4000
sil24_init_one init_one:
Thomas Evans wrote:
Saw something that caught my attention might be nothing ...
When initialized, the port address is a 64 bit address:
sil24_init_one init_one: port:FD00:09AA
sil24_init_one init_one: port:FD00:09AA2000
sil24_init_one init_one: port:FD00:09AA4000
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