Atomic write page can be GCed, after committing this kind of page, we should
clear the GCed flag for it.
Signed-off-by: Chao Yu
---
fs/f2fs/segment.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index 7efd96ad..f77b325 100644
--- a/fs/f2fs/segment.c
printk() currently discards earlier messages to make space for new messages
arriving. This has the distinct downside that if the kernel starts
churning out messages because of some initial incident, the report of the
initial incident is likely to be lost under a blizzard of:
** NNN
On Thu, Oct 22, 2015 at 11:39:38AM +0200, Petr Mladek wrote:
> Maybe, we could add support to use early console in case of Oops and
> panic. But we should not do this by default. It would help, especially
> when the problem is reproducible and we get stacked with the normal
> console.
What I
Le 22/10/2015 11:40, Maxime Ripard a écrit :
> The memset and scatter gathered memset are going to use some common logic
> to create their descriptors.
>
> Move that logic into a function of its own so that we can share it with the
> future memset_sg callback.
>
> Signed-off-by: Maxime Ripard
>
On Thursday 22 October 2015 11:41:58 Eric Auger wrote:
> v2: creation
> - this defines the module_vfio_reset_handler macro as suggested by Arnd
>
> Although Arnd suggested me to remove the vfio_platform_register_reset
> symbol_get (since the module manager can handle the case where the
>
On Thursday 22 October 2015 11:41:59 Eric Auger wrote:
> This patch adds the reset function registration/unregistration.
>
> Signed-off-by: Eric Auger
Looks good, except one thing:
> @@ -70,6 +69,8 @@ int vfio_platform_calxedaxgmac_reset(struct
> vfio_platform_device *vdev)
>
Hello,
On 2015-10-22 06:14, Alim Akhtar wrote:
CCing Doug, Heiko and Enric Balletbo
To help us by testing on rk3288-veyron and am335x-sl50 boards.
On 10/22/2015 08:22 AM, Javier Martinez Canillas wrote:
Hello Krzysztof,
On 10/22/2015 03:43 AM, Krzysztof Kozlowski wrote:
On 22.10.2015 10:20,
On Thursday 22 October 2015 11:41:57 Eric Auger wrote:
> In preparation for subsequent changes in reset function lookup,
> lets introduce a dynamic list of reset combos (compat string,
> reset module, reset function). The list can be populated/voided with
> two new functions,
On 10/22/2015 11:02 AM, Arnd Bergmann wrote:
> On Thursday 22 October 2015 08:34:53 Appana Durga Kedareswara Rao wrote:
>>> On Thursday 22 October 2015 10:16:02 Kedareswara rao Appana wrote:
The driver only supports memory-mapped I/O [by ioremap()], so
readl/writel is actually the right
On 2015/10/22 3:17, Luck, Tony wrote:
+ if (reliable_kernelcore) {
+ for_each_memblock(memory, r) {
+ if (memblock_is_mirror(r))
+ continue;
Should we have a safety check here that there is some mirrored memory? If you
> > 1 file changed, 12 insertions(+), 49 deletions(-)
>
> This patch breaks compound page futexes with the following panic:
>
> [ 33.465456] general protection fault: [#1] SMP
> [ 33.465991] CPU: 1 PID: 523 Comm: tst Not tainted
On Thu, Oct 22, 2015 at 12:38 AM, Namhyung Kim wrote:
> Hi Ingo,
>
> On Thu, Oct 22, 2015 at 4:32 PM, Ingo Molnar wrote:
>>
>> * Namhyung Kim wrote:
>>
>>> The caller callchain order is useful with --children option since it can
>>> show 'overview' style output, but other commands which don't
On Thu, Oct 22, 2015 at 11:12:16AM +0800, Wangnan (F) wrote:
> On 2015/10/22 11:09, Alexei Starovoitov wrote:
> >On 10/21/15 6:56 PM, Wangnan (F) wrote:
> >>>One alternative solution I can image is to attach a BPF program
> >>>at sampling like kprobe, and return 0 if we don't want sampling
>
On 22 October 2015 at 08:19, Shawn Lin wrote:
> This patch add hw_reset for dw_mmc to implement hw reset
> procedure. It's useful for mmc core to recover emmc devices
> if emmc runs into unexpected state. Add MMC_CAP_HW_RESET
> capability to dw_mmc extension driver directly if it needs hw_reset.
On Thu 22-10-15 06:49:01, Hongjie Fang (方洪杰) wrote:
>
> The oom_adj has been replaced by oom_score_adj in kernel,
> but the /proc/pid/oom_adj is provided for legacy purposes.
> When write/read a value into/from /proc/pid/oom_adj,
> there is a transformation between oom_adj and oom_score_adj.
>
>
In preparation for subsequent changes in reset function lookup,
lets introduce a dynamic list of reset combos (compat string,
reset module, reset function). The list can be populated/voided with
two new functions, vfio_platform_register/unregister_reset. Those are
not yet used in this patch.
>
> This is a multi-stage process, first we save and replace page table
> entry with special HMM entry, also flushing tlb in the process. If
> we run into non allocated entry we either use the zero page or we
> allocate new page. For swaped entry we try to swap them in.
>
Please elaborate why
On 10/22/2015 11:06 AM, Shawn Lin wrote:
> This patch add runtime_suspend and runtime_resume for
> sdhci-of-arasan. Currently we also power-off phy at
> runtime_suspend for power-saving.
>
> Signed-off-by: Shawn Lin
>
> Serise-changes: 4
> - remove ifdef for PM callback statement
> - fix
On Thu 22-10-15 02:42:05, Dan Williams wrote:
> Similar to the file_inode() helper, provide a helper to lookup the inode for a
> raw block device itself.
So I somewhat dislike the name file_bd_inode() since for struct file
pointing to a regular file, the result would be equivalent to file_inode()
Hi Russell,
On Thu, Oct 22, 2015 at 11:26 AM, Russell King - ARM Linux
wrote:
> On Wed, Oct 21, 2015 at 09:29:08PM +0100, Russell King - ARM Linux wrote:
>> On Wed, Oct 21, 2015 at 01:47:49PM +0200, Geert Uytterhoeven wrote:
>> > On Thu, Sep 24, 2015 at 11:32 AM, Yang Yingliang
>> > wrote:
>> >
Remove the static lookup table and use the dynamic list of registered
reset functions instead. Also load the reset module through its alias.
The reset struct module pointer is stored in vfio_platform_device.
We also remove the useless struct device pointer parameter in
vfio_platform_get_reset.
This header is to be included in all vfio reset modules. It
defines the module_vfio_reset_handler macro whose role is
- to define a module alias
- implement module init/exit function which respectively registers
and unregisters the reset function.
Signed-off-by: Eric Auger
---
v2: creation
-
Currently reset lookup is done on probe. This introduces a
race with new registration mechanism in the case where the
vfio-platform driver is bound to the device before its module
is loaded: on the load, the probe happens which triggers the
reset module load which itself attempts to get the symbol
Let's retrieve the compatibility string on probe and store it
in the vfio_platform_device struct
Signed-off-by: Eric Auger
---
drivers/vfio/platform/vfio_platform_common.c | 15 ---
drivers/vfio/platform/vfio_platform_private.h | 1 +
2 files changed, 9 insertions(+), 7
This series fixes the current implementation by getting rid of the
usage of __symbol_get which caused a compilation issue with
CONFIG_MODULES disabled. On top of this, the usage of MODULE_ALIAS makes
possible to add a new reset module without being obliged to update the
framework. The new
Hi Javier,
On 22 October 2015 at 14:06, Javier Martinez Canillas
wrote:
> Hello Anand,
>
> On 10/22/2015 07:03 AM, Anand Moon wrote:
>> Hi Javier,
>>
>> On 22 October 2015 at 08:22, Javier Martinez Canillas
>> wrote:
>>> Hello Krzysztof,
>>>
>>> On 10/22/2015 03:43 AM, Krzysztof Kozlowski
This patch adds the reset function registration/unregistration.
Signed-off-by: Eric Auger
---
v1 -> v2:
- uses the module_vfio_reset_handler macro
- add pr_info on vfio reset
- do not export vfio_platform_calxedaxgmac_reset symbol anymore
---
Just like memset support, the HDMAC might be used to do a memset over a
discontiguous memory area.
In such a case, we'll just build up a chain of memset descriptors over the
contiguous chunks of memory to set, in order to allow such a support.
Signed-off-by: Maxime Ripard
---
The memset and scatter gathered memset are going to use some common logic
to create their descriptors.
Move that logic into a function of its own so that we can share it with the
future memset_sg callback.
Signed-off-by: Maxime Ripard
---
drivers/dma/at_hdmac.c | 97
Hi Vinod,
Here is a patch serie that adds support in the Atmel HDMAC for memset
over a discontiguous memory area.
Just like for the memset, it's used on those SoCs to support
framebuffer related operations that cannot be performed either by the
display engine or the (non-existent) GPU.
Let me
On Wed 2015-10-21 13:11:20, Peter Zijlstra wrote:
> On Wed, Oct 21, 2015 at 11:18:09AM +0200, Petr Mladek wrote:
> > There are few situations when we reinitialize (zap) ticket spinlocks. It
> > typically happens when the system is going down after an error and we
> > want to avoid deadlock in some
These patches add support for Intel's FieldsPeak NFC solution.
Fields Peak complies with the ISO/IEC 14443A/B, 15693, 18092,
and JIS X 6319-4. It is an NCI based controller.
RF Protocols supported:
- NFC Forum Type 1 Tags (Jewel, Topaz)
- NFC Forum Type 2 Tags (Mifare UL)
- NFC Forum Type 3
On 2015/10/22 15:43, Thomas Gleixner wrote:
> On Thu, 22 Oct 2015, Yang Yingliang wrote:
>> I use the kernel-4.1.6 running on arm64.
>> My testcase is that it calls clock_settime and clock_adjtime alternately with
>> random params on each core. My system has 32 cores.
>>
>> I found the cpu
On 22/10/15 01:50, Simon Horman wrote:
On Wed, Oct 21, 2015 at 11:23:03AM +0100, Sudeep Holla wrote:
On 21/10/15 11:18, Geert Uytterhoeven wrote:
On Wed, Oct 21, 2015 at 12:10 PM, Sudeep Holla wrote:
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check
Bruno, can you please have a look at the following regression attributed to:
4eebd5a apple-gmux: lock iGP IO to protect from vgaarb changes
2015-03-18 (7 months ago), Bruno Prémont
On Thu, Oct 15, 2015 at 04:47:13AM +, bugzilla-dae...@bugzilla.kernel.org
wrote:
>
FDP driver needs to send the firmware as regular packets
(not fragmented). The driver should have a way to
get the max packet size for a given connection.
Signed-off-by: Robert Dolca
---
include/net/nfc/nci_core.h | 1 +
net/nfc/nci/data.c | 12
2 files changed, 13
For the firmware update the driver may use nci_send_data.
Signed-off-by: Robert Dolca
---
net/nfc/nci/data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/nfc/nci/data.c b/net/nfc/nci/data.c
index 566466d..83acd18 100644
--- a/net/nfc/nci/data.c
+++ b/net/nfc/nci/data.c
@@ -203,6
On Thu 22-10-15 02:42:11, Dan Williams wrote:
> If an application wants exclusive access to all of the persistent memory
> provided by an NVDIMM namespace it can use this raw-block-dax facility
> to forgo establishing a filesystem. This capability is targeted
> primarily to hypervisors wanting to
The driver may be required to act when some responses or notifications
arrive. For example the NCI core does not have a handler for
NCI_OP_CORE_GET_CONFIG_RSP. The NFCC can send a config response that has
to be read by the driver and the packet may contain vendor specific data.
The Fields Peak
Initially it was used to create hooks in the driver for proprietary
operations. Currently it is being used for hooks for both proprietary
and generic operations.
Signed-off-by: Robert Dolca
---
drivers/nfc/s3fwrn5/nci.c | 4 ++--
drivers/nfc/st-nci/core.c | 2 +-
include/net/nfc/nci_core.h
On Thu, Oct 22, 2015 at 01:27:29AM -0400, Jason Wang wrote:
> This patch tries to poll for new added tx buffer for a while at the
> end of tx processing. The maximum time spent on polling were limited
> through a module parameter. To avoid block rx, the loop will end it
> there's new other works
On Tue, Oct 20, 2015 at 07:45:38PM +0800, Tan Xiaojun wrote:
> The PAGES_TO_MiB macros is only used for unit conversion.
>
> Signed-off-by: Tan Xiaojun
> ---
> drivers/edac/edac_mc.c | 2 +-
> drivers/edac/ghes_edac.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
Although I2C mux devices are easily enumerated using ACPI (_HID/_CID or
device property compatible string match), enumerating I2C client devices
connected through an I2C mux needs a little extra work.
This change implements a method for describing an I2C device hierarchy that
includes mux devices
This allows sending core commands from the driver. The driver should be
able to send NCI core commands like CORE_GET_CONFIG_CMD.
Signed-off-by: Robert Dolca
---
include/net/nfc/nci_core.h | 1 +
net/nfc/nci/core.c | 24 +++-
2 files changed, 20 insertions(+), 5
Include asm-generic/msi.h to support CONFIG_GENERIC_MSI_IRQ_DOMAIN.
This to fix compilation error:
"include/linux/msi.h:123:21: fatal error: asm/msi.h:
No such file or directory"
Signed-off-by: Ley Foon Tan
---
arch/arm/include/asm/Kbuild | 1 +
1 file changed, 1 insertion(+)
diff --git
This patch adds the Altera PCIe host controller driver.
Signed-off-by: Ley Foon Tan
Reviewed-by: Marc Zyngier
---
drivers/pci/host/Kconfig | 8 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pcie-altera.c | 579 +
3 files changed, 588
On 20 October 2015 at 23:50, Franklin S Cooper Jr wrote:
>
> From: Lokesh Vutla
>
> Enable omap_hsmmc for Keystone 2 architecture which reuses the HSMMC
> IP found on OMAP platforms.
>
> Signed-off-by: Franklin S Cooper Jr
> ---
> drivers/mmc/host/Kconfig | 2 +-
> 1 file changed, 1
This patch adds the bindings for Altera PCIe host controller driver and
Altera PCIe MSI driver.
Signed-off-by: Ley Foon Tan
---
.../devicetree/bindings/pci/altera-pcie-msi.txt| 28 +
.../devicetree/bindings/pci/altera-pcie.txt| 49 ++
2 files changed,
This patch adds Altera PCIe MSI driver. This soft IP supports configurable
number of vectors, which is a dts parameter.
Signed-off-by: Ley Foon Tan
Reviewed-by: Marc Zyngier
---
drivers/pci/host/Kconfig | 8 +
drivers/pci/host/Makefile | 1 +
Signed-off-by: Ley Foon Tan
---
MAINTAINERS | 16
1 file changed, 16 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b8577ad9..96b9fac 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7958,6 +7958,14 @@ F: include/linux/pci*
F: arch/x86/pci/
F:
Signed-off-by: Ley Foon Tan
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d9ba49c..08e4462 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1550,6 +1550,8 @@
#define
This is the 11th version of patch set to add support for Altera PCIe host
controller with MSI feature on Altera FPGA device families. This patchset
mainly resovle the warning/error caught by kbuild test.
Hi Bjorn,
Do you have further comment on this patchset? Any chance this can go into 4.4?
Quoting Maxime Ripard (2015-10-22 01:36:47)
> Hi!
>
> On Wed, Oct 21, 2015 at 04:33:53PM -0700, Stephen Boyd wrote:
> > These APIs aren't used, so remove them. This can be reverted if
> > we get a user at some point.
> >
> > Cc: Maxime Ripard
> > Suggested-by: Michael Turquette
> >
On Thu Oct 22 00:39, Rafael J. Wysocki wrote:
> Hi,
>
> On Wed, Oct 21, 2015 at 11:25 AM, Dustin Byford
> wrote:
> > On Wed Oct 21 12:08, Mika Westerberg wrote:
> >> I don't really have strong feelings whether it should be the I2C core or
> >> individual drivers setting the ACPI companion.
On Wed, Oct 21, 2015 at 09:29:08PM +0100, Russell King - ARM Linux wrote:
> On Wed, Oct 21, 2015 at 01:47:49PM +0200, Geert Uytterhoeven wrote:
> > On Thu, Sep 24, 2015 at 11:32 AM, Yang Yingliang
> > wrote:
> > > When cpu is disabled, all irqs will be migratged to another cpu.
> > > In some
Adds ti,dm816-timer to the dmtimer OF match table.
Cc: Brian Hutchinson
Signed-off-by: Neil Armstrong
---
arch/arm/plat-omap/dmtimer.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 8ca94d3..28a6550 100644
---
On Thu 22-10-15 02:41:54, Dan Williams wrote:
> dax_clear_blocks is currently performing a cond_resched() after every
> PAGE_SIZE memset. We need not check so frequently, for example md-raid
> only calls cond_resched() at stripe granularity. Also, in preparation
> for introducing a
In order to fix support for the dm816x platform, add missing bits in
the 81xx hwmod data.
The clk related patch adds the missing clkdev entries to fix all source
selection in the dmtimer driver.
The last patch adds hwmod support of the spinbox module.
Neil Armstrong (4):
arm: omap2+: add
* Andi Kleen wrote:
> > > v2:
> > > Use new ack sequence unconditionally. Remove pmu reset code.
> >
> > So this is not something we can easily revert if things go bad. Esp.
> > since you build on it with the next patches.
>
> Ok, and?
Sigh, you are being disruptive again.
> You want me to
On Thu, Oct 22, 2015 at 03:51:37PM +0800, Wangnan (F) wrote:
> Because I'm not very sure what the meaning of "inconsistent" in
> Peter's words...
What's inconsistent is that some perf actions can be done only on local
events while others can be done on !local.
And I can't say I particularly like
Commit-ID: e3d006ce8180a0c025ce66bdc89bbc125f85be57
Gitweb: http://git.kernel.org/tip/e3d006ce8180a0c025ce66bdc89bbc125f85be57
Author: Arnaldo Carvalho de Melo
AuthorDate: Wed, 21 Oct 2015 15:45:13 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 21 Oct 2015 18:12:37 -0300
Commit-ID: bc1d03687b9be3a30aab8e8d78c7884449b6e511
Gitweb: http://git.kernel.org/tip/bc1d03687b9be3a30aab8e8d78c7884449b6e511
Author: Kan Liang
AuthorDate: Fri, 9 Oct 2015 06:59:23 -0400
Committer: Arnaldo Carvalho de Melo
CommitDate: Tue, 20 Oct 2015 15:54:20 -0300
perf cpu_map: Fix
Commit-ID: 8b8cde49586566471d65af9a59e25d3edb941387
Gitweb: http://git.kernel.org/tip/8b8cde49586566471d65af9a59e25d3edb941387
Author: Andi Kleen
AuthorDate: Tue, 20 Oct 2015 11:46:36 -0700
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 21 Oct 2015 18:12:29 -0300
perf evsel:
Commit-ID: e1d040cfcf76c1c1b5d71fc08ab577a0cf72fefd
Gitweb: http://git.kernel.org/tip/e1d040cfcf76c1c1b5d71fc08ab577a0cf72fefd
Author: Yunlong Song
AuthorDate: Thu, 15 Oct 2015 16:51:56 +0800
Committer: Arnaldo Carvalho de Melo
CommitDate: Tue, 20 Oct 2015 10:43:28 -0300
perf build:
Commit-ID: 2f465deef7ce8c722121b782dd91c284f5ae80ca
Gitweb: http://git.kernel.org/tip/2f465deef7ce8c722121b782dd91c284f5ae80ca
Author: Paolo Bonzini
AuthorDate: Thu, 1 Oct 2015 12:28:11 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Tue, 20 Oct 2015 15:54:14 -0300
tools lib
On 21/10/15 21:41, Julia Lawall wrote:
for_each_available_child_of_node performs an of_node_get on each iteration,
so a break out of the loop requires an of_node_put.
The semantic patch that fixes this problem is as follows
(http://coccinelle.lip6.fr):
//
@@
expression root,e;
local
Add missing #mbox-cells for dm816x mbox DT node.
Cc: Brian Hutchinson
Signed-off-by: Neil Armstrong
---
arch/arm/boot/dts/dm816x.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index 3c99cfa..a7a34e4 100644
---
Add the missing SPI controller DMA handler in the dm816x DT
node, only properties for the two channels on four were present.
Cc: Brian Hutchinson
Signed-off-by: Neil Armstrong
---
arch/arm/boot/dts/dm816x.dtsi | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
Add dm816x DT entries for omap4-hwspinlock support as hwmod spinbox.
Cc: Brian Hutchinson
Signed-off-by: Neil Armstrong
---
arch/arm/boot/dts/dm816x.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index
On 22.10.2015 18:05, Maxime Ripard wrote:
> Hi,
>
> On Thu, Oct 22, 2015 at 10:25:28AM +0900, Krzysztof Kozlowski wrote:
>> SRAM bindings for various SoCs, using the mmio-sram genalloc
>> API, are spread over different places - per SoC vendor. Since all of
>> these are quite similar (they depend
Adds ti,timer-pwm property to timers 4 to 7 to permit usage of their
PWM output fonctionnality via the dmtimer driver.
Cc: Brian Hutchinson
Signed-off-by: Neil Armstrong
---
arch/arm/boot/dts/dm816x.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/dm816x.dtsi
Add dm81xx hwmod data entries for dm816x spinbox support.
Cc: Brian Hutchinson
Signed-off-by: Neil Armstrong
---
arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 35 ++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
Add missing clkdev dmtimer related entries for dm816x.
32Khz and ext sources were missing.
Cc: Brian Hutchinson
Signed-off-by: Neil Armstrong
---
drivers/clk/ti/clk-816x.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/ti/clk-816x.c b/drivers/clk/ti/clk-816x.c
index
In order to fix support for the dm816x platform, add missing bits in
the dm816x dtsi.
The last patch adds support for the omap4-hwspinlock.
Neil Armstrong (4):
arm: dts: add dm816x missing #mbox-cells
arm: dts: add dm816x missing spi DT dma handles
arm: dts: add dm816x pwm property to
Add missing HWMOD_NO_IDLEST hwmod flag for entries no
having omap4 clkctrl values.
Cc: Brian Hutchinson
Signed-off-by: Neil Armstrong
---
arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
Add a stub for acpi_preset_companion(). Fixes build failures when
acpi_preset_companion() is used and CONFIG_ACPI is not set.
Signed-off-by: Dustin Byford
---
include/linux/acpi.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index
The following series adds support for describing ACPI enumerated I2C mux
ports like this (added as Documentation/acpi/i2c-muxes.txt):
+--+ +--+
| SMB1 |-->| MUX0 |--CH00--> i2c client A (0x50)
| | | 0x70 |--CH01--> i2c client B (0x50)
+--+ +--+
Device (SMB1)
{
Name
On Thu, Oct 22, 2015 at 10:57:45AM +0200, Jean-Francois Moine wrote:
> On Thu, 22 Oct 2015 10:47:35 +0200
> Maxime Ripard wrote:
>
> > Not really. The uart0 reset is the bit 16, in the reset register 4.
> >
> > 4 * 32 + 16 = 44.
> >
> > Not 112, but still not 208 either.
>
> The registers are
for_each_child_of_node performs an of_node_get on each iteration, so
a break out of the loop requires an of_node_put.
A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):
//
@@
expression root,e;
local idexpression child;
@@
for_each_child_of_node performs an of_node_get on each iteration, so
a break out of the loop requires an of_node_put.
A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):
//
@@
local idexpression n;
expression root,e;
@@
On Thursday, October 22, 2015 04:47 PM, Tejun Heo wrote:
Hello,
On Mon, Oct 19, 2015 at 07:40:13AM -0700, Zhangqing Luo wrote:
> So every time blk_mq_freeze_queue_start, it runs in this way
>
> blk_mq_freeze_queue_start
> ->percpu_ref_kill->percpu_ref_kill_and_confirm
>
for_each_child_of_node performs an of_node_get on each iteration, so
a break out of the loop requires an of_node_put.
A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):
//
@@
expression root,e;
local idexpression child;
@@
On 22 October 2015 at 02:54, Rafael J. Wysocki wrote:
> On Tuesday, October 20, 2015 06:21:55 PM Tomeu Vizoso wrote:
>> On 20 October 2015 at 18:04, Alan Stern wrote:
>> > On Tue, 20 Oct 2015, Mark Brown wrote:
>> >
>> >> On Tue, Oct 20, 2015 at 10:40:03AM -0400, Alan Stern wrote:
>> >>
>> >> >
The various for_each device_node iterators performs an of_node_get on each
iteration, so a break out of the loop requires an of_node_put.
The complete semantic patch that fixes this problem is
(http://coccinelle.lip6.fr):
//
@r@
local idexpression n;
expression e1,e2;
iterator name
If the number of destination speific parameters supplied is 0 the call
will fail. If the first destination specific parameter does not have a
value, curr_id will be set to 0.
Signed-off-by: Robert Dolca
---
net/nfc/nci/core.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff
for_each_matching_node performs an of_node_get on each iteration, so
a break out of the loop requires an of_node_put.
A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):
//
@@
local idexpression n;
expression e;
identifier l;
@@
Fields Peak complies with the ISO/IEC 14443A/B, 15693, 18092,
and JIS X 6319-4. It is an NCI based controller.
RF Protocols supported:
- NFC Forum Type 1 Tags (Jewel, Topaz)
- NFC Forum Type 2 Tags (Mifare UL)
- NFC Forum Type 3 Tags (FeliCa)
- NFC Forum Type 4A (ISO/IEC 14443 A-4 106kbps to
This functin takes as a parameter a pointer to the nci_dev struct and
the first byte from the values of the first domain specific parameter that
was used for the connection creation.
Signed-off-by: Robert Dolca
---
include/net/nfc/nci_core.h | 1 +
net/nfc/nci/core.c | 13 +
Add NCI_OP_CORE_GET_CONFIG_CMD, NCI_OP_CORE_GET_CONFIG_RSP
and NCI_OP_CORE_RESET_NTF.
Signed-off-by: Robert Dolca
---
include/net/nfc/nci.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/net/nfc/nci.h b/include/net/nfc/nci.h
index 75d2e18..b495825 100644
---
The driver should know that it can continue with post setup where
setup left off. Being able to execute post_setup when setup fails may
force the developer to keep this state in the driver.
Signed-off-by: Robert Dolca
---
net/nfc/nci/core.c | 3 +--
1 file changed, 1 insertion(+), 2
On Thu, Oct 22, 2015 at 08:35:51AM +0800, kernel test robot wrote:
> FYI, we noticed the below changes on
>
> https://github.com/0day-ci/linux
> Borislav-Petkov/x86-Kill-notsc/20151018-222323
> commit 0941ca402ab984dbc24d27df4def1a0aa4f082b1 ("x86: Kill notsc")
Thanks for the report, already
On Wed 21-10-15 14:49:54, Johannes Weiner wrote:
> memory.current on the root level doesn't add anything that wouldn't be
> more accurate and detailed using system statistics. It already doesn't
> include slabs, and it'll be a pain to keep in sync when further memory
> types are accounted in the
This patch add runtime_suspend and runtime_resume for
sdhci-of-arasan. Currently we also power-off phy at
runtime_suspend for power-saving.
Signed-off-by: Shawn Lin
Serise-changes: 4
- remove ifdef for PM callback statement
- fix missing pm_runtime_set_active
- remove
Hi,
On 22-10-15 09:58, Jean-Francois Moine wrote:
On Wed, 21 Oct 2015 21:18:45 +0200
Hans de Goede wrote:
Great to see that you've started working on this again. Last weekend I
ended up working on this too together with Reinder E.N. de Haan
(added to the Cc).
We took a slightly different
This patch adds Generic PHY access for sdhci-of-arasan. Driver
can get PHY handler from dt-binding, and power-on/init the PHY.
Also we add pm ops for PHY here if CONFIG_PM_SLEEP is enabled.
Currently, it's just mandatory for arasan,sdhci-5.1.
Signed-off-by: Shawn Lin
Serise-changes: 4
- remove
Hi everyone,
I might be missing something, but why is the PL* GPIO bank not declared here?
Dne středa 21. října 2015 18:30:50 UTC+2 Jens Kuske napsal(a):
> The H3 uses the same pin controller as previous SoC's from Allwinner.
> Add support for the pins controlled by the main PIO controller.
>
This patch adds phys and phy-names for sdhci-of-arasan as required
properties for arasan,sdhci-5.1, and details the example as well.
Signed-off-by: Shawn Lin
---
Changes in v2:
- Keep phy as a mandatory requirement for arasan,sdhci-5.1
.../devicetree/bindings/mmc/arasan,sdhci.txt |
On Wed, Oct 21, 2015 at 02:19:49PM -0700, Alexei Starovoitov wrote:
> >Urgh, that's still horridly inconsistent. Can we please come up with a
> >consistent interface to perf?
> My suggestion was to do ioctl(enable/disable) of events from userspace
> after receiving notification from kernel via
On 21 October 2015 at 23:50, Frank Rowand wrote:
> On 10/21/2015 2:12 PM, Rob Herring wrote:
>> On Wed, Oct 21, 2015 at 1:18 PM, Frank Rowand wrote:
>>> On 10/21/2015 9:27 AM, Mark Brown wrote:
On Wed, Oct 21, 2015 at 08:59:51AM -0700, Frank Rowand wrote:
> On 10/19/2015 5:34 AM, Tomeu
Hi,
On Thu, Oct 22, 2015 at 10:25:28AM +0900, Krzysztof Kozlowski wrote:
> SRAM bindings for various SoCs, using the mmio-sram genalloc
> API, are spread over different places - per SoC vendor. Since all of
> these are quite similar (they depend on mmio-sram) move them to a common
> place.
>
>
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