Re: [PATCH 0/2] microcode: Do early microcode application during resume-from-RAM

Boris, On Mon, Jun 12, 2017 at 07:58:52PM +0200, Borislav Petkov wrote: > From: Borislav Petkov > > Ok, > > I think I've dreamt of a simple solution to the early microcode > application deal with suspend-to-RAM. The commit message of patch 2 > should explain it in more detail.

Re: [PATCH 0/2] microcode: Do early microcode application during resume-from-RAM

Boris, On Mon, Jun 12, 2017 at 07:58:52PM +0200, Borislav Petkov wrote: > From: Borislav Petkov > > Ok, > > I think I've dreamt of a simple solution to the early microcode > application deal with suspend-to-RAM. The commit message of patch 2 > should explain it in more detail. Patch 1 is a fix

Re: [PATCH v2 0/8] ACPI / PM: Suspend-to-idle rework to deal with spurious ACPI wakeups

Rafael, On Mon, Jun 12, 2017 at 10:46:47PM +0200, Rafael J. Wysocki wrote: > Hi All, > > On Thursday, June 08, 2017 02:00:40 AM Rafael J. Wysocki wrote: > > Hi All, > > > > This series is a replacement for commit eed4d47efe95 (ACPI / sleep: Ignore > > spurious SCI wakeups from suspend-to-idle)

Re: [PATCH v2 0/8] ACPI / PM: Suspend-to-idle rework to deal with spurious ACPI wakeups

Rafael, On Mon, Jun 12, 2017 at 10:46:47PM +0200, Rafael J. Wysocki wrote: > Hi All, > > On Thursday, June 08, 2017 02:00:40 AM Rafael J. Wysocki wrote: > > Hi All, > > > > This series is a replacement for commit eed4d47efe95 (ACPI / sleep: Ignore > > spurious SCI wakeups from suspend-to-idle)

Re: brcmfmac: Fix kernel oops on resume when request firmware fails.

Enric Balletbo i Serra wrote: > When request firmware fails, brcmf_ops_sdio_remove is being called and > brcmf_bus freed. In such circumstancies if you do a suspend/resume cycle > the kernel hangs on resume due a NULL pointer dereference in resume > function. > >

Re: brcmfmac: Fix kernel oops on resume when request firmware fails.

Enric Balletbo i Serra wrote: > When request firmware fails, brcmf_ops_sdio_remove is being called and > brcmf_bus freed. In such circumstancies if you do a suspend/resume cycle > the kernel hangs on resume due a NULL pointer dereference in resume > function. > > Steps to reproduce the problem:

Re: [PATCH 10/10] Staging: rtl8712: ieee80211: fixed coding style issue

On Tue, Jun 13, 2017 at 10:47:58AM +0530, R Jayadurga wrote: > This e-mail is for the sole use of the intended recipient(s) and may > contain confidential and privileged information. If you are not the > intended recipient, please contact the sender by reply e-mail and destroy > all copies and the

Re: [PATCH 10/10] Staging: rtl8712: ieee80211: fixed coding style issue

On Tue, Jun 13, 2017 at 10:47:58AM +0530, R Jayadurga wrote: > This e-mail is for the sole use of the intended recipient(s) and may > contain confidential and privileged information. If you are not the > intended recipient, please contact the sender by reply e-mail and destroy > all copies and the

Re: [PATCH v2 1/1] PCI: imx6: Add pcie compliance test option

On Tuesday, June 13, 2017 2:00:16 AM CEST Richard Zhu wrote: > > -Original Message- > > From: Bjorn Helgaas [mailto:helg...@kernel.org] > > Sent: Tuesday, June 13, 2017 7:49 AM > > To: Stefan Schoefegger > > Cc: linux-...@vger.kernel.org; Richard Zhu

Re: [PATCH v2 1/1] PCI: imx6: Add pcie compliance test option

On Tuesday, June 13, 2017 2:00:16 AM CEST Richard Zhu wrote: > > -Original Message- > > From: Bjorn Helgaas [mailto:helg...@kernel.org] > > Sent: Tuesday, June 13, 2017 7:49 AM > > To: Stefan Schoefegger > > Cc: linux-...@vger.kernel.org; Richard Zhu ; Arnd > > Bergmann ; open list ; > >

[PATCH v2 3/3] staging: rtl8188eu: Shorten lines over 80 chars

Shorten lines over 80 chars Signed-off-by: Aviya Erenfeld --- drivers/staging/rtl8188eu/core/rtw_sta_mgt.c | 58 +++- 1 file changed, 39 insertions(+), 19 deletions(-) diff --git a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c

[PATCH v2 3/3] staging: rtl8188eu: Shorten lines over 80 chars

Shorten lines over 80 chars Signed-off-by: Aviya Erenfeld --- drivers/staging/rtl8188eu/core/rtw_sta_mgt.c | 58 +++- 1 file changed, 39 insertions(+), 19 deletions(-) diff --git a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c

[PATCH v2 2/3] staging: rtl8188eu: Remove unneeded blank lines

Remove unneeded blank lines Signed-off-by: Aviya Erenfeld --- drivers/staging/rtl8188eu/core/rtw_sta_mgt.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c b/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c index

[PATCH v2 2/3] staging: rtl8188eu: Remove unneeded blank lines

Remove unneeded blank lines Signed-off-by: Aviya Erenfeld --- drivers/staging/rtl8188eu/core/rtw_sta_mgt.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c b/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c index c6a7df5..cd348ca 100644 ---

答复: [PATCH v3] mmc: dw_mmc-k3: add sd support for hi3660

Hi, Jaehoon Thank you very much for your advices; I'll follow your advices and fix all the other places but except for the following one: "You have assumption...always. mshc0 -> eMMC, mshc1 -> SD mshc2 -> SDIO" yes, mshc0 -> eMMC, mshc1 -> SD,mshc2 -> SDIO. Can you point it out in detail?

答复: [PATCH v3] mmc: dw_mmc-k3: add sd support for hi3660

Hi, Jaehoon Thank you very much for your advices; I'll follow your advices and fix all the other places but except for the following one: "You have assumption...always. mshc0 -> eMMC, mshc1 -> SD mshc2 -> SDIO" yes, mshc0 -> eMMC, mshc1 -> SD,mshc2 -> SDIO. Can you point it out in detail?

[PATCH v2 1/3] staging: rtl8188eu: Remove redundant parenthesis

Remove redundant parenthesis Signed-off-by: Aviya Erenfeld --- drivers/staging/rtl8188eu/core/rtw_sta_mgt.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c

[PATCH v2 1/3] staging: rtl8188eu: Remove redundant parenthesis

Remove redundant parenthesis Signed-off-by: Aviya Erenfeld --- drivers/staging/rtl8188eu/core/rtw_sta_mgt.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c b/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c

[PATCH v2 0/3] Fix some style issues

Fix some of the issues that checkpatch complains on like redundant parenthesis, redundant blank lines and lines over 80 chars. Aviya Erenfeld (3): staging: rtl8188eu: Remove redundant parenthesis staging: rtl8188eu: Remove unneeded blank lines staging: rtl8188eu: Shorten lines over 80 chars

[PATCH v2 0/3] Fix some style issues

Fix some of the issues that checkpatch complains on like redundant parenthesis, redundant blank lines and lines over 80 chars. Aviya Erenfeld (3): staging: rtl8188eu: Remove redundant parenthesis staging: rtl8188eu: Remove unneeded blank lines staging: rtl8188eu: Shorten lines over 80 chars

Re: [PATCH v2 1/1] PCI: imx6: Add pcie compliance test option

On Monday, June 12, 2017 6:49:24 PM CEST Bjorn Helgaas wrote: > On Wed, Jun 07, 2017 at 01:36:11PM +0200, Stefan Schoefegger wrote: > > Link speed must not be limited to gen1 during link test for compliance > > tests > > > > Signed-off-by: Stefan Schoefegger > >

Re: [PATCH v2 1/1] PCI: imx6: Add pcie compliance test option

On Monday, June 12, 2017 6:49:24 PM CEST Bjorn Helgaas wrote: > On Wed, Jun 07, 2017 at 01:36:11PM +0200, Stefan Schoefegger wrote: > > Link speed must not be limited to gen1 during link test for compliance > > tests > > > > Signed-off-by: Stefan Schoefegger > > --- > > > > Changes since v1: >

Re: [PATCH v3 1/2] PCI: iproc: Retry request when CRS returned from EP

On Tue, Jun 13, 2017 at 9:58 AM, Oza Oza wrote: > On Tue, Jun 13, 2017 at 5:00 AM, Bjorn Helgaas wrote: >> Please wrap your changelogs to use 75 columns. "git log" indents the >> changelog by four spaces, so if your text is 75 wide, it will still >> fit

Re: [PATCH v3 1/2] PCI: iproc: Retry request when CRS returned from EP

On Tue, Jun 13, 2017 at 9:58 AM, Oza Oza wrote: > On Tue, Jun 13, 2017 at 5:00 AM, Bjorn Helgaas wrote: >> Please wrap your changelogs to use 75 columns. "git log" indents the >> changelog by four spaces, so if your text is 75 wide, it will still >> fit without wrapping. >> >> On Sun, Jun 11,

Re: [PATCH v2 0/15] [dt-bindings] [media] Add document file and driver for Sony CXD2880 DVB-T2/T tuner + demodulator

Dear Takiguchi, Roger that. Thanks for explanation ! 2017-06-13 1:35 GMT-04:00 Takiguchi, Yasunari : > Dear Abylay Ospan > > Thank you for your review and proposal. > > Unfortunately, we supposed it's difficult to cover CXD2841 functionality by > CXD2880 driver. >

Re: [PATCH v2 0/15] [dt-bindings] [media] Add document file and driver for Sony CXD2880 DVB-T2/T tuner + demodulator

Dear Takiguchi, Roger that. Thanks for explanation ! 2017-06-13 1:35 GMT-04:00 Takiguchi, Yasunari : > Dear Abylay Ospan > > Thank you for your review and proposal. > > Unfortunately, we supposed it's difficult to cover CXD2841 functionality by > CXD2880 driver. > CXD2880 is for mobile IC,

Re: [PATCH v2 0/15] [dt-bindings] [media] Add document file and driver for Sony CXD2880 DVB-T2/T tuner + demodulator

Dear Abylay Ospan Thank you for your review and proposal. Unfortunately, we supposed it's difficult to cover CXD2841 functionality by CXD2880 driver. CXD2880 is for mobile IC, tuner (RF) and demodulator convined IC. On the other hand, CXD2841 is demodulator only IC for stationary use. CXD2841

Re: [PATCH v2 0/15] [dt-bindings] [media] Add document file and driver for Sony CXD2880 DVB-T2/T tuner + demodulator

Dear Abylay Ospan Thank you for your review and proposal. Unfortunately, we supposed it's difficult to cover CXD2841 functionality by CXD2880 driver. CXD2880 is for mobile IC, tuner (RF) and demodulator convined IC. On the other hand, CXD2841 is demodulator only IC for stationary use. CXD2841

Re: [Patch v4 00/12] Add MFC v10.10 support

On Fri, 2017-06-09 at 19:36 +0200, Sylwester Nawrocki wrote: > On 04/06/2017 08:11 AM, Smitha T Murthy wrote: > > This patch series adds MFC v10.10 support. MFC v10.10 is used in some > > of Exynos7 variants. > > > > This adds support for following: > > > > * Add support for HEVC encoder and

Re: [Patch v4 00/12] Add MFC v10.10 support

On Fri, 2017-06-09 at 19:36 +0200, Sylwester Nawrocki wrote: > On 04/06/2017 08:11 AM, Smitha T Murthy wrote: > > This patch series adds MFC v10.10 support. MFC v10.10 is used in some > > of Exynos7 variants. > > > > This adds support for following: > > > > * Add support for HEVC encoder and

[QUESTION] v4.12-rc5 BFQ enabled but unavailable?

Hello LKML, Attempted to play with BFQ but after building with CONFIG_IOSCHED_BFQ=y I'm still not seeing it: # cat /sys/devices/pci:00/:00:1f.2/ata1/host0/target0:0:0/0:0:0:0/block/sda/queue/scheduler noop deadline [cfq] # Even though: # dmesg | grep sched [0.514536] io

[QUESTION] v4.12-rc5 BFQ enabled but unavailable?

Hello LKML, Attempted to play with BFQ but after building with CONFIG_IOSCHED_BFQ=y I'm still not seeing it: # cat /sys/devices/pci:00/:00:1f.2/ata1/host0/target0:0:0/0:0:0:0/block/sda/queue/scheduler noop deadline [cfq] # Even though: # dmesg | grep sched [0.514536] io

Re: Subject: linux-next: build failure after merge of the sound-current tree

On Tue, 13 Jun 2017 01:49:45 +0200, Stephen Rothwell wrote: > > Hi Takashi, > > After merging the sound-current tree, today's linux-next build (x86_64 > allmodconfig) failed like this: > > sound/synth/emux/emux.c: In function 'snd_emux_new': > sound/synth/emux/emux.c:51:5: error: 'struct

Re: Subject: linux-next: build failure after merge of the sound-current tree

On Tue, 13 Jun 2017 01:49:45 +0200, Stephen Rothwell wrote: > > Hi Takashi, > > After merging the sound-current tree, today's linux-next build (x86_64 > allmodconfig) failed like this: > > sound/synth/emux/emux.c: In function 'snd_emux_new': > sound/synth/emux/emux.c:51:5: error: 'struct

Re: [PATCH linux-next v4 2/4] spi: imx: add selection for iMX53 and iMX6 controller

Hello Rob On 06/13/2017 12:53 AM, Rob Herring wrote: On Thu, Jun 08, 2017 at 02:16:01PM +0900, Jiada Wang wrote: ECSPI contorller for iMX53 and iMX6 has few hardware issues comparing to iMX51. The change add possibility to detect which controller is used to apply possible workaround and

Re: [PATCH linux-next v4 2/4] spi: imx: add selection for iMX53 and iMX6 controller

Hello Rob On 06/13/2017 12:53 AM, Rob Herring wrote: On Thu, Jun 08, 2017 at 02:16:01PM +0900, Jiada Wang wrote: ECSPI contorller for iMX53 and iMX6 has few hardware issues comparing to iMX51. The change add possibility to detect which controller is used to apply possible workaround and

[PATCH v2 4/4] arm64: dts: rockchip: use cs-gpios for cros_ec_spi

The cros_ec requires CS line to be active after last message. But the CS would be toggled when powering off/on rockchip spi, which breaks ec xfer. Use GPIO CS to prevent that. Signed-off-by: Jeffy Chen --- Changes in v2: Fix wrong pinconf for spi5_cs0.

[PATCH v2 4/4] arm64: dts: rockchip: use cs-gpios for cros_ec_spi

The cros_ec requires CS line to be active after last message. But the CS would be toggled when powering off/on rockchip spi, which breaks ec xfer. Use GPIO CS to prevent that. Signed-off-by: Jeffy Chen --- Changes in v2: Fix wrong pinconf for spi5_cs0.

[PATCH v2 3/4] dt-bindings: spi/rockchip: add "cs-gpios" optional property

Update document devicetree bindings to support "cs-gpios" property. Signed-off-by: Jeffy Chen --- Changes in v2: None Documentation/devicetree/bindings/spi/spi-rockchip.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH v2 2/4] spi: rockchip: add support for "cs-gpios" dts property

Support using "cs-gpios" property to specify cs gpios. Signed-off-by: Jeffy Chen 1/ request cs gpios in probe for better error handling 2/ use gpiod* function (suggested by Heiko Stuebner) 3/ split dt-binding changes to new patch (suggested by Shawn Lin & Heiko

[PATCH v2 3/4] dt-bindings: spi/rockchip: add "cs-gpios" optional property

Update document devicetree bindings to support "cs-gpios" property. Signed-off-by: Jeffy Chen --- Changes in v2: None Documentation/devicetree/bindings/spi/spi-rockchip.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.txt

[PATCH v2 2/4] spi: rockchip: add support for "cs-gpios" dts property

Support using "cs-gpios" property to specify cs gpios. Signed-off-by: Jeffy Chen 1/ request cs gpios in probe for better error handling 2/ use gpiod* function (suggested by Heiko Stuebner) 3/ split dt-binding changes to new patch (suggested by Shawn Lin & Heiko Stuebner) --- Changes in v2:

[PATCH v2 1/4] spi: rockchip: fix error handling when probe

After failed to request dma tx chain, we need to disable pm_runtime. Also cleanup error labels for better readability. Signed-off-by: Jeffy Chen --- Changes in v2: None drivers/spi/spi-rockchip.c | 27 ++- 1 file changed, 14 insertions(+), 13

[PATCH v2 1/4] spi: rockchip: fix error handling when probe

After failed to request dma tx chain, we need to disable pm_runtime. Also cleanup error labels for better readability. Signed-off-by: Jeffy Chen --- Changes in v2: None drivers/spi/spi-rockchip.c | 27 ++- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git

Re: [PATCH v6 4/6] clk: qcom: Add ipq8074 Global Clock Controller support

Stephen, On 6/9/2017 3:11 PM, Varadarajan Narayanan wrote: From: Abhishek Sahu This patch adds support for the global clock controller found on the ipq8074 based devices. This includes UART, I2C, SPI etc. Signed-off-by: Abhishek Sahu

Re: [PATCH v6 4/6] clk: qcom: Add ipq8074 Global Clock Controller support

Stephen, On 6/9/2017 3:11 PM, Varadarajan Narayanan wrote: From: Abhishek Sahu This patch adds support for the global clock controller found on the ipq8074 based devices. This includes UART, I2C, SPI etc. Signed-off-by: Abhishek Sahu Signed-off-by: Varadarajan Narayanan ---

Re: [PATCH v6 1/6] pinctrl: qcom: Add ipq8074 pinctrl driver

Bjorn, On 6/9/2017 3:11 PM, Varadarajan Narayanan wrote: Add initial pinctrl driver to support pin configuration with pinctrl framework for ipq8074. Acked-by: Rob Herring (bindings) Signed-off-by: Manoharan Vijaya Raghavan Signed-off-by: Varadarajan

Re: [PATCH v6 1/6] pinctrl: qcom: Add ipq8074 pinctrl driver

Bjorn, On 6/9/2017 3:11 PM, Varadarajan Narayanan wrote: Add initial pinctrl driver to support pin configuration with pinctrl framework for ipq8074. Acked-by: Rob Herring (bindings) Signed-off-by: Manoharan Vijaya Raghavan Signed-off-by: Varadarajan Narayanan ---

Re: posix timer: general protection fault in cleanup_timers

On Tue, Jun 13, 2017 at 4:27 AM, wrote: > Update: got another reproducible KASAN report on commit > 32c1431eea4881a6b17bd7c639315010aeefa452(4.12-rc5) : Hi, If it's reproducible, please provide the reproducer. >

Re: posix timer: general protection fault in cleanup_timers

On Tue, Jun 13, 2017 at 4:27 AM, wrote: > Update: got another reproducible KASAN report on commit > 32c1431eea4881a6b17bd7c639315010aeefa452(4.12-rc5) : Hi, If it's reproducible, please provide the reproducer. > == > BUG:

[PATCH v6 12/18] mtd: nand: denali: use flag instead of register macro for direction

It is not a good idea to re-use macros that represent a specific register bit field for the transfer direction. It is true that bit 8 indicates the direction for the MAP10 pipeline operation and the data DMA operation, but this is not valid across the IP. Use a simple flag (write: 1, read: 0)

[PATCH v6 10/18] mtd: nand: denali: propagate page to helpers via function argument

This driver stores the currently addressed page into denali->page, which is later read out by helper functions. While I am tackling on this driver, I often missed to insert "denali->page = page;" where needed. This makes page_read/write callbacks to get access to a wrong page, which is a bug

[PATCH v6 12/18] mtd: nand: denali: use flag instead of register macro for direction

It is not a good idea to re-use macros that represent a specific register bit field for the transfer direction. It is true that bit 8 indicates the direction for the MAP10 pipeline operation and the data DMA operation, but this is not valid across the IP. Use a simple flag (write: 1, read: 0)

[PATCH v6 10/18] mtd: nand: denali: propagate page to helpers via function argument

This driver stores the currently addressed page into denali->page, which is later read out by helper functions. While I am tackling on this driver, I often missed to insert "denali->page = page;" where needed. This makes page_read/write callbacks to get access to a wrong page, which is a bug

[PATCH v6 04/18] mtd: nand: denali: rework interrupt handling

Simplify the interrupt handling and fix issues: - The register field view of INTR_EN / INTR_STATUS is different among IP versions. The global macro DENALI_IRQ_ALL is hard-coded for Intel platforms. The interrupt mask should be determined at run-time depending on the running platform. -

[PATCH v6 04/18] mtd: nand: denali: rework interrupt handling

Simplify the interrupt handling and fix issues: - The register field view of INTR_EN / INTR_STATUS is different among IP versions. The global macro DENALI_IRQ_ALL is hard-coded for Intel platforms. The interrupt mask should be determined at run-time depending on the running platform. -

[PATCH] power: supply: constify psy_tcd_ops.

File size before: textdatabss dec hex filename 4240 200 80 4520 11a8 drivers/power/supply/power_supply_core.o File size After adding 'const': textdatabss dec hex filename 4296 136 80 4512 11a0 drivers/power/supply/power_supply_core.o

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote: > +Example: > + > +ptp_dte: ptp_dte@180af650 { > + compatible = "brcm,ptp-dte"; > + reg = <0x180af650 0x10>; > + status = "okay"; > +}; This patch set looks okay, as far as it goes, but how does one actually use the

[PATCH] power: supply: constify psy_tcd_ops.

File size before: textdatabss dec hex filename 4240 200 80 4520 11a8 drivers/power/supply/power_supply_core.o File size After adding 'const': textdatabss dec hex filename 4296 136 80 4512 11a0 drivers/power/supply/power_supply_core.o

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote: > +Example: > + > +ptp_dte: ptp_dte@180af650 { > + compatible = "brcm,ptp-dte"; > + reg = <0x180af650 0x10>; > + status = "okay"; > +}; This patch set looks okay, as far as it goes, but how does one actually use the

[PATCH v6 07/18] mtd: nand: denali: switch over to cmd_ctrl instead of cmdfunc

The NAND_CMD_SET_FEATURES support is missing from denali_cmdfunc(). Besides, we see /* TODO: Read OOB data */ comment line. It would be possible to add more commands along with the current implementation, but having ->cmd_ctrl() seems a better approach from the discussion with Boris [1]. Rely

[PATCH v6 07/18] mtd: nand: denali: switch over to cmd_ctrl instead of cmdfunc

The NAND_CMD_SET_FEATURES support is missing from denali_cmdfunc(). Besides, we see /* TODO: Read OOB data */ comment line. It would be possible to add more commands along with the current implementation, but having ->cmd_ctrl() seems a better approach from the discussion with Boris [1]. Rely

[PATCH v6 09/18] mtd: nand: denali: use interrupt instead of polling for bank reset

The current bank reset implementation polls the INTR_STATUS register until interested bits are set. This is not good because: - polling simply wastes time-slice of the thread - The while() loop may continue eternally if no bit is set, for example, due to the controller problem. The

[PATCH v6 09/18] mtd: nand: denali: use interrupt instead of polling for bank reset

The current bank reset implementation polls the INTR_STATUS register until interested bits are set. This is not good because: - polling simply wastes time-slice of the thread - The while() loop may continue eternally if no bit is set, for example, due to the controller problem. The

[PATCH v6 03/18] mtd: nand: denali: handle timing parameters by setup_data_interface()

Handling timing parameters in a driver's own way should be avoided because it duplicates efforts of drivers/mtd/nand/nand_timings.c Besides, this driver hard-codes Intel specific parameters such as CLK_X=5, CLK_MULTI=4. Taking a certain device (Samsung K9WAG08U1A) into account by

[PATCH v6 03/18] mtd: nand: denali: handle timing parameters by setup_data_interface()

Handling timing parameters in a driver's own way should be avoided because it duplicates efforts of drivers/mtd/nand/nand_timings.c Besides, this driver hard-codes Intel specific parameters such as CLK_X=5, CLK_MULTI=4. Taking a certain device (Samsung K9WAG08U1A) into account by

[PATCH v6 02/18] mtd: nand: denali: remove unneeded find_valid_banks()

The function find_valid_banks() issues the Read ID (0x90) command, then compares the first byte (Manufacturer ID) of each bank with the one of bank0. This is equivalent to what nand_scan_ident() does. The number of chips is detected there, so this is unneeded. What is worse for

[PATCH v6 02/18] mtd: nand: denali: remove unneeded find_valid_banks()

The function find_valid_banks() issues the Read ID (0x90) command, then compares the first byte (Manufacturer ID) of each bank with the one of bank0. This is equivalent to what nand_scan_ident() does. The number of chips is detected there, so this is unneeded. What is worse for

[PATCH v6 06/18] mtd: nand: denali: fix NAND_CMD_PARAM handling

NAND_CMD_PARAM is not working at all due to multiple bugs. [1] The command 0x90 issued instead of 0xec The command code 0x90 is hard-code as index_addr(denali, addr | 0, 0x90) So, Read ID (0x90) command is sent to the device instead of Read Parameter Page (0xec). [2] only first 8 bytes are

[PATCH v6 06/18] mtd: nand: denali: fix NAND_CMD_PARAM handling

NAND_CMD_PARAM is not working at all due to multiple bugs. [1] The command 0x90 issued instead of 0xec The command code 0x90 is hard-code as index_addr(denali, addr | 0, 0x90) So, Read ID (0x90) command is sent to the device instead of Read Parameter Page (0xec). [2] only first 8 bytes are

[PATCH v6 18/18] mtd: nand: denali: avoid magic numbers and rename for clarification

Introduce some macros and helpers to avoid magic numbers and rename macros/functions for clarification. - We see '| 2' in several places. This means Data Cycle in MAP11 mode. The Denali User's Guide says bit[1:0] of MAP11 is like follows: b'00 = Command Cycle b'01 = Address Cycle b'10 =

[PATCH v6 14/18] mtd: nand: denali: support hardware-assisted erased page detection

Recent versions of this IP support automatic erased page detection. If an erased page is detected on reads, the controller does not set INTR__ECC_UNCOR_ERR, but INTR__ERASED_PAGE. The detection of erased pages is based on the number of zeros in a page; if the number of zeros is less than the

[PATCH v6 14/18] mtd: nand: denali: support hardware-assisted erased page detection

Recent versions of this IP support automatic erased page detection. If an erased page is detected on reads, the controller does not set INTR__ECC_UNCOR_ERR, but INTR__ERASED_PAGE. The detection of erased pages is based on the number of zeros in a page; if the number of zeros is less than the

[PATCH v6 18/18] mtd: nand: denali: avoid magic numbers and rename for clarification

Introduce some macros and helpers to avoid magic numbers and rename macros/functions for clarification. - We see '| 2' in several places. This means Data Cycle in MAP11 mode. The Denali User's Guide says bit[1:0] of MAP11 is like follows: b'00 = Command Cycle b'01 = Address Cycle b'10 =

[PATCH v6 16/18] mtd: nand: denali: use non-managed kmalloc() for DMA buffer

As Russell and Lars stated in the discussion [1], using devm_k*alloc() with DMA is not a good idea. Let's use kmalloc (not kzalloc because no need for zero-out). Also, allocate the buffer as late as possible because it must be freed for any error that follows. [1]

[PATCH v6 16/18] mtd: nand: denali: use non-managed kmalloc() for DMA buffer

As Russell and Lars stated in the discussion [1], using devm_k*alloc() with DMA is not a good idea. Let's use kmalloc (not kzalloc because no need for zero-out). Also, allocate the buffer as late as possible because it must be freed for any error that follows. [1]

[PATCH v6 08/18] mtd: nand: denali: fix bank reset function to detect the number of chips

The nand_scan_ident() iterates over maxchips, and calls nand_reset() for each. This driver currently passes the maximum number of banks (=chip selects) supported by the controller as maxchips. So, maxchips is typically 4 or 8. Usually, less number of NAND chips are connected to the controller.

[PATCH v6 00/18] mtd: nand: denali: Denali NAND IP patch bomb

This patch series intends to solve various problems. [1] The driver just retrieves the OOB area as-is whereas the controller uses syndrome page layout. [2] ONFi devices are not working [3] It can not read Bad Block Marker Outstanding changes are: - Fix raw/oob callbacks for syndrome page

[PATCH v6 15/18] mtd: nand: denali: skip driver internal bounce buffer when possible

For ecc->read_page() and ecc->write_page(), it is possible to call dma_map_single() against the given buffer. This bypasses the driver internal bounce buffer and save the memcpy(). Signed-off-by: Masahiro Yamada --- Changes in v6: None Changes in v5: None Changes

[PATCH v6 05/18] mtd: nand: denali: fix NAND_CMD_STATUS handling

The current NAND_CMD_STATUS handling is weird; it just reads the WRITE_PROTECT register, and returns NAND_STATUS_WP if it is set. It does not send Read Status (0x70) command, so it is not helpful for checking the current device status. Signed-off-by: Masahiro Yamada

[PATCH v6 01/18] mtd: nand: denali: set NAND_ECC_CUSTOM_PAGE_ACCESS

The denali_cmdfunc() actually does nothing valuable for NAND_CMD_{PAGEPROG,READ0,SEQIN}. For NAND_CMD_{READ0,SEQIN}, it copies "page" to "denali->page", then denali_read_page(_raw) compares them just for the sanity check. (Inconsistently, this check is missing from denali_write_page(_raw).) The

[PATCH v6 08/18] mtd: nand: denali: fix bank reset function to detect the number of chips

The nand_scan_ident() iterates over maxchips, and calls nand_reset() for each. This driver currently passes the maximum number of banks (=chip selects) supported by the controller as maxchips. So, maxchips is typically 4 or 8. Usually, less number of NAND chips are connected to the controller.

[PATCH v6 00/18] mtd: nand: denali: Denali NAND IP patch bomb

This patch series intends to solve various problems. [1] The driver just retrieves the OOB area as-is whereas the controller uses syndrome page layout. [2] ONFi devices are not working [3] It can not read Bad Block Marker Outstanding changes are: - Fix raw/oob callbacks for syndrome page

[PATCH v6 15/18] mtd: nand: denali: skip driver internal bounce buffer when possible

For ecc->read_page() and ecc->write_page(), it is possible to call dma_map_single() against the given buffer. This bypasses the driver internal bounce buffer and save the memcpy(). Signed-off-by: Masahiro Yamada --- Changes in v6: None Changes in v5: None Changes in v4: - Remove

[PATCH v6 05/18] mtd: nand: denali: fix NAND_CMD_STATUS handling

The current NAND_CMD_STATUS handling is weird; it just reads the WRITE_PROTECT register, and returns NAND_STATUS_WP if it is set. It does not send Read Status (0x70) command, so it is not helpful for checking the current device status. Signed-off-by: Masahiro Yamada --- Changes in v6: None

[PATCH v6 01/18] mtd: nand: denali: set NAND_ECC_CUSTOM_PAGE_ACCESS

The denali_cmdfunc() actually does nothing valuable for NAND_CMD_{PAGEPROG,READ0,SEQIN}. For NAND_CMD_{READ0,SEQIN}, it copies "page" to "denali->page", then denali_read_page(_raw) compares them just for the sanity check. (Inconsistently, this check is missing from denali_write_page(_raw).) The

[PATCH v6 13/18] mtd: nand: denali: fix raw and oob accessors for syndrome page layout

The Denali IP adopts the syndrome page layout; payload and ECC are interleaved, with BBM area always placed at the beginning of OOB. The figure below shows the page organization for ecc->steps == 2: |||---| ||| | ||

[PATCH v6 11/18] mtd: nand: denali: merge struct nand_buf into struct denali_nand_info

Now struct nand_buf has only two members, so I see no reason for the separation. Signed-off-by: Masahiro Yamada --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 29

[PATCH v6 17/18] mtd: nand: denali: enable bad block table scan

Now this driver is ready to remove NAND_SKIP_BBTSCAN. The BBT descriptors in denali.c are equivalent to the ones in nand_bbt.c. There is no need to duplicate the equivalent structures. The with-oob decriptors do not work for this driver anyway. The bbt_pattern (offs = 8) and the version

[PATCH v6 11/18] mtd: nand: denali: merge struct nand_buf into struct denali_nand_info

Now struct nand_buf has only two members, so I see no reason for the separation. Signed-off-by: Masahiro Yamada --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 29 ++---

[PATCH v6 17/18] mtd: nand: denali: enable bad block table scan

Now this driver is ready to remove NAND_SKIP_BBTSCAN. The BBT descriptors in denali.c are equivalent to the ones in nand_bbt.c. There is no need to duplicate the equivalent structures. The with-oob decriptors do not work for this driver anyway. The bbt_pattern (offs = 8) and the version

[PATCH v6 13/18] mtd: nand: denali: fix raw and oob accessors for syndrome page layout

The Denali IP adopts the syndrome page layout; payload and ECC are interleaved, with BBM area always placed at the beginning of OOB. The figure below shows the page organization for ecc->steps == 2: |||---| ||| | ||

[PATCH V2] i2c: ismt: fix wrong device address when unmap the data buffer

From: Liwei Song Fix the following kernel bug: kernel BUG at drivers/iommu/intel-iommu.c:3260! invalid opcode: [#5] PREEMPT SMP Hardware name: Intel Corp. Harcuvar/Server, BIOS HAVLCRB0.X64.0013.D39.1608311820 08/31/2016 task: 880175389950 ti:

[PATCH V2] i2c: ismt: fix wrong device address when unmap the data buffer

From: Liwei Song Fix the following kernel bug: kernel BUG at drivers/iommu/intel-iommu.c:3260! invalid opcode: [#5] PREEMPT SMP Hardware name: Intel Corp. Harcuvar/Server, BIOS HAVLCRB0.X64.0013.D39.1608311820 08/31/2016 task: 880175389950 ti: 880176bec000 task.ti:

[PATCH v5] mfd: lp87565: Add lp87565 PMIC support

The LP87565 chip is a power management IC for Portable Navigation Systems and Tablet Computing devices. It contains the following components: - Configurable Bucks(Single and multi-phase). - Configurable General Purpose Output Signals (GPO). The LP87565-Q1 variant device uses two

[PATCH v5] mfd: lp87565: Add lp87565 PMIC support

The LP87565 chip is a power management IC for Portable Navigation Systems and Tablet Computing devices. It contains the following components: - Configurable Bucks(Single and multi-phase). - Configurable General Purpose Output Signals (GPO). The LP87565-Q1 variant device uses two

[PATCH] reset: zx2967: constify zx2967_reset_ops.

File size before: textdata bss dec hex filename 794 232 01026 402 drivers/reset/reset-zx2967.o File size After adding 'const': textdata bss dec hex filename 842 184 01026 402 drivers/reset/reset-zx2967.o

[PATCH] reset: zx2967: constify zx2967_reset_ops.

File size before: textdata bss dec hex filename 794 232 01026 402 drivers/reset/reset-zx2967.o File size After adding 'const': textdata bss dec hex filename 842 184 01026 402 drivers/reset/reset-zx2967.o

Re: [RFC PATCH 1/7 v1]powerpc: Free up four PTE bits to accommodate memory keys

Ram Pai writes: > Rearrange PTE bits to free up bits 3, 4, 5 and 6 for > memory keys. Bit 3, 4, 5, 6 and 57 shall be used for memory > keys. > > The patch does the following change to the 64K PTE format > > H_PAGE_BUSY moves from bit 3 to bit 7 > H_PAGE_F_SECOND

Re: [RFC PATCH 1/7 v1]powerpc: Free up four PTE bits to accommodate memory keys

Ram Pai writes: > Rearrange PTE bits to free up bits 3, 4, 5 and 6 for > memory keys. Bit 3, 4, 5, 6 and 57 shall be used for memory > keys. > > The patch does the following change to the 64K PTE format > > H_PAGE_BUSY moves from bit 3 to bit 7 > H_PAGE_F_SECOND which occupied bit 4

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