The comment "No QE ever has fewer than 28 SNUMs" is false; e.g. the
MPC8309 has 14. The code path returning -EINVAL is also a recipe for
instant disaster, since the caller (qe_snums_init) uncritically
assigns the return value to the unsigned qe_num_of_snum, and would
thus proceed to attempt to
This small series consists of some small cleanups and simplifications
of the QUICC engine driver, and introduces a new DT binding that makes
it much easier to support other variants of the QUICC engine IP block
that appears in the wild: There's no reason to expect in general that
the number of
On Fri, May 10, 2019 at 12:49:55PM -0700, Florian Fainelli wrote:
> On 5/6/19 12:25 AM, John Garry wrote:
> > On 03/05/2019 00:47, Florian Fainelli wrote:
> >> The Cortex-A57 and Cortex-A72 both support all ARMv8 recommended events
> >> up to the RC_ST_SPEC (0x91) event with the exception of:
> >>
syzbot's second top report is "no output from test machine" where the
userspace process failed to spawn a new test process for 300 seconds
for some reason. One of reasons which can result in this report is that
an already spawned test process was unable to terminate (e.g. trapped at
an unkillable
On Mon, May 13, 2019 at 03:54:11PM +0530, Viresh Kumar wrote:
> Currently the space for the array of virtual devices is allocated along
> with the OPP table, but that isn't going to work well from now onwards.
> For single power domain case, a driver can either use the original
> device structure
Hi George,
On Thu, May 9, 2019 at 4:44 PM George G. Davis wrote:
> As noted in commit 84b40e3b57ee ("serial: 8250: omap: Disable DMA for
> console UART"), UART console lines use low-level PIO only access functions
> which will conflict with use of the line when DMA is enabled, e.g. when
> the
On Mon, May 13, 2019 at 1:04 PM Viorel Suman wrote:
>
> snd_soc_component_update_bits() may return 1 if operation
> was successful and the value of the register changed.
> Return a non-zero in ak4458_rstn_control for an error only.
>
> Signed-off-by: Shengjiu Wang
> Signed-off-by: Viorel Suman
From: Tetsuo Handa
Date: Mon, May 13, 2019 at 1:04 PM
To: Andrew Morton
Cc: Ingo Molnar, Peter Zijlstra, Paul E. McKenney, Petr Mladek, Vitaly
Kuznetsov, Liu Chuansheng, Valdis Kletnieks,
, Tetsuo Handa, Dmitry Vyukov
> syzbot's second top report is "no output from test machine" where the
>
Hi,
On Sat, 2019-05-11 at 00:15 +0530, Manivannan Sadhasivam wrote:
> Hello,
>
> This patchset adds reset controller support for Bitmain BM1880 SoC.
> BM1880 SoC has only one reset controller and the reset-simple driver
> has been reused here.
>
> This patchset has been tested on 96Boards
On Mon, May 13, 2019 at 03:54:10PM +0530, Viresh Kumar wrote:
> The OPP core requires the virtual device pointers to set performance
> state on behalf of the device, for the multiple power domain case. The
> genpd API (dev_pm_domain_attach_by_name()) has evolved now to support
> even the single
On 13/05/2019 12:50, Andy Shevchenko wrote:
> On Mon, May 13, 2019 at 12:29:51PM +0200, Daniel Lezcano wrote:
>> Due to the complexity of the code and the difficulty to debug it,
>> let's add some selftests to the framework in order to spot issues or
>> regression at boot time when the runtime
On Tue, Jan 15, 2019 at 12:13 AM Matthias Kaehlcke wrote:
>
> The 8 CPU cores of the SDM845 are organized in two clusters of 4 big
> ("gold") and 4 little ("silver") cores. Add a cpu-map node to the DT
> that describes this topology.
This is partly true. There are two groups of gold and silver
Hi Igor
On Mon, 2019-05-06 at 11:51 +, Igor Opaniuk wrote:
> Hi Marcel,
>
> On Thu, Apr 25, 2019 at 11:47 AM Marcel Ziswiler
> wrote:
> > Hi Igor
> >
> > Sorry, for my late reply but this one got stuck in my private
> > email.
> >
> > On Thu, 2019-04-04 at 11:19 +0200, Igor Opaniuk wrote:
On Mon, May 13, 2019 at 12:29:51PM +0200, Daniel Lezcano wrote:
> Due to the complexity of the code and the difficulty to debug it,
> let's add some selftests to the framework in order to spot issues or
> regression at boot time when the runtime testing is enabled for this
> subsystem.
>
> This
On Mon, May 13, 2019 at 09:14:05AM +0200, Greg Kroah-Hartman wrote:
> On Mon, May 13, 2019 at 01:32:13PM +1000, Tobin C. Harding wrote:
> > If a call to kobject_init_and_add() fails we must call kobject_put()
> > otherwise we leak memory.
> >
> > Function always calls kobject_init_and_add() which
On Mon, May 13, 2019 at 03:56:15PM +0530, Vandana BN wrote:
> Resolve trailing whitespace error from checkpatch.pl
> ERROR: trailing whitespace
> ---
> v2-split changes to multiple patches
> v3 - edit commit message
> ---
>
> Signed-off-by: Vandana BN
> ---
The Signed off by has to be before
On 13/05/19 2:12 PM, Greg KH wrote:
> On Mon, May 13, 2019 at 05:09:54AM +0530, Vandana BN wrote:
>> This patch resolves below errors reported by checkpatch
>> ERROR: "(foo*)" should be "(foo *)"
>> ERROR: "foo * bar" should be "foo *bar"
>> ERROR: "foo __init bar" should be "foo __init bar"
>>
On Tue 2019-05-07 16:24:25, Josh Poimboeuf wrote:
> On Tue, May 07, 2019 at 04:28:47PM +0200, Petr Mladek wrote:
> > > > > > Also this check is effectively the same as the
> > > > > > klp_have_reliable_stack()
> > > > > > check which is done in kernel/livepatch/core.c. So I think it
> > > > > >
Hi Pablo,
The case I am referring to is : If there are more than 1 hooks returning
NF_QUEUE verdict.
When the first queue reinjects the packet, 'nf_reinject' starts traversing
hooks with hook_index (i).
However if it again receives a NF_QUEUE verdict (by some other netfilter hook),
it queue
Please "drivers" out of the subject line. We know it's drivers, so that
doesn't add any information. The "staging: " bit tells you which git
tree this path is in, and the "rtl8723bs: " tells you which driver it
is.
regards,
dan carpenter
Hi, Oleksandr,
On 10.05.2019 10:21, Oleksandr Natalenko wrote:
> By default, KSM works only on memory that is marked by madvise(). And the
> only way to get around that is to either:
>
> * use LD_PRELOAD; or
> * patch the kernel with something like UKSM or PKSM.
>
> Instead, lets implement a
Hans de Goede wrote on 05/13/2019 09:44 AM:
On 12-05-19 22:59, Uenal Mutlu wrote:
Increasing the SATA/AHCI DMA TX/RX FIFOs (P0DMACR.TXTS and .RXTS, ie.
TX_TRANSACTION_SIZE and RX_TRANSACTION_SIZE) from default 0x0 each
to 0x3 each, gives a write performance boost of 120 MiB/s to 132 MiB/s
from
After a git bisect reset and updating to the current Linus git head, the
problem no longer occurs.
Thanks for the feedback on the problem that I experienced.
Arthur.
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
The current code was luckily working with most of the interval samples
testing but actually it fails to correctly detect pattern repeatition
breaking at the end of the buffer.
Narrowing down the bug has been a real pain because of the pointers,
so the routine is rewrite by using indexes instead.
This series provides a couple of fixes, an optimization and the code
to do the selftests.
While writing the selftests, a couple of issues were spotted with
the circular buffer handling and the routine searching for the pattern
multiple times.
In addition, a small optimization has been found
It appears the index beginning computation is not correct, the current
code does:
i = (irqts->count & IRQ_TIMINGS_MASK) - 1
If irqts->count is equal to zero, we end up with an index equal to -1,
but that does not happen because the function checks against zero
before and returns in such
The' min' is available as a kernel macro. Use it instead of writing
the same code.
Signed-off-by: Daniel Lezcano
---
kernel/irq/timings.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/kernel/irq/timings.c b/kernel/irq/timings.c
index 06bde5253a7d..8928601b4b42 100644
---
If we have a minimal period and if there is a period which is a
multiple of it but lesser than the max period then it will be detected
before and the minimal period will be never reached.
1 2 1 2 1 2 1 2 1 2 1 2
<-> <-> <->
<-> <-> <-> <-> <-> <->
In our case, the minimum period
For the next patches providing the selftest, we do want to
artificially insert timings value in the circular buffer in order to
check the correctness of the code. Encapsulate the common code between
the future test code and the current with an always-inline tag.
No functional change.
For the next patches providing the selftest, we want to insert
interval values directly in the buffer in order to check the
correctness of the code. Encapsulate the code doing that in a always
inline function in order to reuse it in the test code.
No functional changes.
Signed-off-by: Daniel
Due to the complexity of the code and the difficulty to debug it,
let's add some selftests to the framework in order to spot issues or
regression at boot time when the runtime testing is enabled for this
subsystem.
This tests the circular buffer at the limits and validates:
- the encoding /
After testing the per cpu interrupt circular event, we want to make
sure the per interrupt circular buffer usage is correct.
Add tests to validate the interrupt circular buffer.
Signed-off-by: Daniel Lezcano
---
kernel/irq/timings.c | 139 +++
1 file
The circular buffers are now validated at this point with the two
previous patches. The next interrupt index algorithm which is the
hardest part to validate can be validated with the tests provided with
this patch.
It uses the intervals stored in the arrays and insert all the values
except the
Hi George,
On Fri, May 10, 2019 at 02:38:47PM -0400, George G. Davis wrote:
> Hello Eugeniu,
>
> On Fri, May 10, 2019 at 07:10:21PM +0200, Eugeniu Rosca wrote:
> > Hi George,
> >
> > I am able to reproduce the SCIF2 console freeze described in the
> > referenced patchwork link using
This patch resolves below errors reported by checkpath
ERROR: space required before the open brace '{'
ERROR: space prohibited after that '!' (ctx:BxW)
ERROR: space prohibited after that open parenthesis '('
---
v2 - split changes to multiple patches
v3 - edit commit message
---
Signed-off-by:
This patch fixes code indentaion error reported by checkpath
ERROR: switch and case should be at the same indent
ERROR: trailing statements should be on next line
---
v2 - split changes to multiple patches
v3 - edit commit message
---
Signed-off-by: Vandana BN
---
This patch resolves warnings to use __func__ insted of funtion name.
WARNING: Prefer using '"%s...", __func__' to using 'setup_dma_engine', this
function's name, in a string
---
v2 - split changes to multiple patches
v3 - edit commit message
---
Signed-off-by: Vandana BN
---
This Patch resolves unnecessary cast warning and const file_operations
reported by checkpath.pl
WARNING: unnecessary cast may hide bugs
WARNING: struct file_operations should normally be const
---
v2 - split changes to multiple patches
v3 - edit commit message
---
Signed-off-by: Vandana BN
---
This patch resloves below warnings reported by checkpath in kpc_dma
WARNING: Missing a blank line after declarations
WARNING: labels should not be indented
CHECK: Please don't use multiple blank lines
CHECK: Please use a blank line after function/struct/union/enum
declarations
---
v2 - split
This patch fixes below errors reported by checkpath
ERROR: Macros with complex values should be enclosed in parentheses
CHECK: Prefer using the BIT macro
ERROR: trailing statements should be on next line
ERROR: trailing statements should be on next line
---
v2 - split changes to multiple patches
Resolve trailing whitespace error from checkpatch.pl
ERROR: trailing whitespace
---
v2-split changes to multiple patches
v3 - edit commit message
---
Signed-off-by: Vandana BN
---
drivers/staging/kpc2000/kpc_dma/dma.c | 86 ++---
drivers/staging/kpc2000/kpc_dma/fileops.c |
This patch resolves below errors reported by checkpatch
ERROR: "(foo*)" should be "(foo *)"
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo __init bar" should be "foo __init bar"
ERROR: "foo __exit bar" should be "foo __exit bar"
---
v2 - split changes to multiple patches
v3 - edit commit
Currently the space for the array of virtual devices is allocated along
with the OPP table, but that isn't going to work well from now onwards.
For single power domain case, a driver can either use the original
device structure for setting the performance state (if genpd attached
with
The OPP core requires the virtual device pointers to set performance
state on behalf of the device, for the multiple power domain case. The
genpd API (dev_pm_domain_attach_by_name()) has evolved now to support
even the single power domain case and that lets us add common code for
handling both the
Add the shared cx/mx and sensor sub-system's cx and mx
power-domains found on MSM8998.
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 36
1 file changed, 36 insertions(+)
diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c
index
Remoteproc q6v5-mss calls set_performace_state with INT_MAX on
rpmpd. This is currently ignored since it is greater than the
max supported state. Fixup rpmpd state to max if the required
state is greater than all the supported states.
Fixes: 075d3db8d10d ("soc: qcom: rpmpd: Add support for
Add RPM power domain bindings for the msm8998 family of SoC
Reviewed-by: Rob Herring
Signed-off-by: Sibi Sankar
---
.../devicetree/bindings/power/qcom,rpmpd.txt | 1 +
include/dt-bindings/power/qcom-rpmpd.h | 12
2 files changed, 13 insertions(+)
diff --git
Re-worked the macros of the rpmpd driver. Add power domains support
for QCS404 and MSM8998.
V4:
* fixup fixes tag and commit message in patch 1 [Marc]
* fixup typos in qcs404 and msm8998 dt nodes
* fixup comments regarding resource type in patch 8 [Marc]
V3:
* always send level updates to vfc
Add the rpmpd node on the msm8998 and define the available levels.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 51 +++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
From: Bjorn Andersson
Add the shared cx/mx and the low-power-island's cx and mx power-domains
found on QCS404.
Signed-off-by: Bjorn Andersson
[sibi: Fixup corner/vfc with vlfl/vfl]
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 52 +++-
1 file
From: Bjorn Andersson
QCS404 uses individual resource type magic for each power-domain, so
adjust the macros slightly to make them reusable for this.
Signed-off-by: Bjorn Andersson
[sibi: Extend rpmpd corner pair to a generic rpmpd pair]
Signed-off-by: Sibi Sankar
---
rpmpd max state varies across SoCs and SoC families, add support
in the driver to make it SoC/SoC family specific
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/qcom/rpmpd.c
From: Bjorn Andersson
Add RPM power domain bindings for the qcs404 family of SoC
Signed-off-by: Bjorn Andersson
Reviewed-by: Rob Herring
[sibis: Add supported rpmpd states for qcs404]
Signed-off-by: Sibi Sankar
---
.../devicetree/bindings/power/qcom,rpmpd.txt | 1 +
From: Bjorn Andersson
Add the rpmpd node on the qcs404 and define the available levels.
Signed-off-by: Bjorn Andersson
[sibis: fixup available levels]
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 55
1 file changed, 55 insertions(+)
diff
Am 12.05.2019 22:06, schrieb David Howells:
> walter harms wrote:
>
>> Sorry, you misunderstood me, my fault, i did not see that size is unsigned.
>> NTL i do not think size=0 is useful.
>
> Allow me to quote from the getxattr manpage:
>
>If size is specified as zero, these calls
On Mon, May 13, 2019 at 11:35:45AM +0200, Peter Zijlstra wrote:
> On Sun, May 12, 2019 at 05:55:18PM +0200, Jiri Olsa wrote:
> > Using the new pmu::update_attrs attribute group for default
> > attributes - freeze_on_smi, allow_tsx_force_abort.
> >
> > Signed-off-by: Jiri Olsa
>
> > diff --git
Hi Joe,
On Fri, May 10, 2019 at 2:20 AM Joe Perches wrote:
>
> On Fri, 2019-05-10 at 00:27 +0900, Masahiro Yamada wrote:
> > Hi Joe,
> >
> >
> > Does it make sense to check the following
> > by checkpatch.pl ?
> >
> >
> > [1] blank line at end of file
>
>
> > [2] no new line at end of file
>
>
On 5/13/19 2:26 PM, Peter Zijlstra wrote:
> On Mon, May 13, 2019 at 09:42:13AM +0200, Peter Zijlstra wrote:
>> On Sat, May 11, 2019 at 08:12:16AM +0530, Ravi Bangoria wrote:
>>> Add a check for sample_period value sent from userspace. Negative
>>> value does not make sense. And in powerpc arch
AK4458 is probed successfully even if AK4458 is not present - this
is caused by probe function returning no error on i2c access failure.
Return an error on probe if i2c access has failed.
Signed-off-by: Shengjiu Wang
Signed-off-by: Viorel Suman
---
sound/soc/codecs/ak4458.c | 13 +++--
AK4458 is probed successfully even if AK4458 is not present - this
is caused by probe function returning no error on i2c access failure.
The patchset fixes this.
Changes since V1:
Conditional statement rewritten as suggested by Mark.
Viorel Suman (2):
ASoC: ak4458: rstn_control - return a
snd_soc_component_update_bits() may return 1 if operation
was successful and the value of the register changed.
Return a non-zero in ak4458_rstn_control for an error only.
Signed-off-by: Shengjiu Wang
Signed-off-by: Viorel Suman
---
sound/soc/codecs/ak4458.c | 5 -
1 file changed, 4
On Mon, May 13, 2019 at 12:39:55AM +0200, Ondřej Jirman wrote:
> > + /*
> > +* clkin = 24MHz
> > +* T acquire = clkin / (SUN50I_THS_CTRL0_T_ACQ + 1)
> > +* = 20us
> > +*/
> > + regmap_write(tmdev->regmap, SUN50I_THS_CTRL0,
> > +
On 13.05.19 10:37, Anshuman Khandual wrote:
>
>
> On 05/13/2019 01:52 PM, David Hildenbrand wrote:
>> On 14.04.19 07:59, Anshuman Khandual wrote:
>>> This series enables memory hot remove on arm64 after fixing a memblock
>>> removal ordering problem in generic __remove_memory(). This is based
The entire code in ldstfp.o is enclosed into #ifdef CONFIG_PPC_FPU,
so there is no point in building it when this config is not selected.
Fixes: cd64d1697cf0 ("powerpc: mtmsrd not defined")
Signed-off-by: Christophe Leroy
---
arch/powerpc/lib/Makefile | 3 ++-
arch/powerpc/lib/ldstfp.S | 4
Hi Mason,
masonccy...@mxic.com.tw wrote on Mon, 13 May 2019 15:47:53 +0800:
> Hi Miquel,
>
>
> > >
> > > >
> > > > > + if (ret)
> > > > > + pr_err("set feature failed to read retry moded:%d\n",
> mode);
> > > >
> > > >"Failed to set read retry mode:
quad.o is only for PPC64, and already included in obj64-y,
so it doesn't have to be in obj-y
Fixes: 31bfdb036f12 ("powerpc: Use instruction emulation infrastructure to
handle alignment faults")
Signed-off-by: Christophe Leroy
---
arch/powerpc/lib/Makefile | 2 +-
1 file changed, 1
Hi,
On Sun, May 12, 2019 at 10:59:54PM +0200, Uenal Mutlu wrote:
> Increasing the SATA/AHCI DMA TX/RX FIFOs (P0DMACR.TXTS and .RXTS, ie.
> TX_TRANSACTION_SIZE and RX_TRANSACTION_SIZE) from default 0x0 each
> to 0x3 each, gives a write performance boost of 120 MiB/s to 132 MiB/s
> from lame 36
On Mon, 2019-05-13 at 11:15 +0200, Neil Armstrong wrote:
> On the Amlogic G12A SoC family, (only) the SDIO controller fails to access
> the data from DDR, leading to a broken controller.
>
> Add the amlogic,ddr-access-quirk property so signal this particular
> controller has this bug and needs a
On Mon, May 13, 2019 at 05:37:41PM +0800, Gen Zhang wrote:
> On Mon, May 13, 2019 at 09:36:19AM +0200, Greg KH wrote:
> > > Signed-off-by: Gen Zhang
> > > ---
> > > --- drivers/tty/vt/vt.c
> > > +++ drivers/tty/vt/vt.c
> > > @@ -3349,10 +3349,14 @@ static int __init con_init(void)
> > >
> > >
From: Guo Ren
Support 4 triger types:
- IRQ_TYPE_LEVEL_HIGH
- IRQ_TYPE_LEVEL_LOW
- IRQ_TYPE_EDGE_RISING
- IRQ_TYPE_EDGE_FALLING
Support 0-255 priority setting for each irq.
All of above could be set in DeviceTree file and it still compatible
with the old DeviceTree format.
Changes for V3:
From: Guo Ren
Add trigger type and priority setting for csky,mpintc. The driver also
could support #interrupt-cells <1> and it wouldn't invalidate existing
DTs. Here we only show the complete format.
Changes for V3:
- Update commit msg about compatible
Changes for V2:
- change
Hi Julien,
On Mon, May 13, 2019 at 11:20 AM Julien Grall wrote:
> On 5/10/19 5:22 PM, Oleksandr Tyshchenko wrote:
> > From: Oleksandr Tyshchenko
> >
> > Don't use hardcoded address, retrieve it from device-tree instead.
> >
> > And besides, this patch fixes the memory error when running
> > on
On 05/08/2019 10:29 AM, Nicholas Piggin wrote:
Abhishek Goel's on April 22, 2019 4:32 pm:
Currently, the cpuidle governors determine what idle state a idling CPU
should enter into based on heuristics that depend on the idle history on
that CPU. Given that no predictive heuristic is perfect,
On Fri, May 10, 2019 at 11:58:40PM +0530, Amit Kucheria wrote:
> On Fri, May 10, 2019 at 2:54 PM Sudeep Holla wrote:
> >
[...]
> >
> > Yes entry-method="psci" is required as per DT binding but not checked
> > in code on arm64. We have CPU ops with idle enabled only for "psci", so
> > there's
From: Wanpeng Li
MSR IA32_MSIC_ENABLE bit 18, according to SDM:
| When this bit is set to 0, the MONITOR feature flag is not set
(CPUID.01H:ECX[bit 3] = 0).
| This indicates that MONITOR/MWAIT are not supported.
|
| Software attempts to execute MONITOR/MWAIT will cause #UD when this bit
Hello,
On Mon, 13 May 2019 15:37:39 +0800
masonccy...@mxic.com.tw wrote:
> ---
> static void macronix_nand_onfi_init(struct nand_chip *chip)
> {
> struct nand_parameters *p = >parameters;
> struct
On Mon, May 13, 2019 at 09:36:19AM +0200, Greg KH wrote:
> > Signed-off-by: Gen Zhang
> > ---
> > --- drivers/tty/vt/vt.c
> > +++ drivers/tty/vt/vt.c
> > @@ -3349,10 +3349,14 @@ static int __init con_init(void)
> >
> > for (currcons = 0; currcons < MIN_NR_CONSOLES; currcons++) {
> >
On Sun, May 12, 2019 at 05:55:09PM +0200, Jiri Olsa wrote:
> following up on [1], this patchset adds update attribute groups
> to pmu and gets rid of the 'creative' attribute handling code.
Thanks! Queued them.
On Sun, May 12, 2019 at 05:55:18PM +0200, Jiri Olsa wrote:
> Using the new pmu::update_attrs attribute group for default
> attributes - freeze_on_smi, allow_tsx_force_abort.
>
> Signed-off-by: Jiri Olsa
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index
On Sun, May 12, 2019 at 05:02:45PM +0530, Hariprasad Kelam wrote:
> fix below issue reported by coccicheck
>
> drivers/staging/rtl8723bs/os_dep/ioctl_linux.c:2685:5-8: Unneeded
> variable: "ret". Return "0" on line 3266
>
> Signed-off-by: Hariprasad Kelam
> ---
>
On 10-05-19, 09:21, Peter Zijlstra wrote:
> On Thu, Apr 25, 2019 at 03:07:40PM +0530, Viresh Kumar wrote:
> > We target for an idle CPU in select_idle_sibling() to run the next task,
> > but in case we don't find idle CPUs it is better to pick a CPU which
> > will run the task the soonest, for
On Sun, May 05, 2019 at 06:52:53PM +0530, Vatsala Narang wrote:
> Move logical operator to previous line to get rid of checkpatch warning.
>
> Signed-off-by: Vatsala Narang
> ---
> drivers/staging/rtl8723bs/core/rtw_mlme_ext.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
>
On 2019/5/10 下午8:58, Stefano Garzarella wrote:
While I was testing this new series (v2) I discovered an huge use of memory
and a memory leak in the virtio-vsock driver in the guest when I sent
1-byte packets to the guest.
These issues are present since the introduction of the virtio-vsock
On Mon, 13 May 2019, Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 8 May 2019 13:50:49 +0200
>
> Extend a when constraint in a SmPL rule so that an additional cast
> is optionally excluded from source code searches for an expression
> in assignments.
Acked-by: Julia Lawall
>
>
Hi Robin,
Am Dienstag, den 07.05.2019, 09:15 + schrieb Robin Gong:
> There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
> transfer to be send twice in DMA mode. Please get more information from:
> https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding
> new
On Mon, 13 May 2019, Markus Elfring wrote:
> From: Markus Elfring
> Date: Mon, 13 May 2019 09:47:17 +0200
>
> A SmPL ellipsis was specified for a search approach so that additional
> source code would be tolerated between an assignment to a local variable
> and the corresponding null pointer
On 4/16/19 11:30 AM, Stu Hsieh wrote:
> This patch add the function for Get/Set PARM for application.
>
> Application can get the information about number of link.
>
> Signed-off-by: Stu Hsieh
> ---
> .../media/platform/mtk-mipicsi/mtk_mipicsi.c | 34 +++
> 1 file changed, 34
On 5/7/2019 5:38 PM, Hans de Goede wrote:
Hi,
On 06-05-19 21:30, Arend Van Spriel wrote:
+ Luis (for real this time)
On 5/6/2019 6:05 PM, Hans de Goede wrote:
Hi,
On 06-05-19 17:24, Victor Bravo wrote:
On Mon, May 06, 2019 at 03:26:28PM +0300, Kalle Valo wrote:
Hans de Goede writes:
If
> On May 13, 2019, at 2:12 AM, Peter Zijlstra wrote:
>
> On Mon, May 13, 2019 at 10:36:06AM +0200, Peter Zijlstra wrote:
>> On Thu, May 09, 2019 at 09:21:35PM +, Nadav Amit wrote:
>>> It may be possible to avoid false-positive nesting indications (when the
>>> flushes do not overlap) by
Hi,
On 5/10/19 5:22 PM, Oleksandr Tyshchenko wrote:
From: Oleksandr Tyshchenko
Don't use hardcoded address, retrieve it from device-tree instead.
And besides, this patch fixes the memory error when running
on top of Xen hypervisor:
(XEN) traps.c:1999:d0v0 HSR=0x93830007 pc=0xc0b097f8
On Wed, 8 May 2019 at 02:57, Marcelo Tosatti wrote:
>
>
> Certain workloads perform poorly on KVM compared to baremetal
> due to baremetal's ability to perform mwait on NEED_RESCHED
> bit of task flags (therefore skipping the IPI).
KVM supports expose mwait to the guest, if it can solve this?
On 12/05/2019 22:57, Jerome Brunet wrote:
> MPLL_5OM (the capital letter o) should indeed be MPLL_50M (the number)
> Fix this before it gets used.
>
> Reported-by: Martin Blumenstingl
> Fixes: 25db146aa726 ("dt-bindings: clk: meson: add g12a periph clock
> controller bindings")
> Signed-off-by:
Sorry, forgot to mention the patchset is based on my previous small
improvements:
[PATCH v2 00/23] locking/lockdep: Small improvements
(https://lkml.org/lkml/2019/5/6/106).
On Mon, 13 May 2019 at 17:13, Yuyang Du wrote:
>
> Hi Peter and Ingo,
>
> Historically, the read-write locks
On the Amlogic G12A SoC family, (only) the SDIO controller fails to access
the data from DDR, leading to a broken controller.
But each MMC controller has 1,5KiB of SRAM after the registers, that can
be used as bounce buffer to avoid direct DDR access from the integrated
DMAs (this SRAM may be
On the Amlogic G12A SoC family, (only) the SDIO controller has a bug which
makes any DDR access from the MMC controller fail.
Add the amlogic,ddr-access-quirk property so signal this particular
controller has this bug and needs a quirk to work properly.
Signed-off-by: Neil Armstrong
---
On the Amlogic G12A SoC family, (only) the SDIO controller fails to access
the data from DDR, leading to a broken controller.
Add the amlogic,ddr-access-quirk property so signal this particular
controller has this bug and needs a quirk to work properly.
But each MMC controller has 1,5KiB of SRAM
The Amlogic G12A SDIO Controller has a bug preventing direct DDR access,
mark this specific controller with the amlogic,ddr-access-quirk property.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 +
1 file changed, 1 insertion(+)
Kevin, the MMC node hasn't been
On Mon 13-05-19 10:37:01, Weikang shi wrote:
> From: swkhack
>
> In 64-bit machine,the value of "vma->vm_end - vma->vm_start"
> maybe negative in 32bit int and the "count >> PAGE_SHIFT"'s result
> will be wrong.So change the local variable and return
> value to unsigned long will fix the
- find_lock_in_path() tries to find whether a lock class is in the path.
- find_next_dep_in_path() returns the next dependency after a
given dependency in the path.
Signed-off-by: Yuyang Du
---
kernel/locking/lockdep.c | 31 +++
1 file changed, 31 insertions(+)
With read-write lock support, some read-write lock cases need to be updated,
specifically, some read-lock involved deadlocks are actually not deadlocks.
Hope I am not wildly wrong.
Signed-off-by: Yuyang Du
---
lib/locking-selftest.c | 44 +---
1 file
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