On Wed, Oct 02, 2019 at 08:46:05AM +0200, Heiko Carstens wrote:
> On Tue, Oct 01, 2019 at 10:08:01PM +0200, Jiri Kosina wrote:
> >
> >In file included from arch/s390/kvm/kvm-s390.c:44:
> >./arch/s390/include/asm/cpacf.h: In function '__cpacf_query':
> >
Hi,
Any updates on this?
On Mon, Sep 16, 2019 at 02:13:10PM +0300, Mike Rapoport wrote:
> From: Mike Rapoport
>
> The memory initialization of SGI-IP27 is already half-way to support
> SPARSEMEM. It only had free_bootmem_with_active_regions() left-overs
> interfering with
Hi Laurent,
On Tue, 1 Oct 2019 15:29:28 +0200 Laurent Dufour wrote:
>
> Fixes: 1211ee61b4a8 ("powerpc/pseries: Read TLB Block Invalidate
> Characteristics")
> Reported-by: Stephen Rothwell
Please use my external email address , thanks.
--
Cheers,
Stephen Rothwell
pgpu_iF55Ewhm.pgp
On Wed, Oct 02, 2019 at 08:46:05AM +0200, Heiko Carstens wrote:
> On Tue, Oct 01, 2019 at 10:08:01PM +0200, Jiri Kosina wrote:
> > I am wondering how is it possible that none of the build-testing
> > infrastructure we have running against linux-next caught this? Not enough
> > non-x86 coverage?
On Tue, Oct 01, 2019 at 10:08:01PM +0200, Jiri Kosina wrote:
> arch/s390/kvm/kvm-s390.c calls on several places __cpacf_query() directly,
> which makes it impossible to meet the "i" constraint for the asm operands
> (opcode in this case).
>
> As we are now force-enabling
On Tue, 1 Oct 2019 at 18:53, Dietmar Eggemann wrote:
>
> On 01/10/2019 10:14, Vincent Guittot wrote:
> > On Mon, 30 Sep 2019 at 18:24, Dietmar Eggemann
> > wrote:
> >>
> >> Hi Vincent,
> >>
> >> On 19/09/2019 09:33, Vincent Guittot wrote:
>
> [...]
>
> >>> @@ -7347,7 +7362,7 @@ static int
On 01.10.19 22:08, Jiri Kosina wrote:
> arch/s390/kvm/kvm-s390.c calls on several places __cpacf_query() directly,
> which makes it impossible to meet the "i" constraint for the asm operands
> (opcode in this case).
>
> As we are now force-enabling CONFIG_OPTIMIZE_INLINING on all
>
On Tue, 1 Oct 2019 at 19:12, Valentin Schneider
wrote:
>
> On 19/09/2019 08:33, Vincent Guittot wrote:
> > clean up load_balance and remove meaningless calculation and fields before
> > adding new algorithm.
> >
> > Signed-off-by: Vincent Guittot
>
> We'll probably want to squash the removal of
Hi Tejun,
Sorry for the late reply.
On Sat, Sep 21, 2019 at 6:04 AM Tejun Heo wrote:
>
> On Fri, Sep 20, 2019 at 05:47:45PM +0900, Namhyung Kim wrote:
> > Thanks for the sharing information! For 32-bit, while the ino itself is not
> > monotonic, gen << 32 + ino is monotonic right? I think we
On Wed, 2019-10-02 at 09:53 +0800, Alan Kao wrote:
> On Tue, Oct 01, 2019 at 03:10:16AM -0700, h...@infradead.org wrote:
> > On Tue, Oct 01, 2019 at 08:22:37AM +, Atish Patra wrote:
> > > riscv_of_processor_hartid() or seems to be a better candidate. We
> > > already check if "rv" is present
Hi,
I sent in another patch earlier that added support for specifying a file
in devicetree to initilize the eeprom from, corresponding to the case of
pre-flashed eeprom. Maybe these two patches should be merged so this
initialization is only done if no file is specified?
/BA
On 10/1/19
Document the AST2600 PECI controller compatible string.
Signed-off-by: Chia-Wei, Wang
---
Documentation/devicetree/bindings/peci/peci-aspeed.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt
Update the Aspeed PECI driver with the AST2600 compatible string.
A new comptabile string is needed for the extended HW feature of
AST2600.
Chia-Wei, Wang (2):
peci: aspeed: Add AST2600 compatible string
dt-bindings: peci: aspeed: Add AST2600 compatible
The AST2600 SoC contains the same register set as AST25xx.
Signed-off-by: Chia-Wei, Wang
---
drivers/peci/peci-aspeed.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/peci/peci-aspeed.c b/drivers/peci/peci-aspeed.c
index 51cb2563ceb6..4eed119dc83b 100644
---
On 9/20/19 4:44 AM, Navid Emamdoost wrote:
> In gs_can_open if usb_submit_urb fails the allocated urb should be
> released.
>
> Signed-off-by: Navid Emamdoost
> ---
> drivers/net/can/usb/gs_usb.c | 1 +
> 1 file changed, 1 insertion(+)
Added Fixes line and added stable@v.k.o on Cc.
Marc
--
On 9/18/19 12:11 PM, Colin King wrote:
> From: Colin Ian King
>
> Currently the error return paths do not free skb and this results
> in a memory leak. Fix this by freeing them before the return.
>
> Addresses-Coverity: ("Resource leak")
> Fixes: 9d71dd0c7009 ("can: add support of SAE J1939
KASAN is an important runtime memory debugging feature in linux kernel
which can detect use-after-free and out-of- bounds problems.
Changes in v2:
- Remove the porting of memmove and exclude the check instead.
- Fix some code noted by Christoph Hellwig
Nick Hu (2):
kasan: Archs don't check
Skip the memmove checking for those archs who don't support it.
Signed-off-by: Nick Hu
---
mm/kasan/common.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/mm/kasan/common.c b/mm/kasan/common.c
index 6814d6d6a023..897f9520bab3 100644
--- a/mm/kasan/common.c
+++ b/mm/kasan/common.c
@@
This patch ports the feature Kernel Address SANitizer (KASAN).
Note: The start address of shadow memory is at the beginning of kernel
space, which is 2^64 - (2^39 / 2) in SV39. The size of the kernel space is
2^38 bytes so the size of shadow memory should be 2^38 / 8. Thus, the
shadow memory
Hi,
On Tue, Oct 01, 2019 at 10:06:56PM +0200, Jernej Skrabec wrote:
> GPU PLL was designed with dynamic frequency switching in mind so driver
> can adjust rate based on the GPU load.
>
> Allow GPU clock to change parent rate (GPU PLL is the only possible
> parent of GPU clock).
>
> Signed-off-by:
Add description for optional interrupt lines. It provides a new operation
mode, which uses internal performance counters interrupt when overflow.
This is more reliable than using default polling mode implemented in
devfreq.
Signed-off-by: Lukasz Luba
---
There is a need to access registers at address offset near 0x1.
These registers are private DMC performance counters, which might be used
as interrupt trigger when overflow. Potential usage is to skip polling
in devfreq framework and switch to interrupt managed bandwidth control.
Introduce a new interrupt driven mechanism for managing speed of the
memory controller. The interrupts are generated due to performance
counters overflow. The performance counters might track memory reads,
writes, transfers, page misses, etc. In the basic algorithm tracking
read transfers and
Add interrupt to Dynamic Memory Controller in Exynos5422 and Odroid
XU3-family boards. It will be used instead of devfreq polling mode
governor. The interrupt is connected to performance counters private
for DMC, which might track utilisation of the memory channels.
Signed-off-by: Lukasz Luba
Hi all,
This is a v3 patch set for the Exynos5 Dynamic Memory Controller
driver which could be found in Krzysztof's for-next branch [1].
It adds interrupt mode which does not relay on devfreq polling.
Instead of checking the device state by the framework, driver uses local
performance event
On 10/1/19 9:29 PM, Krzysztof Kozlowski wrote:
> On Wed, Aug 21, 2019 at 12:42:55PM +0200, Lukasz Luba wrote:
>> Hi all,
>>
>> This is v13 which makes cosmetic changes. It is based on current mainline
>> (v5.3-rc5) with with devfreq/for-next where there is a PPMU patch [1].
>>
>> The patch set
901 - 926 of 926 matches
Mail list logo
