ne...@gmail.com>
> ---
Agreed. $dayjob has had me very busy. Which is a good thing :-)
Unfortunately, when I have time for irqchip, I don't always have the
time to properly follow up with pull-requests.
So, for the time being, I'll stick to reviewing as I can.
Acked-by: Jason Cooper <ja...@lakedaemon.net>
thx,
Jason.
yjob has had me very busy. Which is a good thing :-)
Unfortunately, when I have time for irqchip, I don't always have the
time to properly follow up with pull-requests.
So, for the time being, I'll stick to reviewing as I can.
Acked-by: Jason Cooper
thx,
Jason.
ename
>2171 216 0 2387 953 drivers/irqchip/irq-gic-realview.o
>
> Signed-off-by: Gustavo A. R. Silva <garsi...@embeddedor.com>
Acked-by: Jason Cooper <ja...@lakedaemon.net>
thx,
Jason.
gt; the output of the size command, before and after the code change:
>
> before:
>textdata bss dec hex filename
>2187 272 642523 9db drivers/irqchip/irq-gic-realview.o
>
> after:
>textdata bss dec hex filename
>
Hi Geert,
On Fri, Mar 17, 2017 at 01:02:26PM +0100, Geert Uytterhoeven wrote:
> In this particular case both maintainers are the same, but this is not true in
> general. Hence deriving a platform maintainer from a Linux subsystem specific
> binding document is the wrong way around.
Ack.
thx,
Hi Geert,
On Fri, Mar 17, 2017 at 01:02:26PM +0100, Geert Uytterhoeven wrote:
> In this particular case both maintainers are the same, but this is not true in
> general. Hence deriving a platform maintainer from a Linux subsystem specific
> binding document is the wrong way around.
Ack.
thx,
Hi Geert,
On Sun, Mar 12, 2017 at 02:16:49PM +0100, Geert Uytterhoeven wrote:
> Submitters of device tree binding documentation may forget to CC
> the subsystem maintainer if this is missing.
>
> Signed-off-by: Geert Uytterhoeven <ge...@linux-m68k.org>
> Cc: Jason Cooper
Hi Geert,
On Sun, Mar 12, 2017 at 02:16:49PM +0100, Geert Uytterhoeven wrote:
> Submitters of device tree binding documentation may forget to CC
> the subsystem maintainer if this is missing.
>
> Signed-off-by: Geert Uytterhoeven
> Cc: Jason Cooper
> Cc: Andrew Lun
Please line wrap the commit message. Other than that,
>
> Signed-off-by: Ansuel Smith <ansuels...@gmail.com>
Acked-by: Jason Cooper <ja...@lakedaemon.net>
thx,
Jason.
> ---
> arch/arm/boot/dts/armada-385-linksys-caiman.dts | 1 +
> arch/arm/boot/dts/armada-385-li
Please line wrap the commit message. Other than that,
>
> Signed-off-by: Ansuel Smith
Acked-by: Jason Cooper
thx,
Jason.
> ---
> arch/arm/boot/dts/armada-385-linksys-caiman.dts | 1 +
> arch/arm/boot/dts/armada-385-linksys-cobra.dts | 1 +
> arch/arm/boot/dts/armada-xp-
's strip out the debug info and drop the
> __bug_table here so that we don't see false positives. There may
> be other things to drop later, and it may be architecture
> specific, but this works for me with my ARM64 build.
>
> Cc: Masahiro Yamada <yamad...@jp.panason
's strip out the debug info and drop the
> __bug_table here so that we don't see false positives. There may
> be other things to drop later, and it may be architecture
> specific, but this works for me with my ARM64 build.
>
> Cc: Masahiro Yamada
> Cc: Jason Cooper
> Signe
Hi Arnd,
On Tue, Feb 14, 2017 at 10:24:36PM +0100, Arnd Bergmann wrote:
> This driver uses the MSI domain but has no strict dependency on PCI_MSI, so we
> may run into a build failure when CONFIG_GENERIC_MSI_IRQ_DOMAIN is disabled:
>
> drivers/irqchip/irq-mvebu-odmi.c:152:15: error: variable
Hi Arnd,
On Tue, Feb 14, 2017 at 10:24:36PM +0100, Arnd Bergmann wrote:
> This driver uses the MSI domain but has no strict dependency on PCI_MSI, so we
> may run into a build failure when CONFIG_GENERIC_MSI_IRQ_DOMAIN is disabled:
>
> drivers/irqchip/irq-mvebu-odmi.c:152:15: error: variable
imported from
https://github.com/openwrt/openwrt
commit 8466384db115 "mvebu: add support for 4.1 and switch over"'
or something similar?
Other than that,
Acked-by: Jason Cooper <ja...@lakedaemon.net>
thx,
Jason.
imported from
https://github.com/openwrt/openwrt
commit 8466384db115 "mvebu: add support for 4.1 and switch over"'
or something similar?
Other than that,
Acked-by: Jason Cooper
thx,
Jason.
Thomas,
This is a couple of fixes that have unintentionally had plenty of time
in linux-next. :-/
Please pull.
thx,
Jason.
The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
are available in the git repository at:
Thomas,
This is a couple of fixes that have unintentionally had plenty of time
in linux-next. :-/
Please pull.
thx,
Jason.
The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
are available in the git repository at:
; Ping, Thomas, Jason C?
>
> > > Signed-off-by: Jason Gunthorpe <jguntho...@obsidianresearch.com>
> > > ---
> > > drivers/pci/host/pci-mvebu.c | 101
> > > +--
> > > 1 file changed, 60 insertions(+), 41 deletions(-)
Sorry, been on travel and I think Thomas is on holiday.
Acked-by: Jason Cooper <ja...@lakedaemon.net>
thx,
Jason.
gt; > > Signed-off-by: Jason Gunthorpe
> > > ---
> > > drivers/pci/host/pci-mvebu.c | 101
> > > +--
> > > 1 file changed, 60 insertions(+), 41 deletions(-)
Sorry, been on travel and I think Thomas is on holiday.
Acked-by: Jason Cooper
thx,
Jason.
Hi Grygorii,
On Thu, Dec 08, 2016 at 05:33:10PM -0600, Grygorii Strashko wrote:
> From: "Strashko, Grygorii"
>
> The below call chain generates "scheduling while atomic" backtrace and
> causes system crash when Keystone 2 IRQ chip driver is used with RT-kernel:
>
>
Hi Grygorii,
On Thu, Dec 08, 2016 at 05:33:10PM -0600, Grygorii Strashko wrote:
> From: "Strashko, Grygorii"
>
> The below call chain generates "scheduling while atomic" backtrace and
> causes system crash when Keystone 2 IRQ chip driver is used with RT-kernel:
>
> gic_handle_irq()
>
Hi Walt,
> On Nov 19, 2016, at 11:54, Walt Feasel wrote:
>
> Make suggested checkpatch modification for
>
> CHECK: Please don't use multiple blank lines
>
> Signed-off-by: Walt Feasel
I Acked the previous version, so you should place that above
Hi Walt,
> On Nov 19, 2016, at 11:54, Walt Feasel wrote:
>
> Make suggested checkpatch modification for
>
> CHECK: Please don't use multiple blank lines
>
> Signed-off-by: Walt Feasel
I Acked the previous version, so you should place that above your S-o-b when
submitting a new version. If
Hi Walt,
Please ignore our side conversation,
On Sat, Nov 12, 2016 at 03:02:53PM -0500, Walt Feasel wrote:
> Made suggested modifications from checkpatch in reference
> to CHECK: Please don't use multiple blank lines
>
> Signed-off-by: Walt Feasel <waltfea...@gmail.com>
Acke
Hi Walt,
Please ignore our side conversation,
On Sat, Nov 12, 2016 at 03:02:53PM -0500, Walt Feasel wrote:
> Made suggested modifications from checkpatch in reference
> to CHECK: Please don't use multiple blank lines
>
> Signed-off-by: Walt Feasel
Acked-by: Jason Cooper
thx,
Jason.
Hi Dan,
On Mon, Nov 14, 2016 at 01:34:15PM +0300, Dan Carpenter wrote:
> Please just delete the blank lines.
Sure, if that's what you guys prefer.
> You aren't that special like a snow flake.
Someone put his grumpy pants on backwards, didn't he?
thx,
Jason.
Hi Dan,
On Mon, Nov 14, 2016 at 01:34:15PM +0300, Dan Carpenter wrote:
> Please just delete the blank lines.
Sure, if that's what you guys prefer.
> You aren't that special like a snow flake.
Someone put his grumpy pants on backwards, didn't he?
thx,
Jason.
Hi Walt,
Thanks for the patch, unfortunately, it's a NAK. If you search the ml
archives, you'll see this has been addressed before.
On Sat, Nov 12, 2016 at 03:02:53PM -0500, Walt Feasel wrote:
> Made suggested modifications from checkpatch in reference
> to CHECK: Please don't use multiple
Hi Walt,
Thanks for the patch, unfortunately, it's a NAK. If you search the ml
archives, you'll see this has been addressed before.
On Sat, Nov 12, 2016 at 03:02:53PM -0500, Walt Feasel wrote:
> Made suggested modifications from checkpatch in reference
> to CHECK: Please don't use multiple
rious" -> "spurious"
Jason Cooper (3):
Merge branch 'irqchip/jcore' into irqchip/core
Merge branch 'irqchip/mvebu64' into irqchip/core
Merge branch 'irqchip/mvebu64' into irqchip/core
Paul Burton (1):
irqchip/mips-gic: Use for_each_set_bit to iterate ov
rious" -> "spurious"
Jason Cooper (3):
Merge branch 'irqchip/jcore' into irqchip/core
Merge branch 'irqchip/mvebu64' into irqchip/core
Merge branch 'irqchip/mvebu64' into irqchip/core
Paul Burton (1):
irqchip/mips-gic: Use for_each_set_bit to iterate ov
On Tue, Sep 06, 2016 at 06:45:34PM +0200, Alexandre TORGUE wrote:
> The STM32 external interrupt controller consists of edge detectors that
> generate interrupts requests or wake-up events.
>
> Each line can be independently configured as interrupt or wake-up source,
> and triggers either on
On Tue, Sep 06, 2016 at 06:45:34PM +0200, Alexandre TORGUE wrote:
> The STM32 external interrupt controller consists of edge detectors that
> generate interrupts requests or wake-up events.
>
> Each line can be independently configured as interrupt or wake-up source,
> and triggers either on
Hi Michal, Zubair,
On Fri, Sep 02, 2016 at 12:27:54PM +0200, Michal Simek wrote:
> On 2.9.2016 12:06, Zubair Lutfullah Kakakhel wrote:
> > On 09/02/2016 07:25 AM, Michal Simek wrote:
...
> >> Also there is another copy of this driver in the tree which was using
> >> old ppc405 and ppc440 xilinx
Hi Michal, Zubair,
On Fri, Sep 02, 2016 at 12:27:54PM +0200, Michal Simek wrote:
> On 2.9.2016 12:06, Zubair Lutfullah Kakakhel wrote:
> > On 09/02/2016 07:25 AM, Michal Simek wrote:
...
> >> Also there is another copy of this driver in the tree which was using
> >> old ppc405 and ppc440 xilinx
6 07:25 AM, Michal Simek wrote:
> >>>> On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
> >>>>> V1 -> V2
> >>>>>
> >>>>> Renamed irq-xilinx to irq-axi-intc
> >>>>> Renamed CONFIG_XILINX_INTC to CONFIG_XILINX_AXI_INTC
6 07:25 AM, Michal Simek wrote:
> >>>> On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
> >>>>> V1 -> V2
> >>>>>
> >>>>> Renamed irq-xilinx to irq-axi-intc
> >>>>> Renamed CONFIG_XILINX_INTC to CONFIG_XILINX_AXI_INTC
Hi Colin,
On Thu, Sep 01, 2016 at 11:44:54AM +0100, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to typo in dev_warn message.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/irqchip/irq-keystone.c | 2 +-
> 1 file changed, 1
Hi Colin,
On Thu, Sep 01, 2016 at 11:44:54AM +0100, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to typo in dev_warn message.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/irqchip/irq-keystone.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to irqchip/core
Hi Paul,
On Tue, Aug 30, 2016 at 06:29:20PM +0100, Paul Burton wrote:
> Introduce support for registering an IPI IRQ domain suitable for use by
> systems using the MIPS MT (multithreading) ASE within a single core.
> This will allow for such systems to be supported generically, without
> the
Hi Paul,
On Tue, Aug 30, 2016 at 06:29:20PM +0100, Paul Burton wrote:
> Introduce support for registering an IPI IRQ domain suitable for use by
> systems using the MIPS MT (multithreading) ASE within a single core.
> This will allow for such systems to be supported generically, without
> the
On Sat, Aug 27, 2016 at 02:43:31PM +, Jason Cooper wrote:
> Hi Corentin,
>
> On Fri, Aug 26, 2016 at 01:11:34PM +0200, LABBE Corentin wrote:
> > Instead of having two global variable, it's better to use a
> > private struct. This will permit to remove amd_pdev variabl
On Sat, Aug 27, 2016 at 02:43:31PM +, Jason Cooper wrote:
> Hi Corentin,
>
> On Fri, Aug 26, 2016 at 01:11:34PM +0200, LABBE Corentin wrote:
> > Instead of having two global variable, it's better to use a
> > private struct. This will permit to remove amd_pdev variabl
32/iowrite32
> hwrng: amd: Convert to new hwrng read() API
>
> drivers/char/hw_random/amd-rng.c | 150
> +--
> 1 file changed, 96 insertions(+), 54 deletions(-)
Once you've fixed up the casting in #6, you can add my
Reviewed-by: Jason Cooper <ja...@lakedaemon.net>
to the series.
thx,
Jason.
32/iowrite32
> hwrng: amd: Convert to new hwrng read() API
>
> drivers/char/hw_random/amd-rng.c | 150
> +--
> 1 file changed, 96 insertions(+), 54 deletions(-)
Once you've fixed up the casting in #6, you can add my
Reviewed-by: Jason Cooper
to the series.
thx,
Jason.
Hi Corentin,
On Fri, Aug 26, 2016 at 01:11:34PM +0200, LABBE Corentin wrote:
> Instead of having two global variable, it's better to use a
> private struct. This will permit to remove amd_pdev variable
>
> Signed-off-by: LABBE Corentin
> ---
>
Hi Corentin,
On Fri, Aug 26, 2016 at 01:11:34PM +0200, LABBE Corentin wrote:
> Instead of having two global variable, it's better to use a
> private struct. This will permit to remove amd_pdev variable
>
> Signed-off-by: LABBE Corentin
> ---
> drivers/char/hw_random/amd-rng.c | 57
>
Hi Corentin,
On Fri, Aug 26, 2016 at 10:38:02AM +0200, LABBE Corentin wrote:
> On Thu, Aug 25, 2016 at 02:56:38PM +0000, Jason Cooper wrote:
> > On Thu, Aug 25, 2016 at 02:16:35PM +0200, LABBE Corentin wrote:
> > > This patch convert the hwrng interface used by amd768-
Hi Corentin,
On Fri, Aug 26, 2016 at 10:38:02AM +0200, LABBE Corentin wrote:
> On Thu, Aug 25, 2016 at 02:56:38PM +0000, Jason Cooper wrote:
> > On Thu, Aug 25, 2016 at 02:16:35PM +0200, LABBE Corentin wrote:
> > > This patch convert the hwrng interface used by amd768-
Hi Corentin,
On Thu, Aug 25, 2016 at 02:16:35PM +0200, LABBE Corentin wrote:
> This patch convert the hwrng interface used by amd768-rng to its new API
> by replacing data_read()/data_present() by read().
>
> Furthermore, Instead of having two global variable, it's better to use a
> private
Hi Corentin,
On Thu, Aug 25, 2016 at 02:16:35PM +0200, LABBE Corentin wrote:
> This patch convert the hwrng interface used by amd768-rng to its new API
> by replacing data_read()/data_present() by read().
>
> Furthermore, Instead of having two global variable, it's better to use a
> private
All,
On Wed, Aug 24, 2016 at 10:41:02PM +0200, Ralph Sennhauser wrote:
> On Wed, 24 Aug 2016 20:15:31 +0200
> Thomas Petazzoni wrote:
> > On Wed, 24 Aug 2016 19:10:04 +0200, Ralph Sennhauser wrote:
> >
> > The people who can take this decision are rather the
All,
On Wed, Aug 24, 2016 at 10:41:02PM +0200, Ralph Sennhauser wrote:
> On Wed, 24 Aug 2016 20:15:31 +0200
> Thomas Petazzoni wrote:
> > On Wed, 24 Aug 2016 19:10:04 +0200, Ralph Sennhauser wrote:
> >
> > The people who can take this decision are rather the maintainers of
> > the platform
Hi Paul,
On Fri, Aug 19, 2016 at 06:11:19PM +0100, Paul Burton wrote:
> The MIPS GIC driver has previously iterated over bits set in a bitmap
> representing pending IRQs by calling find_first_bit, clearing that bit
> then calling find_first_bit again until all bits are clear. If multiple
>
Hi Paul,
On Fri, Aug 19, 2016 at 06:11:19PM +0100, Paul Burton wrote:
> The MIPS GIC driver has previously iterated over bits set in a bitmap
> representing pending IRQs by calling find_first_bit, clearing that bit
> then calling find_first_bit again until all bits are clear. If multiple
>
Hi Wei Yongjun,
On Sat, Aug 20, 2016 at 03:26:28PM +, Wei Yongjun wrote:
> Fixes the following sparse warning:
>
> drivers/irqchip/irq-jcore-aic.c:47:12: warning:
> symbol 'aic_irq_of_init' was not declared. Should it be static?
>
> Signed-off-by: Wei Yongjun
> ---
>
Hi Wei Yongjun,
On Sat, Aug 20, 2016 at 03:26:28PM +, Wei Yongjun wrote:
> Fixes the following sparse warning:
>
> drivers/irqchip/irq-jcore-aic.c:47:12: warning:
> symbol 'aic_irq_of_init' was not declared. Should it be static?
>
> Signed-off-by: Wei Yongjun
> ---
>
Hi Rob,
On Tue, Aug 16, 2016 at 04:15:22PM -0500, Rob Landley wrote:
> On 08/16/2016 10:41 AM, Jason Cooper wrote:
> > When targeting the j2, we need to retain '-m2'. Previously, the
> > Makefile blew out -m2 on the next line via :=.
> >
> > Fix this by s/:=/+
Hi Rob,
On Tue, Aug 16, 2016 at 04:15:22PM -0500, Rob Landley wrote:
> On 08/16/2016 10:41 AM, Jason Cooper wrote:
> > When targeting the j2, we need to retain '-m2'. Previously, the
> > Makefile blew out -m2 on the next line via :=.
> >
> > Fix this by s/:=/+
When targeting the j2, we need to retain '-m2'. Previously, the
Makefile blew out -m2 on the next line via :=.
Fix this by s/:=/+=/ when building for the J2.
Fixes: 5a846abad07f6 ("sh: add support for J-Core J2 processor")
Signed-off-by: Jason Cooper <ja...@lakedaemon.net>
---
T
When targeting the j2, we need to retain '-m2'. Previously, the
Makefile blew out -m2 on the next line via :=.
Fix this by s/:=/+=/ when building for the J2.
Fixes: 5a846abad07f6 ("sh: add support for J-Core J2 processor")
Signed-off-by: Jason Cooper
---
Thanks to Richard Felker for
Hi Thomas,
On Fri, Aug 05, 2016 at 04:55:17PM +0200, Thomas Petazzoni wrote:
> Hello,
>
> This small patch series intends to add support for the PMU of the
> Cortex-A72 cores found in the Marvell Armada 7K/8K SoCs.
>
> However, the interrupt of the PMU is not directly connected to the
> GIC,
Hi Thomas,
On Fri, Aug 05, 2016 at 04:55:17PM +0200, Thomas Petazzoni wrote:
> Hello,
>
> This small patch series intends to add support for the PMU of the
> Cortex-A72 cores found in the Marvell Armada 7K/8K SoCs.
>
> However, the interrupt of the PMU is not directly connected to the
> GIC,
Hi Rich,
On Thu, Aug 04, 2016 at 02:31:18PM +, Jason Cooper wrote:
> On Thu, Aug 04, 2016 at 04:30:36AM +, Rich Felker wrote:
> > Updated based on feedback from Thomas Gleixner. Removal of unnecessary
> > data allowed some simplification. Magic numbers hav
Hi Rich,
On Thu, Aug 04, 2016 at 02:31:18PM +, Jason Cooper wrote:
> On Thu, Aug 04, 2016 at 04:30:36AM +, Rich Felker wrote:
> > Updated based on feedback from Thomas Gleixner. Removal of unnecessary
> > data allowed some simplification. Magic numbers hav
Hi Zubair,
On Mon, Aug 15, 2016 at 02:55:27PM +0100, Zubair Lutfullah Kakakhel wrote:
> The Xilinx AXI Interrupt Controller IP block is used by the MIPS
> based xilfpga platform.
>
> Move the interrupt controller code out of arch/microblaze so that
> it can be used by everyone
>
>
Hi Zubair,
On Mon, Aug 15, 2016 at 02:55:27PM +0100, Zubair Lutfullah Kakakhel wrote:
> The Xilinx AXI Interrupt Controller IP block is used by the MIPS
> based xilfpga platform.
>
> Move the interrupt controller code out of arch/microblaze so that
> it can be used by everyone
>
>
Hi Zubair,
On Mon, Aug 15, 2016 at 02:55:34PM +0100, Zubair Lutfullah Kakakhel wrote:
> The xilfpga platform has a Xilinx AXI emaclite block.
>
> Add the DT node to use it.
>
> Signed-off-by: Zubair Lutfullah Kakakhel
> ---
>
Hi Zubair,
On Mon, Aug 15, 2016 at 02:55:34PM +0100, Zubair Lutfullah Kakakhel wrote:
> The xilfpga platform has a Xilinx AXI emaclite block.
>
> Add the DT node to use it.
>
> Signed-off-by: Zubair Lutfullah Kakakhel
> ---
> arch/mips/boot/dts/xilfpga/nexys4ddr.dts | 27
Hi Zubair,
On Mon, Aug 15, 2016 at 02:55:30PM +0100, Zubair Lutfullah Kakakhel wrote:
> IRQs from peripherals such as i2c/uart/ethernet come via
> the AXI Interrupt controller.
>
> Select it in Kconfig for xilfpga and add the DT node
>
> Signed-off-by: Zubair Lutfullah Kakakhel
Hi Zubair,
On Mon, Aug 15, 2016 at 02:55:30PM +0100, Zubair Lutfullah Kakakhel wrote:
> IRQs from peripherals such as i2c/uart/ethernet come via
> the AXI Interrupt controller.
>
> Select it in Kconfig for xilfpga and add the DT node
>
> Signed-off-by: Zubair Lutfullah Kakakhel
> ---
>
Hi Zubair,
On Mon, Aug 15, 2016 at 02:55:27PM +0100, Zubair Lutfullah Kakakhel wrote:
> The Xilinx AXI Interrupt Controller IP block is used by the MIPS
> based xilfpga platform.
>
> Move the interrupt controller code out of arch/microblaze so that
> it can be used by everyone
>
>
Hi Zubair,
On Mon, Aug 15, 2016 at 02:55:27PM +0100, Zubair Lutfullah Kakakhel wrote:
> The Xilinx AXI Interrupt Controller IP block is used by the MIPS
> based xilfpga platform.
>
> Move the interrupt controller code out of arch/microblaze so that
> it can be used by everyone
>
>
Hey Ted,
On Wed, Aug 10, 2016 at 07:44:25PM -0400, Theodore Ts'o wrote:
> On Tue, Aug 09, 2016 at 02:04:44PM +0000, Jason Cooper wrote:
> > iiuc, Ted, you're saying using the hw_random framework would be
> > disasterous because despite most drivers having a default quality of 0,
&
Hey Ted,
On Wed, Aug 10, 2016 at 07:44:25PM -0400, Theodore Ts'o wrote:
> On Tue, Aug 09, 2016 at 02:04:44PM +0000, Jason Cooper wrote:
> > iiuc, Ted, you're saying using the hw_random framework would be
> > disasterous because despite most drivers having a default quality of 0,
&
Hi Keith,
On Tue, Aug 09, 2016 at 10:58:05AM -0700, Keith Packard wrote:
> Jason Cooper <ja...@lakedaemon.net> writes:
> > Perhaps a /dev/hwrng[0-9] per rng? That would lend itself nicely to a
> > sysfs interface for per device quality, rate, and enabled attributes.
> >
Hi Keith,
On Tue, Aug 09, 2016 at 10:58:05AM -0700, Keith Packard wrote:
> Jason Cooper writes:
> > Perhaps a /dev/hwrng[0-9] per rng? That would lend itself nicely to a
> > sysfs interface for per device quality, rate, and enabled attributes.
> > e.g. /sys/class/hw_
Hi Keith, Herbert,
On Tue, Aug 09, 2016 at 05:50:58PM +0800, Herbert Xu wrote:
> On Mon, Jul 25, 2016 at 01:07:35PM -0700, Keith Packard wrote:
> > Instead of having only one hwrng feeding /dev/random at a time, maintain
> > a list of devices and cycle between them when filling the entropy pool.
Hi Keith, Herbert,
On Tue, Aug 09, 2016 at 05:50:58PM +0800, Herbert Xu wrote:
> On Mon, Jul 25, 2016 at 01:07:35PM -0700, Keith Packard wrote:
> > Instead of having only one hwrng feeding /dev/random at a time, maintain
> > a list of devices and cycle between them when filling the entropy pool.
Hi Ted,
On Tue, Aug 09, 2016 at 07:56:22AM -0400, Theodore Ts'o wrote:
> On Tue, Aug 09, 2016 at 06:30:03AM +, Pan, Miaoqing wrote:
> > Agree with Jason's point, also understand Stephan's concern. The
> > date rate can be roughly estimated by 'cat /dev/random |rngtest -c
> > 1000', the
Hi Ted,
On Tue, Aug 09, 2016 at 07:56:22AM -0400, Theodore Ts'o wrote:
> On Tue, Aug 09, 2016 at 06:30:03AM +, Pan, Miaoqing wrote:
> > Agree with Jason's point, also understand Stephan's concern. The
> > date rate can be roughly estimated by 'cat /dev/random |rngtest -c
> > 1000', the
Hi Stephan,
On Mon, Aug 08, 2016 at 05:29:30PM +, Jason Cooper wrote:
> On Mon, Aug 08, 2016 at 08:41:36AM +0200, Stephan Mueller wrote:
...
> > If you think that this patch is a challenge because your driver starts to
> > spin, please help and offer another solution.
>
&
Hi Stephan,
On Mon, Aug 08, 2016 at 05:29:30PM +, Jason Cooper wrote:
> On Mon, Aug 08, 2016 at 08:41:36AM +0200, Stephan Mueller wrote:
...
> > If you think that this patch is a challenge because your driver starts to
> > spin, please help and offer another solution.
>
&
Hi Stephan, Miaoqing Pan,
On Mon, Aug 08, 2016 at 08:41:36AM +0200, Stephan Mueller wrote:
> Am Montag, 8. August 2016, 02:03:36 CEST schrieb Pan, Miaoqing:
> > The entropy was evaluated by crypto expert, the analysis report show the
> > ADC with at least 10bits and up to 22 bits of min-entropy
Hi Stephan, Miaoqing Pan,
On Mon, Aug 08, 2016 at 08:41:36AM +0200, Stephan Mueller wrote:
> Am Montag, 8. August 2016, 02:03:36 CEST schrieb Pan, Miaoqing:
> > The entropy was evaluated by crypto expert, the analysis report show the
> > ADC with at least 10bits and up to 22 bits of min-entropy
Hi Stephan,
On Sat, Aug 06, 2016 at 10:03:58PM +0200, Stephan Mueller wrote:
> Am Samstag, 6. August 2016, 19:45:51 CEST schrieb Jason Cooper:
> > On Fri, Aug 05, 2016 at 05:08:14PM +0200, Stephan Mueller wrote:
...
> > > diff --git a/drivers/net/wireless/ath/ath9k/rng.c
&
Hi Stephan,
On Sat, Aug 06, 2016 at 10:03:58PM +0200, Stephan Mueller wrote:
> Am Samstag, 6. August 2016, 19:45:51 CEST schrieb Jason Cooper:
> > On Fri, Aug 05, 2016 at 05:08:14PM +0200, Stephan Mueller wrote:
...
> > > diff --git a/drivers/net/wireless/ath/ath9k/rng.c
&
domness((void *)rng_buf, bytes_read,
> -ATH9K_RNG_ENTROPY(bytes_read));
This is the only use of this macro. I'd remove the #define on line 25
as well.
> + add_hwgenerator_randomness((void *)rng_buf, bytes_read, 0);
> }
>
> kfree(rng_buf);
Other than that,
Reviewed-by: Jason Cooper <ja...@lakedaemon.net>
thx,
Jason.
ad,
> -ATH9K_RNG_ENTROPY(bytes_read));
This is the only use of this macro. I'd remove the #define on line 25
as well.
> + add_hwgenerator_randomness((void *)rng_buf, bytes_read, 0);
> }
>
> kfree(rng_buf);
Other than that,
Reviewed-by: Jason Cooper
thx,
Jason.
Hi Thomas,
On Fri, Aug 05, 2016 at 05:58:12PM +0200, Thomas Petazzoni wrote:
> On Fri, 5 Aug 2016 15:31:13 +0000, Jason Cooper wrote:
>
> > > +config MVEBU_PIC
> > > + bool
> >
> > tri-state? Is there anything else attached to the PIC besides the PMU?
&g
Hi Thomas,
On Fri, Aug 05, 2016 at 05:58:12PM +0200, Thomas Petazzoni wrote:
> On Fri, 5 Aug 2016 15:31:13 +0000, Jason Cooper wrote:
>
> > > +config MVEBU_PIC
> > > + bool
> >
> > tri-state? Is there anything else attached to the PIC besides the PMU?
&g
Hi Thomas,
On Fri, Aug 05, 2016 at 04:55:19PM +0200, Thomas Petazzoni wrote:
> The Marvell Armada 7K/8K integrates a secondary interrupt controller
> very originally named "PIC". It is connected to the main GIC via a
> PPI. Amongst other things, this PIC is used for the ARM PMU.
>
> This commit
Hi Thomas,
On Fri, Aug 05, 2016 at 04:55:19PM +0200, Thomas Petazzoni wrote:
> The Marvell Armada 7K/8K integrates a secondary interrupt controller
> very originally named "PIC". It is connected to the main GIC via a
> PPI. Amongst other things, this PIC is used for the ARM PMU.
>
> This commit
Hi Rich,
On Thu, Aug 04, 2016 at 04:30:36AM +, Rich Felker wrote:
> Updated based on feedback from Thomas Gleixner. Removal of unnecessary
> data allowed some simplification. Magic numbers have been replaced
> with meaningful (I hope) macro constants, comments added, and minor
> style issues
Hi Rich,
On Thu, Aug 04, 2016 at 04:30:36AM +, Rich Felker wrote:
> Updated based on feedback from Thomas Gleixner. Removal of unnecessary
> data allowed some simplification. Magic numbers have been replaced
> with meaningful (I hope) macro constants, comments added, and minor
> style issues
On Wed, Aug 03, 2016 at 04:48:10PM -0700, Andrew Morton wrote:
> On Wed, 3 Aug 2016 23:39:13 +0000 Jason Cooper <ja...@lakedaemon.net> wrote:
>
> > All call sites for randomize_range have been updated to use the much
> > simpler and more robust randomize_addr. Re
On Wed, Aug 03, 2016 at 04:48:10PM -0700, Andrew Morton wrote:
> On Wed, 3 Aug 2016 23:39:13 +0000 Jason Cooper wrote:
>
> > All call sites for randomize_range have been updated to use the much
> > simpler and more robust randomize_addr. Remove the now un
ce all callers have been converted
over to randomize_addr().
Signed-off-by: Jason Cooper <ja...@lakedaemon.net>
---
Changes from v2:
- s/randomize_addr/randomize_page/ (Kees Cook)
- PAGE_ALIGN(start) if it wasn't (Kees Cook, Michael Ellerman)
drivers/char/ra
ce all callers have been converted
over to randomize_addr().
Signed-off-by: Jason Cooper
---
Changes from v2:
- s/randomize_addr/randomize_page/ (Kees Cook)
- PAGE_ALIGN(start) if it wasn't (Kees Cook, Michael Ellerman)
drivers/char/random.c | 33 +
include/linux/ra
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