The last '>' chars were missing in the MODULE_AUTHOR entries.
Reported-by: Randy Dunlap
Fixes: a3b9a99980d9 ("counter: add FlexTimer Module Quadrature decoder counter
driver")
Signed-off-by: Patrick Havelange
---
drivers/counter/ftm-quaddec.c | 4 ++--
1 file changed, 2 ins
Adding myself as maintainer for this driver
Signed-off-by: Patrick Havelange
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 57f496cff999..6671854098d6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6218,6 +6218,14 @@ M: Philip
Modifying the prescaler or polarity value must be done with the
write protection disabled. Currently this is working by chance as
the write protection is in a disabled state by default.
This patch makes sure that we enable/disable the write protection
when needed.
Signed-off-by: Patrick Havelange
e following additional improvements:
- implement the new apply() method instead of the individual methods;
- return the exact used period/duty_cycle values;
- more coherent argument types for period, duty_cycle;
Signed-off-by: Patrick Havelange
---
drivers/pwm/pwm-fsl-ftm.c | 364 +++
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the
following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the
following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the
following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the
following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the
following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the following
for proper
Year 2017.The card centre will send you an ATM CARD
which you will use to withdraw your money in any ATM MACHINE in the
world.
Your personal identification is ATM- 7997. Contact the verification
officer
patrick huang (Mrs.) on: (huangpatrick...@gmail.com) with the following
for proper
On 05-Jun 07:44, Tejun Heo wrote:
> Hello,
Hi,
> On Wed, Jun 05, 2019 at 03:39:50PM +0100, Patrick Bellasi wrote:
> > Which means we will enforce the effective values as:
> >
> >/tg1/tg11:
> >
> > util_min.effective=0
> > i.
On 05-Jun 07:09, Tejun Heo wrote:
> Hello,
Hi,
> On Mon, Jun 03, 2019 at 01:29:29PM +0100, Patrick Bellasi wrote:
> > On 31-May 08:35, Tejun Heo wrote:
> > > Hello, Patrick.
> > >
> > > On Wed, May 15, 2019 at 10:44:55AM +0100, Patrick Bellasi wrote:
&g
On 05-Jun 07:03, Tejun Heo wrote:
> Hello,
Hi!
> On Mon, Jun 03, 2019 at 01:27:25PM +0100, Patrick Bellasi wrote:
> > All the above, to me it means that:
> > - cgroups are always capped by system clamps
> > - cgroups can further restrict system clamps
> >
>
This driver uses devm_ioremap and of* functions. This fixes a
linking failure with e.g. ARCH=um.
Reported-by: kbuild test robot
Signed-off-by: Patrick Havelange
---
drivers/counter/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig
On 31-May 08:35, Tejun Heo wrote:
> Hello, Patrick.
>
> On Wed, May 15, 2019 at 10:44:55AM +0100, Patrick Bellasi wrote:
[...]
> For proportions (as opposed to weights), we use percentage rational
> numbers - e.g. 38.44 for 38.44%. I have parser and doc update commits
> pendi
's the current behavior in v9.
> Note that there's no way for an ancestor to enforce protection its
> descendants. It can only allow them to claim some. This is
> intentional as the other end of the spectrum is either descendants
> losing the ability to further distribute protections as they see fit.
Ok, that means I need to update in v10 the initialization of subgroups
min clamps to be none by default as discussed in the above Example 2,
right?
[...]
Cheers,
Patrick
--
#include
Patrick Bellasi
On 31-May 08:35, Tejun Heo wrote:
> Hello, Patrick.
Hi Tejun!
> On Wed, May 15, 2019 at 10:44:55AM +0100, Patrick Bellasi wrote:
> > Extend the CPU controller with a couple of new attributes util.{min,max}
> > which allows to enforce utilization boosting and capping for
o get some more feedbacks from you.
Cheers,
Patrick
On 15-May 10:44, Patrick Bellasi wrote:
> Hi all, this is a respin of:
>
> https://lore.kernel.org/lkml/20190402104153.25404-1-patrick.bell...@arm.com/
>
> which includes the following main changes:
>
> - f
On 16-May 14:01, Quentin Perret wrote:
> On Thursday 16 May 2019 at 13:42:00 (+0100), Patrick Bellasi wrote:
> > > +static inline unsigned long em_pd_get_higher_freq(struct em_perf_domain
> > > *pd,
> > > + unsigned long min_freq, unsigned long cost_margin)
> >
; }
> }
>
> + /*
> + * Only update the business status if we are looking at the CPU for
> + * which a utilization change triggered a call to get_next_freq(). This
> + * way, we don't affect the "busy" status of CPUs that don't have any
> + * change in utilization.
> + */
> + sugov_cpu_is_busy_update(sg_cpu, sg_cpu_util);
> +
> return get_next_freq(sg_policy, util, max);
> }
>
> --
> 2.21.0
>
--
#include
Patrick Bellasi
e we should probably better use SCHED_CAPACITY_SCALE
instead of hard-coding in values, isn't it?
> + break;
> + }
> + }
> +
[...]
Best,
Patrick
--
#include
Patrick Bellasi
ing to a child
group. While, for tasks in the root group or in an autogroup, only
system defaults are enforced.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
Cc: Tejun Heo
---
kernel/sched/core.c | 28 +++-
1 file changed, 27 insertions(+), 1 del
schedutil_freq_util() into schedutil_cpu_util(),
since it's not only used for frequency selection.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
Cc: Rafael J. Wysocki
---
kernel/sched/cpufreq_schedutil.c | 9 +++
kernel/sched/fair.c | 40
quot;requested" from them.
Exploit these two concepts and bind them together in such a way that,
whenever system default are tuned, the new values are propagated to
(possibly) restrict or relax the "effective" value of nested cgroups.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc
*cgroup_subsys_state (css) is used to walk the list of tasks
in the TGs and update the RUNNABLE ones. Do that by taking the rq
lock for each task, the same mechanism used for cpu affinity masks
updates.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
Cc: Tejun Heo
---
kernel/sched/core.c
< util.max.
Keep it simple by do not caring now about "effective" values computation
and propagation along the hierarchy.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
Cc: Tejun Heo
---
Changes in v9
Message-ID: <20190507114232.npsvba4itex
values are cross scheduling class attributes and
thus they are never changed/reset once a value has been explicitly
defined from user-space.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
---
kernel/sched/core.c | 30 --
1 file changed, 28
divisions every time a task is enqueued.
An active flag is used to report when the "effective" value is valid and
thus the task is actually refcounted in the corresponding rq's bucket.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
---
Changes in v9:
Message-ID:
to
default values.
Do that for utilization clamp values too by checking the reset request
from the existing uclamp_fork() call which already provides the required
initialization for other uclamp related bits.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
---
kernel/sched
.effective.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
Cc: Tejun Heo
---
Documentation/admin-guide/cgroup-v2.rst | 19 +
kernel/sched/core.c | 108 ++--
kernel/sched/sched.h| 2 +
3 files changed, 124
is interested in comparing the energy impact of
different scheduling decisions and the clamp values can play a role on
that.
Add uclamp_util_with() which allows to clamp a given utilization by
considering the possible impact on CPU clamp values of a specified task.
Signed-off-by: Patrick Bellasi
Cc: Ingo
of the current policy.
Add support for the SETPARAM_POLICY policy, which is already used by the
sched_setparam() POSIX syscall, to the sched_setattr() non-POSIX
syscall.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
---
Changes in v9:
Message-ID: <20190509145901.um7rrsslg7de4
by their aggregated utilization clamp
constraints.
Do that by considering the max(min_util, max_util) to give boosted tasks
the performance they need even when they happen to be co-scheduled with
other capped tasks.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
C
re and then applying
the required changes using _the_ same pattern already in use for
__setscheduler(). This ensures that the task is re-enqueued with the new
clamp values.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
---
Changes in v9:
Message-ID: <20190507111347.4ivnj
nputs from Peter [1].
Thus, this v9 is likely the right version to unlock Tejun's review [2] on the
remaining cgroup related bits, i.e. patches [12-16].
Cheers Patrick
Series Organization
===
The series is organized into these main sections:
- Patches [01-07]: Per task (pr
.
Remove the rq bucket initialization code since a correct bucket value
is now computed when a task is refcounted into a CPU's rq.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
---
Changes in v9
Message-ID: <20190415144930.pntid6evu6r67l4o@e110439-lin>
- fix &quo
and to flag this
condition.
Don't track any minimum utilization clamps since an idle CPU never
requires a minimum frequency. The decay of the blocked utilization is
good enough to reduce the CPU frequency.
Signed-off-by: Patrick Bellasi
Cc: Ingo Molnar
Cc: Peter Zijlstra
---
kernel/sched
nt the
number of RUNNABLE tasks for each clamp bucket. Add also the max
aggregation required to update the rq's clamp value at each
enqueue/dequeue event.
Use a simple linear mapping of clamp values into clamp buckets.
Pre-compute and cache bucket_id to avoid integer divisions at
enqueue/dequeue t
On 08-May 21:21, Peter Zijlstra wrote:
> On Tue, Apr 02, 2019 at 11:41:41AM +0100, Patrick Bellasi wrote:
> > diff --git a/include/uapi/linux/sched.h b/include/uapi/linux/sched.h
> > index 22627f80063e..075c610adf45 100644
> > --- a/include/uapi/linux/sched.h
> > +++ b
On 09-May 15:02, Peter Zijlstra wrote:
> On Tue, Apr 02, 2019 at 11:41:36AM +0100, Patrick Bellasi wrote:
> > Series Organization
> > ===
> >
> > The series is organized into these main sections:
> >
> > - Patches [01-07]: Per task (primary
On 09-May 13:53, Peter Zijlstra wrote:
> On Thu, May 09, 2019 at 10:10:57AM +0100, Patrick Bellasi wrote:
> > On 08-May 21:15, Peter Zijlstra wrote:
> > > On Wed, May 08, 2019 at 09:07:33PM +0200, Peter Zijlstra wrote:
> > > > On Tue, Apr 02, 2019 at 11:41:40A
On 08-May 21:44, Peter Zijlstra wrote:
> On Tue, May 07, 2019 at 12:13:47PM +0100, Patrick Bellasi wrote:
> > On 17-Apr 15:26, Suren Baghdasaryan wrote:
> > > On Tue, Apr 2, 2019 at 3:42 AM Patrick Bellasi
> > > wrote:
>
> > > > @@ -1056,6 +1100
On 08-May 21:41, Peter Zijlstra wrote:
> On Tue, Apr 02, 2019 at 11:41:42AM +0100, Patrick Bellasi wrote:
> > @@ -1056,6 +1100,13 @@ static void __init init_uclamp(void)
> > #else /* CONFIG_UCLAMP_TASK */
> > static inline void uclamp_rq_inc(struct rq *rq, struct task_struc
On 08-May 21:21, Peter Zijlstra wrote:
> On Tue, Apr 02, 2019 at 11:41:41AM +0100, Patrick Bellasi wrote:
> > diff --git a/include/uapi/linux/sched.h b/include/uapi/linux/sched.h
> > index 22627f80063e..075c610adf45 100644
> > --- a/include/uapi/linux/sched.h
> > +++ b
On 08-May 21:15, Peter Zijlstra wrote:
> On Wed, May 08, 2019 at 09:07:33PM +0200, Peter Zijlstra wrote:
> > On Tue, Apr 02, 2019 at 11:41:40AM +0100, Patrick Bellasi wrote:
> > > +static inline struct uclamp_se
> > > +uclamp_eff_get(struct task_struc
On 08-May 20:42, Peter Zijlstra wrote:
> On Tue, Apr 02, 2019 at 11:41:40AM +0100, Patrick Bellasi wrote:
> > Add a privileged interface to define a system default configuration via:
> >
> > /proc/sys/kernel/sched_uclamp_util_{min,max}
>
> Isn't the 'u' in &quo
p_id],
> uclamp_none(clamp_id));
>
> /* System defaults allow max clamp values for both indexes */
> - uc_max.value = uclamp_none(UCLAMP_MAX);
> - uc_max.bucket_id = uclamp_bucket_id(uc_max.value);
> - for (clamp_id = 0; clamp_id < UCLAMP_CNT; ++clamp_id)
> + uclamp_se_set(_max, uclamp_none(UCLAMP_MAX));
> + for_each_clamp_id(clamp_id)
> uclamp_default[clamp_id] = uc_max;
> }
>
>
--
#include
Patrick Bellasi
On 17-Apr 17:12, Suren Baghdasaryan wrote:
> On Tue, Apr 2, 2019 at 3:43 AM Patrick Bellasi
> wrote:
> >
> > The cgroup CPU bandwidth controller allows to assign a specified
> > (maximum) bandwidth to the tasks of a group. However this bandwidth is
> > defined a
On 17-Apr 16:07, Suren Baghdasaryan wrote:
> On Tue, Apr 2, 2019 at 3:42 AM Patrick Bellasi
> wrote:
> >
> > By default FAIR tasks start without clamps, i.e. neither boosted nor
> > capped, and they run at the best frequency matching their utilization
> > deman
On 17-Apr 15:26, Suren Baghdasaryan wrote:
> On Tue, Apr 2, 2019 at 3:42 AM Patrick Bellasi
> wrote:
[...]
> > Do not allow to change sched class specific params and non class
> > specific params (i.e. clamp values) at the same time. This keeps things
> > simple and
On 17-Apr 17:51, Suren Baghdasaryan wrote:
> On Tue, Apr 2, 2019 at 3:42 AM Patrick Bellasi
> wrote:
[...]
> > +/*
> > + * The effective clamp bucket index of a task depends on, by increasing
> > + * priority:
> > + * - the task specific clamp value,
On 17-Apr 13:36, Suren Baghdasaryan wrote:
> Hi Patrick,
>
> On Tue, Apr 2, 2019 at 3:42 AM Patrick Bellasi
> wrote:
> >
> > When a task sleeps it removes its max utilization clamp from its CPU.
> > However, the blocked utilization on that CPU can be highe
onghui Liu
> > Signed-off-by: Lisa Liu
>
> Reviewed-by: Andrew Jeffery
Reviewed-by: Patrick Venture
>
> > ---
> > Changes in v6:
> > - add appropriate pinctrl property for uar1, uart2, uart3 and adc.
> > - remove vhub definition and comment.
> > - re
On 5/3/19 10:27 AM, J. Bruce Fields wrote:
> Christoph also had some objections to the implementation which I think
> were addressed, but I could be wrong.
I'm certainly no expert, but yes, the objections to the RichACL patches
were addressed and not really counter challenged. It seems like a
On 5/2/19 12:44 PM, Andreas Gruenbacher wrote:
> On Thu, 2 May 2019 at 19:27, Goetz, Patrick G wrote:
>> On 5/1/19 10:57 PM, NeilBrown wrote:
>>> Support some day support for nfs4 acls were added to ext4 (not a totally
>>> ridiculous suggestion). We would then
On 5/1/19 10:57 PM, NeilBrown wrote:
> Support some day support for nfs4 acls were added to ext4 (not a totally
> ridiculous suggestion). We would then want NFS to allow it's ACLs to be
> copied up.
Is there some reason why there hasn't been a greater effort to add NFSv4
ACL support to the
On Mon, Apr 29, 2019 at 5:42 PM Rob Herring wrote:
>
> On Tue, Apr 16, 2019 at 08:41:38AM -0700, Patrick Venture wrote:
> > The ir38064 is a voltage regulator from Infineon.
> >
> > Signed-off-by: Patrick Venture
> > ---
> > Documentation/devicetree/binding
On Mon, Apr 29, 2019 at 12:35 PM Patrick Venture wrote:
>
> On Mon, Apr 29, 2019 at 12:27 PM Olof Johansson wrote:
> >
> > On Mon, Apr 29, 2019 at 10:12 AM Patrick Venture wrote:
> > >
> > > On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote:
> >
On Mon, Apr 29, 2019 at 12:27 PM Olof Johansson wrote:
>
> On Mon, Apr 29, 2019 at 10:12 AM Patrick Venture wrote:
> >
> > On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote:
> > >
> > > On Thu, Apr 25, 2019 at 07:25:49PM +0200, Greg KH wrote:
> > &g
On Mon, Apr 29, 2019 at 10:19 AM Olof Johansson wrote:
>
> On Mon, Apr 29, 2019 at 10:16 AM Patrick Venture wrote:
> >
> > On Mon, Apr 29, 2019 at 10:13 AM Olof Johansson wrote:
> > >
> > > On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote:
> >
On Mon, Apr 29, 2019 at 10:13 AM Olof Johansson wrote:
>
> On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote:
> >
> > On Thu, Apr 25, 2019 at 07:25:49PM +0200, Greg KH wrote:
> > > On Tue, Apr 23, 2019 at 08:28:14AM -0700, Patrick Venture wrote:
> > &g
On Mon, Apr 29, 2019 at 10:08 AM Olof Johansson wrote:
>
> On Thu, Apr 25, 2019 at 07:25:49PM +0200, Greg KH wrote:
> > On Tue, Apr 23, 2019 at 08:28:14AM -0700, Patrick Venture wrote:
> > > On Tue, Apr 23, 2019 at 8:22 AM Patrick Venture
> > > wrote:
> > &
On Fri, Apr 26, 2019 at 7:30 AM Patrick Venture wrote:
>
> On Thu, Apr 25, 2019 at 11:25 PM Greg KH wrote:
> >
> > On Fri, Apr 26, 2019 at 03:56:53PM +1000, Stephen Rothwell wrote:
> > > Hi all,
> > >
> > > After merging the char-misc tree, today'
Fix up mixed declarations and code in aspeed_p2a_mmap.
Tested: Verified the build had the error and that this patch resolved it
and there were no other warnings or build errors associated with
compilation of this driver.
Reported-by: Stephen Rothwell
Signed-off-by: Patrick Venture
---
drivers
ntroduced by commit
> >
> > 01c60dcea9f7 ("drivers/misc: Add Aspeed P2A control driver")
>
> Patrick, I thought you fixed all of these already? Can you send a patch
> again?
I fixed the ones caught by the robot. I'll have to switch up my build
environment a bit
On Thu, Apr 25, 2019 at 1:36 PM Greg KH wrote:
>
> On Thu, Apr 25, 2019 at 01:23:47PM -0700, Patrick Venture wrote:
> > Fixup compiler warnings:
> > - 108 warning: ISO C90 forbids mixed declarations and code
> > - 264 warning: unused variable 'value'
> > - 335
Fixup compiler warnings:
- 108 warning: ISO C90 forbids mixed declarations and code
- 264 warning: unused variable 'value'
- 335 warning: unused variable 'res'
Signed-off-by: Patrick Venture
---
drivers/misc/aspeed-p2a-ctrl.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
Add a node for the aspeed-p2a-ctrl module. This node, when enabled will
disable the PCI-to-AHB bridge and then allow control of this bridge via
ioctls, and access via mmap.
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-g4.dtsi | 4
arch/arm/boot/dts/aspeed-g5.dtsi | 5
Enable the aspeed-p2a-ctrl node and configure with memory-region to
enable mmap access.
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
b/arch/arm/boot/dts
+
> + pin_gpio_s6 {
> + gpio-hog;
> + gpios = ;
> + output-high;
> + line-name = "PU_BMC_GPIOS6";
> + };
> +
> + pin_gpio_s7 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "I2C_BUS7_RESET_N";
> + };
> +
> + pin_gpio_y0 {
> + gpio-hog;
> + gpios = ;
> + output-low;
> + line-name = "BMC_NCSI_MUX_CTL_S0";
> + };
> +
> + pin_gpio_y1 {
> + gpio-hog;
> + gpios = ;
> + output-low;
> + line-name = "BMC_NCSI_MUX_CTL_S1";
> + };
> +
> + pin_gpio_y2 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "UID_ALERT_N";
> + };
> +
> + pin_gpio_z0 {
> + gpio-hog;
> + gpios = ;
> + output-high;
> + line-name = "I2C_RISER2_INT_N";
> + };
> +
> + pin_gpio_z2 {
> + gpio-hog;
> + gpios = ;
> + output-high;
> + line-name = "I2C_RISER2_RESET_N";
> + };
> +
> + pin_gpio_z3 {
> + gpio-hog;
> + gpios = ;
> + output-high;
> + line-name = "FM_BMC_PCH_SCI_LPC_N";
> + };
> +
> + pin_gpio_z4 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "BMC_HW_STRAP_17";
> + };
> +
> + pin_gpio_z6 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "BMC_HW_STRAP_20";
> + };
> +
> + pin_gpio_z7 {
> + gpio-hog;
> + gpios = ;
> + output-low;
> + line-name = "BMC_POST_CMPLT_N";
> + };
> +
> + pin_gpio_aa0 {
> + gpio-hog;
> + gpios = ;
> + output-low;
> + line-name = "HOST_BMC_USB_SEL";
> + };
> +
> + pin_gpio_aa1 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "PSU1_ALERT_N";
> + };
> +
> + pin_gpio_aa2 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "FM_PVCCIN_CPU0_PWR_IN_ALERT_N";
> + };
> +
> + pin_gpio_aa3 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "FM_PVCCIN_CPU1_PWR_IN_ALERT_N";
> + };
> +
> + pin_gpio_aa4 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "USB_CABLE_DETECT_N";
> + };
> +
> + pin_gpio_aa5 {
> + gpio-hog;
> + gpios = ;
> + output-high;
> + line-name = "I2C_BUS1_RST_OUT_N";
> + };
> +
> + pin_gpio_aa6 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "IRQ_SMI_ACTIVE_N";
> + };
> +
> + pin_gpio_aa7 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "FM_BIOS_POST_CMPLT_N";
> + };
> +
> + pin_gpio_ab0 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "FM_TPM_MOD_PRES_N";
> + };
> +
> + pin_gpio_ab1 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "FORCE_NMI_SW_FPGA_N";
> + };
> +
> + pin_gpio_ab2 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "1U_2U_PCBA_SEL_R";
> + };
> +
> + pin_gpio_ab3 {
> + gpio-hog;
> + gpios = ;
> + input;
> + line-name = "INTRUDED_PRES_N";
> + };
> +};
This is my last comment.
Thanks,
Patrick
> --
> 2.7.4
>
On Tue, Apr 23, 2019 at 8:33 AM Arnd Bergmann wrote:
>
> On Tue, Apr 23, 2019 at 4:24 PM Patrick Venture wrote:
> >
> > On Tue, Apr 23, 2019 at 1:08 AM Arnd Bergmann wrote:
> > >
> > > On Mon, Apr 22, 2019 at 7:38 PM Patrick Venture
> > &g
On Tue, Apr 23, 2019 at 8:22 AM Patrick Venture wrote:
>
> On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture wrote:
> >
> > Create a SoC folder for the ASPEED parts and place the misc drivers
> > currently present into this folder. These drivers are not generic part
>
On Tue, Apr 23, 2019 at 7:26 AM Patrick Venture wrote:
>
> Create a SoC folder for the ASPEED parts and place the misc drivers
> currently present into this folder. These drivers are not generic part
> drivers, but rather only apply to the ASPEED SoCs.
>
> Signed-off-b
On Tue, Apr 23, 2019 at 4:55 AM Andrew Peng wrote:
>
> Initial introduction of Lenovo Hr630 family equipped with
> Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
> with a ASPEED ast2500 BMC manufactured by Lenovo.
> Specifically, This adds the Hr630 platform device tree file
> used by
Create a SoC folder for the ASPEED parts and place the misc drivers
currently present into this folder. These drivers are not generic part
drivers, but rather only apply to the ASPEED SoCs.
Signed-off-by: Patrick Venture
---
v2:
Added configuration option for ASPEED to soc/Makefile
On Tue, Apr 23, 2019 at 1:08 AM Arnd Bergmann wrote:
>
> On Mon, Apr 22, 2019 at 7:38 PM Patrick Venture wrote:
> >
> > Create a SoC folder for the ASPEED parts and place the misc drivers
> > currently present into this folder. These drivers are not generic part
>
On Mon, Apr 22, 2019 at 10:54 AM Patrick Venture wrote:
>
> Create a SoC folder for the ASPEED parts and place the misc drivers
> currently present into this folder. These drivers are not generic part
> drivers, but rather only apply to the ASPEED SoCs.
>
> Signed-off-b
Create a SoC folder for the ASPEED parts and place the misc drivers
currently present into this folder. These drivers are not generic part
drivers, but rather only apply to the ASPEED SoCs.
Signed-off-by: Patrick Venture
---
v2:
Added configuration option for ASPEED to soc/Makefile
Create a SoC folder for the ASPEED parts and place the misc drivers
currently present into this folder. These drivers are not generic part
drivers, but rather only apply to the ASPEED SoCs.
Signed-off-by: Patrick Venture
---
drivers/misc/Kconfig | 16
Am Dienstag, 16. April 2019, 17:33:07 CEST schrieb Jerome Glisse:
> On Mon, Apr 15, 2019 at 06:04:11PM +0200, Patrick Brunner wrote:
> > Dear all,
> >
> > I'm encountering very nasty problems regarding DMA transfers from an
> > external PCIe device to the main memory
that they return to their former numbers before the cfam change.
Signed-off-by: Robert Lippert
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 40 ++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
b/arch/arm
Hi,
This series contains three updates to the Zaius ASPEED device-tree to
add voltrage regulators, and update addresses and aliases. The Infineon
and Intersil drivers are staged on hwmon-next, and the trivial device
dt-bindings changed are up for review.
Maxim Sloyko (1):
ARM: dts: aspeed:
From: Maxim Sloyko
Add the nodes for the ir38064 and isl68137 devices on the Zaius board.
Signed-off-by: Maxim Sloyko
Signed-off-by: Robert Lippert
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 65 --
1 file changed, 60 insertions(+), 5
From: Robert Lippert
The I2C address of the brick is different depending on the board SKU.
Update the values to instantiate addresses which work for most boards.
Signed-off-by: Robert Lippert
Signed-off-by: Patrick Venture
---
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 18
The isl68137 is a digital output 7-phrase configurable PWM controller
with an AVSBus interface from Intersil.
Signed-off-by: Patrick Venture
---
Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/trivial
The ir38064 is a voltage regulator from Infineon.
Signed-off-by: Patrick Venture
---
Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml
b/Documentation/devicetree/bindings/trivial
On Tue, Apr 16, 2019 at 7:53 AM Patrick Venture wrote:
>
> Add vendor prefix for intersil, known as Intersil, a subsidiary of
> Renesas Electronic Corporation.
>
> Signed-off-by: Patrick Venture
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 f
Add vendor prefix for intersil, known as Intersil, a subsidiary of
Renesas Electronic Corporation.
Signed-off-by: Patrick Venture
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
On Mon, Apr 8, 2019 at 5:48 PM Andrew Jeffery wrote:
>
>
>
> On Tue, 9 Apr 2019, at 00:12, Patrick Venture wrote:
> > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
> >
> > Signed-off-by: Patrick Venture
> > Reviewed-by: Rob Herr
to take a deeper look.
Thanks and best regards,
Patrick
On 02-Apr 11:41, Patrick Bellasi wrote:
> Because of bucketization, different task-specific clamp values are
> tracked in the same bucket. For example, with 20% bucket size and
> assuming to have:
> Task1: util_min=25%
> Task2: util_min=35%
> both tasks will be refcoun
write to all of it.
Signed-off-by: Patrick Venture
Reviewed-by: Andrew Jeffery
---
Changes for v10:
- None
Changes for v9:
- Stop zeroing out memory that is already zeroed out.
Changes for v8:
- Promoted u32 address values to u64 to be compatible with either.
Changes for v7:
- Moved node under
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture
Reviewed-by: Rob Herring
---
Changes for v10:
- Chopped out nearly identical information.
Changes for v9:
- Added missing details about syscon parent
Changes for v8:
- None
Changes for v7
On Sun, Apr 7, 2019 at 7:03 PM Andrew Jeffery wrote:
>
>
>
> On Fri, 5 Apr 2019, at 01:55, Patrick Venture wrote:
> > Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
> >
> > Signed-off-by: Patrick Venture
> > Reviewed-by: Rob
On 06-Apr 16:51, Suren Baghdasaryan wrote:
> On Tue, Apr 2, 2019 at 3:42 AM Patrick Bellasi
> wrote:
[...]
> > + * The first few values calculated by this routine:
> > + * bf(0) = 1
> > + * bf(1) = 1
> > + * bf(2) = 2
> > + * bf(3) = 2
201 - 300 of 3150 matches
Mail list logo
