.
Since the duty was already inverted, and we invert it again, we now
program the hardware for the requested duty, and simply invert the
polarity when the PWM is enabled.
Signed-off-by: Paul Cercueil
---
Notes:
v2: Add documentation about why we invert the polarity, and
improve commit
Hi Uwe,
Le dim. 24 mai 2020 à 19:37, Uwe Kleine-König
a écrit :
On Mon, Apr 13, 2020 at 02:14:45PM +0200, Paul Cercueil wrote:
The PWM hardware in the JZ4725B works the same as in the JZ4740,
but has
only six channels available.
Signed-off-by: Paul Cercueil
---
Notes:
I did
Hi,
Any feedback on this patchset?
Cheers,
-Paul
Le lun. 13 avril 2020 à 14:14, Paul Cercueil a
écrit :
Depending on MACH_INGENIC prevent us from creating a generic kernel
that
works on more than one MIPS board. Instead, we just depend on MIPS
being
set.
Signed-off-by: Paul Cercueil
All boards with Ingenic SoCs probe with devicetree already, we have no
use for a non-devicetree path.
This solves some compilation warnings that were caused by unused
variables in the case where CONFIG_OF was disabled.
Signed-off-by: Paul Cercueil
Reported-by: kbuild test robot
---
sound/soc
Hi Suman,
Le ven. 22 mai 2020 à 11:47, Suman Anna a écrit :
Hi Paul,
On 5/15/20 5:43 AM, Paul Cercueil wrote:
Call pm_runtime_get_sync() before the firmware is loaded, and
pm_runtime_put() after the remote processor has been stopped.
Even though the remoteproc device has no PM callbacks
Hi Bin,
The patch it fixes was introduced in 5.7-rc1, is it possible to queue
it for the next -rc? Otherwise I'll need to Cc it to linux-stable.
-Paul
Le jeu. 21 mai 2020 à 15:34, Bin Liu a écrit :
On Wed, May 20, 2020 at 05:01:11PM +0200, Paul Cercueil wrote:
The function
: Add support for DMA")
Signed-off-by: Paul Cercueil
---
drivers/usb/musb/jz4740.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/musb/jz4740.c b/drivers/usb/musb/jz4740.c
index 54e7b30acc69..42c1e8bfc4be 100644
--- a/drivers/usb/musb/jz4740.c
+++ b/driver
Hi Zhou,
Le mer. 20 mai 2020 à 15:23, Zhou Yanjie a
écrit :
Hi Paul,
On 2020年05月20日 03:41, Paul Cercueil wrote:
Hi Zhou,
Le mar. 19 mai 2020 à 22:35, 周琰杰 (Zhou Yanjie)
a écrit :
Forward port smp support from kernel 3.18.3 of CI20_linux
to upstream kernel 5.6.
Tested-by: H. Nikolaus
Convert the ingenic,pinctrl.txt doc file to ingenic,pinctrl.yaml.
In the process, some compatible strings now require a fallback, as the
corresponding SoCs are pin-compatible with their fallback variant.
Signed-off-by: Paul Cercueil
---
Notes:
v2: - Use 'pinctrl' instead of 'pin-controller
Convert the ingenic,jz4780-nand.txt doc file to ingenic,nand.yaml.
Signed-off-by: Paul Cercueil
---
Notes:
v2: - Don't include ingenic,nemc-client.yaml which is gone
- Use 'partitions' property instead of '^partitions$' pattern
.../bindings/mtd/ingenic,jz4780-nand.txt | 92
Convert the ingenic,jz4780-nemc.txt doc file to ingenic,nemc.yaml.
The ingenic,jz4725b-nemc compatible string was added in the process,
with a fallback to ingenic,jz4740-nemc.
Signed-off-by: Paul Cercueil
---
Notes:
v2: - Inline content of ingenic,nemc-client.yaml inside ingenic,nemc.yaml
Add missing include which adds the prototype to plat_time_init().
Fixes: f932449c11da ("MIPS: ingenic: Drop obsolete code, merge the rest in
setup.c")
Signed-off-by: Paul Cercueil
Reported-by: kbuild test robot
---
arch/mips/jz4740/setup.c | 1 +
1 file changed, 1 insertion(+)
Hi Andy,
Le mar. 19 mai 2020 à 23:43, Andy Shevchenko
a écrit :
On Sun, May 17, 2020 at 10:49 PM Artur Rojek
wrote:
Add a driver for joystick devices connected to ADC controllers
supporting the Industrial I/O subsystem.
...
+static int adc_joystick_handle(const void *data, void
From: 周琰杰 (Zhou Yanjie)
Enable clock event handling on per CPU core basis.
Make sure that interrupts raised on the first core execute
event handlers on the correct CPU core.
Tested-by: H. Nikolaus Schaller
Tested-by: Paul Boddie
Signed-off-by: 周琰杰 (Zhou Yanjie)
Signed-off-by: Paul Cercueil
Hi Zhou,
Le mar. 19 mai 2020 à 22:35, 周琰杰 (Zhou Yanjie)
a écrit :
Forward port smp support from kernel 3.18.3 of CI20_linux
to upstream kernel 5.6.
Tested-by: H. Nikolaus Schaller
Tested-by: Paul Boddie
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Jiaxun Yang
---
Notes:
v1->v2:
96 100644
--- a/drivers/clocksource/ingenic-timer.c
+++ b/drivers/clocksource/ingenic-timer.c
@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * JZ47xx SoCs TCU IRQ driver
+ * XBurst SoCs TCU IRQ driver
If you want to get rid of the JZ47xx, then just write 'Ingenic SoCs TCU
IRQ driver',
Hi Zhou,
Le mar. 19 mai 2020 à 22:35, 周琰杰 (Zhou Yanjie)
a écrit :
Forward port smp support from kernel 3.18.3 of CI20_linux
to upstream kernel 5.6.
Tested-by: H. Nikolaus Schaller
Tested-by: Paul Boddie
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Jiaxun Yang
---
Notes:
v1->v2:
Hi Emil,
Le lun. 18 mai 2020 à 11:48, Emil Velikov a
écrit :
Hi Paul,
Disclaimer: I don't know much about the hardware :-P
On Sun, 17 May 2020 at 00:31, Paul Cercueil
wrote:
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
Since the IPU is present on all
Hi Sam,
Le dim. 17 mai 2020 à 8:21, Sam Ravnborg a écrit :
On Sat, May 16, 2020 at 11:50:50PM +0200, Paul Cercueil wrote:
The opaque pointer passed to the IRQ handler is a pointer to the
drm_device, not a pointer to our ingenic_drm structure.
It still worked, because our ingenic_drm
Hi Sam,
Le dim. 17 mai 2020 à 8:17, Sam Ravnborg a écrit :
On Sat, May 16, 2020 at 11:50:49PM +0200, Paul Cercueil wrote:
The code was comparing the SoC's maximum height with the mode's
width,
and vice-versa. D'oh.
Cc: sta...@vger.kernel.org # v5.6
Fixes: a7c909b7c037 ("gpu/drm: in
Hi Sam,
Le dim. 17 mai 2020 à 8:17, Sam Ravnborg a écrit :
Hi Paul.
On Sat, May 16, 2020 at 11:50:47PM +0200, Paul Cercueil wrote:
Add documentation of the Device Tree bindings for the Image
Processing
Unit (IPU) found in most Ingenic SoCs.
Signed-off-by: Paul Cercueil
For me it fails
is then a primary plane
itself.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/Kconfig | 11 +
drivers/gpu/drm/ingenic/Makefile | 1 +
drivers/gpu/drm/ingenic/ingenic-drm.c | 67 +-
drivers/gpu/drm/ingenic/ingenic-drm.h | 9 +
drivers/gpu/drm/ingenic/ingenic-ipu.c | 861
Support multiple panels or bridges connected to the same DPI output of
the SoC. This setup can be found for instance on the GCW Zero, where the
same DPI output interfaces the internal 320x240 TFT panel, and the ITE
IT6610 HDMI chip.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic
Register the ingenic-drm driver as a component master.
This will later allow to plug optional components to the driver, for
instance to add support for the IPU, or the SLCD module.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 61 +--
1 file
All Ingenic SoCs starting from the JZ4725B support OSD mode.
In this mode, two separate planes can be used. They can have different
positions and sizes, and one can be overlayed on top of the other.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 275
The address of the DMA descriptor never changes. It can therefore be set
in the probe function.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c
b/drivers/gpu
Move the register definitions to ingenic-drm.h, to keep ingenic-drm.c
tidy.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 116 +--
drivers/gpu/drm/ingenic/ingenic-drm.h | 127 ++
2 files changed, 129 insertions(+), 114
plane->index is NOT the index of the color plane in a YUV frame.
Actually, a YUV frame is represented by a single drm_plane, even though
it contains three Y, U, V planes.
Cc: sta...@vger.kernel.org # v5.3
Fixes: 90b86fcc47b4 ("DRM: Add KMS driver for the Ingenic JZ47xx SoCs")
Signed
The code was comparing the SoC's maximum height with the mode's width,
and vice-versa. D'oh.
Cc: sta...@vger.kernel.org # v5.6
Fixes: a7c909b7c037 ("gpu/drm: ingenic: Check for display size in CRTC atomic
check")
Signed-off-by: Paul Cercueil
---
Notes:
This patch was previ
.
Cc: sta...@vger.kernel.org # v5.3
Fixes: 90b86fcc47b4 ("DRM: Add KMS driver for the Ingenic JZ47xx SoCs")
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c
Support binding the master even though no components have been
registered.
This permits to support cases where components are optional.
Signed-off-by: Paul Cercueil
---
drivers/base/component.c | 35 ++-
1 file changed, 26 insertions(+), 9 deletions(-)
diff
Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
In the process, the new ingenic,jz4780-lcd compatible string has been
added.
Signed-off-by: Paul Cercueil
---
Notes:
This patch comes from a different patchset so it's effectively a V2.
Changes were:
- lcd_pclk
Add documentation of the Device Tree bindings for the Image Processing
Unit (IPU) found in most Ingenic SoCs.
Signed-off-by: Paul Cercueil
---
.../bindings/display/ingenic,ipu.yaml | 65 +++
1 file changed, 65 insertions(+)
create mode 100644 Documentation/devicetree
Add myself as the reviewer for the Ingenic VPU remoteproc driver.
Signed-off-by: Paul Cercueil
---
Notes:
v4: New patch
v5-v7: No change
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 091ec22c1a23..5d864d785574 100644
--- a/MAINTAINERS
Inside the Video Processing Unit (VPU) of the recent JZ47xx SoCs from
Ingenic is a second Xburst MIPS CPU very similar to the main core.
This document describes the devicetree bindings for this auxiliary
processor.
Signed-off-by: Paul Cercueil
Reviewed-by: Rob Herring
---
Notes:
v2: Update
Add API functions devm_rproc_alloc() and devm_rproc_add(), which behave
like rproc_alloc() and rproc_add() respectively, but register their
respective cleanup function to be called on driver detach.
Signed-off-by: Paul Cercueil
Reviewed-by: Bjorn Andersson
---
Notes:
v3: New patch
v4
Call pm_runtime_get_sync() before the firmware is loaded, and
pm_runtime_put() after the remote processor has been stopped.
Even though the remoteproc device has no PM callbacks, this allows the
parent device's PM callbacks to be properly called.
Signed-off-by: Paul Cercueil
---
Notes:
v2
This driver is used to boot, communicate with and load firmwares to the
MIPS co-processor found in the VPU hardware of the JZ47xx SoCs from
Ingenic.
Signed-off-by: Paul Cercueil
Acked-by: Mathieu Poirier
---
Notes:
v2: Remove exception for always-mapped memories
v3: - Use clk_bulk API
with
and invalid offset.
This results in:
Unable to handle kernel paging request at virtual address
On such a device it is not possible to use the userspace driver at
all.
The fix for this off-by-one error is quite simple.
Reported-by: Paul Cercueil
Tested-by: Paul Cercueil
Fixes
Hi Paul,
Le mar. 5 mai 2020 à 20:26, Paul Boddie a écrit :
On Monday 4. May 2020 03.05.22 Paul Cercueil wrote:
> Le sam. 11 avril 2020 à 16:14, H. Nikolaus Schaller
a
> écrit :
>>
>> So far we have identified two issues.
>>
>> The first is that H
The 'clk' and 'irq' fields were only ever used in the probe function.
Therefore they can be moved to be simple local variables of the probe
function.
Signed-off-by: Paul Cercueil
---
drivers/rtc/rtc-jz4740.c | 26 --
1 file changed, 12 insertions(+), 14 deletions
We can write the wakeup timing parameters as soon as the driver probes,
there's no need to wait the very last moment.
Signed-off-by: Paul Cercueil
---
drivers/rtc/rtc-jz4740.c | 95 +++-
1 file changed, 44 insertions(+), 51 deletions(-)
diff --git a/drivers
The code was returning -ENOENT on any error of platform_get_irq(), even
if it returned a different error.
Signed-off-by: Paul Cercueil
---
drivers/rtc/rtc-jz4740.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index
With the recent work on supporting Device Tree on Ingenic SoCs, no
driver ever probes from platform code anymore, so we can clean a bit
this driver by removing the non-devicetree paths.
Signed-off-by: Paul Cercueil
---
drivers/rtc/Kconfig | 1 +
drivers/rtc/rtc-jz4740.c | 20
-off-by: Paul Cercueil
---
drivers/rtc/rtc-jz4740.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index 65e130726fc6..9607e6b6e0b3 100644
--- a/drivers/rtc/rtc-jz4740.c
+++ b/drivers/rtc/rtc-jz4740.c
@@ -372,6 +372,9 @@ static int
It makes no sense to request a clock and not enable it even though the
hardware is being used. So the driver now enables the clock in the
probe. Besides, now we can properly handle errors.
Signed-off-by: Paul Cercueil
---
drivers/rtc/rtc-jz4740.c | 19 +--
1 file changed, 17
Clean a bit the probe function by adding a local struct device *dev
variable.
Signed-off-by: Paul Cercueil
---
drivers/rtc/rtc-jz4740.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index
Hi Nikolaus,
Le lun. 4 mai 2020 à 8:35, H. Nikolaus Schaller a
écrit :
so that the driver can load by matching the device tree
if compiled as module.
Cc: sta...@vger.kernel.org # v5.3+
Fixes: 90b86fcc47b4 ("DRM: Add KMS driver for the Ingenic JZ47xx
SoCs")
Signed-off-by: H. Nikolaus
Hi Nikolaus,
Le dim. 29 mars 2020 à 19:35, H. Nikolaus Schaller
a écrit :
so that the driver can load by matching the device tree
if compiled as module.
Signed-off-by: H. Nikolaus Schaller
Please add:
Cc: sta...@vger.kernel.org # v5.3+
Fixes: 90b86fcc47b4 ("DRM: Add KMS driver for the
Hi Nikolaus,
So I just wrote a HDMI driver for a different chip, I guess I can
answer some of your questions now.
Le lun. 13 avril 2020 à 13:25, Paul Cercueil a
écrit :
Hi Nikolaus,
Le sam. 11 avril 2020 à 16:14, H. Nikolaus Schaller
a écrit :
Hi,
we (Paul Boddie and me) are working
The code was comparing the SoC's maximum height with the mode's width,
and vice-versa. D'oh.
Cc: sta...@vger.kernel.org # v5.6+
Fixes: a7c909b7c037 ("gpu/drm: ingenic: Check for display size in CRTC atomic
check")
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic
.
Signed-off-by: Paul Cercueil
---
drivers/pinctrl/pinctrl-ingenic.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-ingenic.c
b/drivers/pinctrl/pinctrl-ingenic.c
index 96f04d121ebd..f2b95ee31ffe 100644
--- a/drivers/pinctrl/pinctrl-ingenic.c
+++ b
Le dim. 3 mai 2020 à 15:31, H. Nikolaus Schaller a
écrit :
Hi Paul,
Am 03.05.2020 um 14:52 schrieb Paul Cercueil :
It's possible to forbid the presence of the 'clocks' property on
some implementations, and require it on others.
To be precise we have to specify the exact number
Hi Nikolaus,
Le sam. 2 mai 2020 à 22:26, H. Nikolaus Schaller a
écrit :
Hi Paul,
Am 26.04.2020 um 15:11 schrieb Paul Cercueil :
Hi Nikolaus,
Le ven. 24 avril 2020 à 22:34, H. Nikolaus Schaller
a écrit :
The Imagination PVR/SGX GPU is part of several SoC from
multiple vendors, e.g
Hi Thomas,
Le mer. 29 avril 2020 à 23:04, Thomas Bogendoerfer
a écrit :
On Mon, Apr 13, 2020 at 05:26:27PM +0200, Paul Cercueil wrote:
If N fields of X cells should be provided, then that's what the
devicetree should represent, instead of having one single field of
(N*X) cells.
Signed
:56 a.m., Paul Cercueil wrote:
Le ven. 24 avril 2020 à 22:34, H. Nikolaus Schaller
a écrit :
From: Jonathan Bakker
All s5pv210 devices have a PowerVR SGX 540 (revision 120)
attached.
There is no external regulator for it so it can be enabled by
default.
Signed-off-by: Jonathan
This one patch will need a V2, I messed up with the clocks.
-Paul
Le dim. 26 avril 2020 à 20:58, Paul Cercueil a
écrit :
Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
In the process, the new ingenic,jz4780-lcd compatible string has been
added.
Signed-off-by: Paul Cercueil
Hi Sergei,
Le lun. 27 avril 2020 à 12:11, Sergei Shtylyov
a écrit :
Hello!
On 26.04.2020 21:58, Paul Cercueil wrote:
Convert the ingenic,intc.txt doc file to ingenic,intc.yaml.
Some compatible strings now require a fallback, as the controller
generally works the same across the SoCs
Since we broke the ABI by changing the clock, the driver was also
updated to use the regmap provided by the TCU driver.
Signed-off-by: Paul Cercueil
Tested-by: Mathieu Malaterre
Tested-by: Artur Rojek
Acked-by: Guenter Roeck
---
Notes:
v2: Rebase on top of 5.4-rc4
drivers/watchdog
Depending on MACH_JZ47xx prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.
Signed-off-by: Paul Cercueil
Acked-by: Guenter Roeck
---
Notes:
v2: Rebase on top of 5.4-rc4
drivers/watchdog/Kconfig | 2 +-
1 file
ck. In this very specific case it is still okay, as every
Ingenic JZ47xx-based board out there compile the devicetree within the
kernel; so it's still time to push breaking changes, in order to get a
clean devicetree that won't break once it musn't.
Signed-off-by: Paul Cercueil
Tested-by: Mathi
jz4780_dma_soc_data x1000_dma_soc_data = {
+ .nb_channels = 8,
+ .transfer_ord_max = 7,
+ .flags = JZ_SOC_DATA_ALLOW_LEGACY_DT | JZ_SOC_DATA_PROGRAMMABLE_DMA,
Please don't use JZ_SOC_DATA_ALLOW_LEGACY_DT for new bindings.
With that flag removed:
Reviewed-by: Paul Cercueil
Hi,
Le mer., août 14, 2019 at 19:32, Uwe Kleine-König
a écrit :
Hello Paul,
On Wed, Aug 14, 2019 at 06:10:35PM +0200, Paul Cercueil wrote:
Le mar. 13 août 2019 à 16:09, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
> On Tue, Aug 13, 2019 at 02:47:28PM +0200, Paul Cercueil wrote:
>
Hi Zhou,
Le sam., oct. 19, 2019 at 01:50, Zhou Yanjie a
écrit :
Add support for the clocks provided by the CGU in the Ingenic X1000
SoC, making use of the cgu code to do the heavy lifting.
Signed-off-by: Zhou Yanjie
---
drivers/clk/ingenic/Kconfig | 10 ++
Hi Uffe,
Le ven., oct. 18, 2019 at 10:52, Ulf Hansson a
écrit :
On Sat, 12 Oct 2019 at 07:19, Zhou Yanjie wrote:
add support for low power mode of Ingenic's MMC/SD Controller.
Signed-off-by: Zhou Yanjie
I couldn't find a proper coverletter for the series, please provide
that next
Hi Vinod,
Le lun., oct. 14, 2019 at 12:44, Vinod Koul a écrit
:
On 24-09-19, 21:32, Paul Cercueil wrote:
Hi Markus,
Le dim. 22 sept. 2019 à 11:25, Markus Elfring
a
écrit :
> From: Markus Elfring
> Date: Sun, 22 Sep 2019 11:18:27 +0200
>
> Simplify this function im
processing
is completed.
Signed-off-by: Zhou Yanjie
Looks good to me.
Reviewed-by: Paul Cercueil
---
drivers/irqchip/irq-ingenic.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/irqchip/irq-ingenic.c
b/drivers/irqchip/irq-ingenic.c
index
Hi Zhou,
Le mer., oct. 2, 2019 at 19:25, Zhou Yanjie a
écrit :
From: Paul Cercueil
The same behaviour can be obtained by using the
IRQCHIP_MASK_ON_SUSPEND
flag on the IRQ chip.
Signed-off-by: Paul Cercueil
If you sumbit a patchset that contains someone else's patches you need
to add
Elfring
Looks good to me.
Signed-off-by: Paul Cercueil
---
drivers/dma/dma-jz4780.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index cafb1cc065bb..f42b3ef8e036 100644
--- a/drivers/dma/dma-jz4780.c
+++ b
Hi Rob,
Le mar. 20 août 2019 à 22:50, Rob Herring a écrit :
On Mon, Jul 29, 2019 at 02:31:07PM -0400, Paul Cercueil wrote:
Inside the Video Processing Unit (VPU) of the recent JZ47xx SoCs
from
Ingenic is a second Xburst MIPS CPU very similar to the main core.
This document describes
Hi Randy,
The fix was merged a couple of hours ago in mips-next.
Cheers
-Paul
Le mar. 20 août 2019 à 0:06, Randy Dunlap a
écrit :
On 8/19/19 2:18 AM, Stephen Rothwell wrote:
Hi all,
Changes since 20190816:
on i386:
ld: drivers/irqchip/irq-ingenic-tcu.o: in function
Hi Uwe,
Le mar. 13 août 2019 à 16:09, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
Hello Paul,
On Tue, Aug 13, 2019 at 02:47:28PM +0200, Paul Cercueil wrote:
Le mar. 13 août 2019 à 14:33, Uwe Kleine-König a écrit :
> On Tue, Aug 13, 2019 at 01:01:06PM +0200, Paul Cercueil wr
Le mar. 13 août 2019 à 14:33, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
Hello Paul,
On Tue, Aug 13, 2019 at 01:01:06PM +0200, Paul Cercueil wrote:
Le mar. 13 août 2019 à 7:27, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
> [adding Stephen Boyd to Cc]
>
> On Tue, Aug
Le mar. 13 août 2019 à 7:27, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
Hello Paul,
[adding Stephen Boyd to Cc]
On Tue, Aug 13, 2019 at 12:16:23AM +0200, Paul Cercueil wrote:
Le lun. 12 août 2019 à 23:48, Uwe Kleine-König a écrit :
> On Mon, Aug 12, 2019 at 10:43:10PM +0200, P
Hi Philippe,
Le mar. 13 août 2019 à 10:44, Philippe
=?iso-8859-1?q?Mathieu-Daud=E9?= a écrit :
Hi Lee,
On 8/12/19 10:16 AM, Lee Jones wrote:
On Thu, 25 Jul 2019, Paul Cercueil wrote:
It has been replaced with the ingenic-iio driver for the ADC.
Signed-off-by: Paul Cercueil
Tested
[Re-send my message in plain text, as it was bounced by the
lists - sorry about that]
Le lun. 12 août 2019 à 23:48, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
Hello Paul,
On Mon, Aug 12, 2019 at 10:43:10PM +0200, Paul Cercueil wrote:
Le lun. 12 août 2019 à 8:15, Uwe =?iso-8859-1?q
Le lun. 12 août 2019 à 7:55, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
On Fri, Aug 09, 2019 at 07:33:24PM +0200, Paul Cercueil wrote:
Le ven. 9 août 2019 à 19:10, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
> On Fri, Aug 09, 2019 at 02:30:30PM +0200, Paul Cercueil wr
Le lun. 12 août 2019 à 8:15, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
Hello Paul,
On Fri, Aug 09, 2019 at 07:14:45PM +0200, Paul Cercueil wrote:
Le ven. 9 août 2019 à 19:05, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
> On Fri, Aug 09, 2019 at 02:30:28PM +0200, Paul Cercu
with "simple-mfd".
Signed-off-by: Paul Cercueil
---
Notes:
v2: Rebased on v5.3-rc3
drivers/clk/ingenic/jz4725b-cgu.c | 2 +-
drivers/clk/ingenic/jz4740-cgu.c | 2 +-
drivers/clk/ingenic/jz4770-cgu.c | 2 +-
drivers/clk/ingenic/jz4780-cgu.c | 2 +-
4 files changed, 4 insertions(+), 4
Le jeu. 8 août 2019 à 6:23, Stephen Boyd a écrit :
Quoting Paul Cercueil (2019-07-16 10:08:00)
By using CLK_OF_DECLARE_DRIVER instead of the CLK_OF_DECLARE macro,
we
allow the driver to probe also as a platform driver.
While this driver does not have code to probe as a platform driver
Fix wrong code indentation which made the code hard to read, and fix
return with value in void function.
Signed-off-by: Paul Cercueil
---
drivers/mmc/host/jz4740_mmc.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc
We don't need to set the 'slave_id' anymore - that field is never read
by the DMA driver.
Signed-off-by: Paul Cercueil
---
drivers/mmc/host/jz4740_mmc.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c
index 59f81e8afcce
Le ven. 9 août 2019 à 18:41, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
On Fri, Aug 09, 2019 at 02:30:27PM +0200, Paul Cercueil wrote:
Depending on MACH_INGENIC prevent us from creating a generic kernel
that
works on more than one MIPS board. Instead, we just depend on MIPS
being
Le ven. 9 août 2019 à 19:29, Guenter Roeck a
écrit :
On Fri, Aug 09, 2019 at 06:55:26PM +0200, Paul Cercueil wrote:
Hi Guenter,
Le ven. 9 août 2019 à 18:52, Guenter Roeck a
écrit :
>On Fri, Aug 09, 2019 at 01:59:27PM +0200, Paul Cercueil wrote:
>> Hi,
>>
>>
Le ven. 9 août 2019 à 19:10, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
On Fri, Aug 09, 2019 at 02:30:30PM +0200, Paul Cercueil wrote:
The PWM will always start with the inactive part. To counter that,
when PWM is enabled we switch the configured polarity, and use
'period - duty + 1
Le ven. 9 août 2019 à 19:05, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
On Fri, Aug 09, 2019 at 02:30:28PM +0200, Paul Cercueil wrote:
The previous algorithm hardcoded details about how the TCU clocks
work.
The new algorithm will use clk_round_rate to find the perfect clock
rate
Hi Uwe,
Le ven. 9 août 2019 à 18:51, Uwe =?iso-8859-1?q?Kleine-K=F6nig?=
a écrit :
On Fri, Aug 09, 2019 at 02:30:25PM +0200, Paul Cercueil wrote:
The TCU registers are shared between a handful of drivers, accessing
them through the same regmap.
While this driver is devicetree-compatible
Hi Guenter,
Le ven. 9 août 2019 à 18:52, Guenter Roeck a
écrit :
On Fri, Aug 09, 2019 at 01:59:27PM +0200, Paul Cercueil wrote:
Hi,
This patchset comes from a bigger patchset that was cut in smaller
pieces for easier integration to mainline.
(The patchset was https://lkml.org/lkml/2019
Huurne
Signed-off-by: Paul Cercueil
Tested-by: Mathieu Malaterre
Tested-by: Artur Rojek
---
Hi,
This patch comes from a bigger patchset that was cut in smaller pieces
for easier integration to mainline.
(The patchset was https://lkml.org/lkml/2019/3/27/1837)
The only change is the use
The PWM will always start with the inactive part. To counter that,
when PWM is enabled we switch the configured polarity, and use
'period - duty + 1' as the real duty.
Signed-off-by: Paul Cercueil
---
drivers/pwm/pwm-jz4740.c | 22 +-
1 file changed, 13 insertions(+), 9
From: Uwe Kleine-König
The jz4740 PMW implementation doesn't fulfill the (up to now
insufficiently documented) requirements of the PWM API. At least
document them in the driver.
Signed-off-by: Uwe Kleine-König
Signed-off-by: Paul Cercueil
---
drivers/pwm/pwm-jz4740.c | 4
1 file changed
Depending on MACH_INGENIC prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.
Signed-off-by: Paul Cercueil
---
drivers/pwm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pwm/Kconfig b
The TCU channels 0 and 1 were previously reserved for system tasks, and
thus unavailable for PWM.
Signed-off-by: Paul Cercueil
Tested-by: Mathieu Malaterre
Tested-by: Artur Rojek
---
drivers/pwm/pwm-jz4740.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff
hange does not introduce a ABI problem
with current devicetree files.
Signed-off-by: Paul Cercueil
Tested-by: Mathieu Malaterre
Tested-by: Artur Rojek
---
drivers/pwm/Kconfig | 1 +
drivers/pwm/pwm-jz4740.c | 40 ++--
2 files changed, 27 insertions(+), 14
The previous algorithm hardcoded details about how the TCU clocks work.
The new algorithm will use clk_round_rate to find the perfect clock rate
for the PWM channel.
Signed-off-by: Paul Cercueil
Tested-by: Mathieu Malaterre
Tested-by: Artur Rojek
---
drivers/pwm/pwm-jz4740.c | 60
The TCU registers are shared between a handful of drivers, accessing
them through the same regmap.
While this driver is devicetree-compatible, it is never (as of now)
probed from devicetree, so this change does not introduce a ABI problem
with current devicetree files.
Signed-off-by: Paul
Hi,
Patches 1-5 come from a bigger patchset that was cut in smaller
pieces for easier integration to mainline.
(The patchset was https://lkml.org/lkml/2019/3/27/1837)
These patches are the exact same as the ones found in the patchset
shown above, with the exception of patch [1/7] which now uses
ck. In this very specific case it is still okay, as every
Ingenic JZ47xx-based board out there compile the devicetree within the
kernel; so it's still time to push breaking changes, in order to get a
clean devicetree that won't break once it musn't.
Signed-off-by: Paul Cercueil
Reviewed-by: Gue
Depending on MACH_JZ47xx prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.
Signed-off-by: Paul Cercueil
Reviewed-by: Guenter Roeck
---
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Since we broke the ABI by changing the clock, the driver was also
updated to use the regmap provided by the TCU driver.
Signed-off-by: Paul Cercueil
Reviewed-by: Guenter Roeck
Tested-by: Mathieu Malaterre
Tested-by: Artur Rojek
---
drivers/watchdog/Kconfig | 1 +
drivers/watchdog
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