.
- Cleanup FPU state save and restore to be more efficient.
- Cleanups to traps handling and logging.
- Fix issue with poweroff being broken after recent power driver
refactoings.
Stafford Horne (8):
openrisc: Use
On Sun, Apr 14, 2024 at 07:52:03PM +0200, Sebastian Reichel wrote:
> Hi,
>
> On Sun, Mar 31, 2024 at 08:02:28AM +0100, Stafford Horne wrote:
> > After commit 14c5678720bd ("power: reset: syscon-poweroff: Use
> > devm_register_sys_off_handler(POWER_OFF)") setting up
to
be done two times if we have both rescheduling and signal work to do.
However, since OpenRISC FPU state is a single register, I leave these
optimizations for future consideration.
Signed-off-by: Stafford Horne
---
arch/openrisc/include/asm/fpu.h | 22
arch/openrisc/include
Allow disabling FPU related code sequences to save space.
Signed-off-by: Stafford Horne
---
arch/openrisc/Kconfig | 9 +
arch/openrisc/kernel/ptrace.c | 6 ++
arch/openrisc/kernel/traps.c | 3 ++-
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/openrisc
it as an error.
This patch adds conditions to die if the kernel receives these
exceptions in kernel mode code.
Fixes: 27267655c531 ("openrisc: Support floating point user api")
Signed-off-by: Stafford Horne
---
arch/openrisc/kernel/traps.c | 48 ++
The die function calls show_registers unconditionally. Remove calls to
show_registers before calling die to avoid printing all registers and
stack status two times during a crash.
This was found when testing kernel trap and floating point exception
handling.
Signed-off-by: Stafford Horne
The pr_* macros are the convention and my upcoming patches add even more
printk's. Use this opportunity to convert the printks in this file to
the pr_* macros to avoid patch check warnings.
Signed-off-by: Stafford Horne
---
arch/openrisc/kernel/traps.c | 88
the FPCSR state out of the kernel
stack pt_regs and into the task_struct.
Stafford Horne (5):
openrisc: traps: Convert printks to pr_ macros
openrisc: traps: Remove calls to show_registers before die
openrisc: traps: Don't send signals to kernel mode threads
openrisc: Add FPU config
in gnu binutils.
2. Implement two of the missing relocations needed for module loading.
Since v1:
- Added patch suggested by Geert to rename all relocation types to the
R_OR1K_* form.
Stafford Horne (2):
openrisc: Define openrisc relocation types
openrisc: Add support for more module
When testing modules in OpenRISC I found R_OR1K_AHI16 (signed adjusted
high 16-bit) and R_OR1K_SLO16 (split low 16-bit) relocations are used in
modules but not implemented yet.
This patch implements the relocations. I have tested with a few modules.
Signed-off-by: Stafford Horne
---
arch
, not 8 and 7.
They are not used for module loading and I have updated them to use the
correct values.
Signed-off-by: Stafford Horne
---
arch/openrisc/include/uapi/asm/elf.h | 75
arch/openrisc/kernel/module.c| 8 +--
2 files changed, 70 insertions(+), 13
On Thu, Apr 11, 2024 at 02:12:59PM +0200, Geert Uytterhoeven wrote:
> Hi Stafford,
>
> On Wed, Apr 10, 2024 at 10:52 PM Stafford Horne wrote:
> > This patch adds the relocations. Note, we use the old naming R_OR32_*
> > instead or the new naming R_OR1K_* to avoid
as this header is
exported as a user api.
Signed-off-by: Stafford Horne
---
arch/openrisc/include/uapi/asm/elf.h | 2 ++
arch/openrisc/kernel/module.c| 10 ++
2 files changed, 12 insertions(+)
diff --git a/arch/openrisc/include/uapi/asm/elf.h
b/arch/openrisc/include/uapi/asm
n-poweroff: Use
devm_register_sys_off_handler(POWER_OFF)")
Signed-off-by: Stafford Horne
---
arch/openrisc/kernel/process.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/openrisc/kernel/process.c b/arch/openrisc/kernel/process.c
index 86e02929f3ac..3c27d1c727
Hello Linus,
Please consider for pull,
The following changes since commit b401b621758e46812da61fa58a67c3fd8d91de0d:
Linux 6.8-rc5 (2024-02-18 12:56:25 -0800)
are available in the Git repository at:
https://github.com/openrisc/linux.git tags/for-linus
for you to fetch changes up to
On Sat, Mar 09, 2024 at 06:24:07PM +0800, Dawei Li wrote:
> Openrisc's implementation of fix_to_virt() & virt_to_fix() share same
> functionality with ones of asm generic.
>
> Plus, generic version of fix_to_virt() can trap invalid index at compile
> time.
>
> Thus, Replace the arch-specific
On Fri, Feb 09, 2024 at 04:29:30PM -0800, Oreoluwa Babatunde wrote:
> The unflatten_and_copy_device_tree() function contains a call to
> memblock_alloc(). This means that memblock is allocating memory before
> any of the reserved memory regions are set aside in the setup_memory()
> function which
On Tue, Mar 05, 2024 at 10:59:20AM -0800, Oreoluwa Babatunde wrote:
>
> On 2/9/2024 4:29 PM, Oreoluwa Babatunde wrote:
> > The loongarch, openric, and sh architectures allocate memory from
> > memblock before it gets the chance to set aside reserved memory regions.
> > This means that there is a
On Wed, Apr 14, 2021 at 02:45:43PM +0200, Peter Zijlstra wrote:
> On Wed, Apr 14, 2021 at 12:16:38PM +0200, Peter Zijlstra wrote:
> > On Wed, Apr 14, 2021 at 11:05:24AM +0200, Peter Zijlstra wrote:
> >
> > > That made me look at the qspinlock code, and queued_spin_*lock() uses
> > >
On Wed, Apr 14, 2021 at 12:16:38PM +0200, Peter Zijlstra wrote:
> On Wed, Apr 14, 2021 at 11:05:24AM +0200, Peter Zijlstra wrote:
>
> > That made me look at the qspinlock code, and queued_spin_*lock() uses
> > atomic_try_cmpxchg_acquire(), which means any arch that uses qspinlock
> > and has RCpc
On Wed, Apr 07, 2021 at 11:47:49AM +0200, Peter Zijlstra wrote:
> On Wed, Apr 07, 2021 at 08:52:08AM +0900, Stafford Horne wrote:
> > Why doesn't RISC-V add the xchg16 emulation code similar to OpenRISC? For
> > OpenRISC we added xchg16 and xchg8 emulation code to enable qspinloc
On Wed, Apr 07, 2021 at 12:51:56AM +0800, Boqun Feng wrote:
> Hi,
>
> On Wed, Mar 31, 2021 at 02:30:32PM +, guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > Some architectures don't have sub-word swap atomic instruction,
> > they only have the full word's one.
> >
> > The sub-word swap
for atomic operations.
>
> This patch cancels the dependency of on qspinlock generic code on
> architecture's xchg16.
>
> Signed-off-by: Guo Ren
> Cc: Arnd Bergmann
> Cc: Jonas Bonn
> Cc: Stefan Kristiansson
> Cc: Stafford Horne
> Cc: openr...@lists.librecores.org
On Tue, Apr 06, 2021 at 11:50:38AM +0800, Guo Ren wrote:
> On Wed, Mar 31, 2021 at 3:23 PM Arnd Bergmann wrote:
> >
> > On Wed, Mar 31, 2021 at 12:35 AM Stafford Horne wrote:
> > >
> > > I just want to chime in here, there may be a better sp
e that OpenRISC doesn't have xchg16, so using the xchg32 code is
better.
Acked-by: Stafford Horne
> On Wed, Mar 31, 2021 at 8:31 PM Stafford Horne wrote:
> >
> > On Wed, Mar 31, 2021 at 09:23:27AM +0200, Arnd Bergmann wrote:
> > > On Wed, Mar 31, 2021 at 12:35 AM Staffo
Hi Linus,
Please consider for pull,
The following changes since commit a5e13c6df0e41702d2b2c77c8ad41677ebb065b3:
Linux 5.12-rc5 (2021-03-28 15:48:16 -0700)
are available in the Git repository at:
git://github.com/openrisc/linux.git tags/for-linus
for you to fetch changes up to
On Wed, Mar 31, 2021 at 03:06:43PM +0200, Mateusz Holenko wrote:
> From: Zhen Lei
>
> The header file is already included above and can be
> removed here.
>
> Signed-off-by: Zhen Lei
> Signed-off-by: Mateusz Holenko
Thanks, I have staged this.
-Stafford
On Wed, Mar 31, 2021 at 09:23:27AM +0200, Arnd Bergmann wrote:
> On Wed, Mar 31, 2021 at 12:35 AM Stafford Horne wrote:
> >
> > I just want to chime in here, there may be a better spot in the thread to
> > mention this but, for OpenRISC I did implement some generic 8/
On Tue, Mar 30, 2021 at 06:08:40PM +0200, Peter Zijlstra wrote:
> On Tue, Mar 30, 2021 at 11:13:55AM +0800, Guo Ren wrote:
> > On Mon, Mar 29, 2021 at 8:50 PM Peter Zijlstra wrote:
> > >
> > > On Mon, Mar 29, 2021 at 08:01:41PM +0800, Guo Ren wrote:
> > > > u32 a = 0x55aa66bb;
> > > > u16 *ptr =
present cpus
Joel Stanley (2):
openrisc: Add vmlinux.bin target
openrisc: restart: Call common handlers before hanging
Masahiro Yamada (1):
openrisc: add arch/openrisc/Kbuild
Stafford Horne (1):
Merge remote-tracking branch 'openrisc/or1k-5.11-fixes' into
or1k-5.12-updates
set' --decorate
--date=short -n10
2021-02-09 8f722f67452f Jan Henrik Weinstock openrisc: Use devicetree to
determine present cpus (HEAD -> or1k-5.12-updates)
2021-01-25 2261352157a9 Stafford Horne Merge remote-tracking branch
'openrisc/or1k-5.11-fixes' into or1k-5.12-updates (shorne/or1
-by: Stafford Horne
---
arch/openrisc/kernel/smp.c | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c
index 29c82ef2e207..48e1092a64de 100644
--- a/arch/openrisc/kernel/smp.c
+++ b/arch/openrisc/kernel/smp.c
On Fri, Feb 05, 2021 at 05:07:51PM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
>
> On Fri, Feb 5, 2021 at 3:43 PM Stafford Horne wrote:
> > On Mon, Feb 01, 2021 at 12:49:31PM +0100, Jan Henrik Weinstock wrote:
> > > Use the device tree to determine the present cpus
On Mon, Feb 01, 2021 at 12:49:31PM +0100, Jan Henrik Weinstock wrote:
> Use the device tree to determine the present cpus instead of assuming all
> CONFIG_NRCPUS are actually present in the system.
>
> Signed-off-by: Jan Henrik Weinstock
Hi Jan,
I cannot apply this patch, it seems you somehow
On Sun, Jan 31, 2021 at 09:22:31AM +0100, Jan Henrik Weinstock wrote:
> On 31/01/2021 00:03, Stafford Horne wrote:
>
> > This looks good, one small comment below. Can you send the next patch as a
> > v2?
> >
> > Using 'git format-patch -v2 ...'
>
> Sorry, w
Sorry, Please disrecard the g...@lianli.shorne-pla.net address in the mail
distribution list. I must have it a incorrect button.
-Stafford
On Sat, Jan 30, 2021 at 12:00:10PM +0100, Jan Henrik Weinstock wrote:
> Hi Stafford, Geert,
>
> thanks for your feedback. I have made the following changes to the patch:
Hi, Thanks for the updates.
> 1. use for_each_of_cpu_node
> 2. possible_cpus is now what is in the devicetree, up to NR_CPUS
Hi Linus,
Please consider for pull:
The following changes since commit 6ee1d745b7c9fd573fba142a2efdad76a9f1cb04:
Linux 5.11-rc5 (2021-01-24 16:47:14 -0800)
are available in the Git repository at:
git://github.com/openrisc/linux.git tags/for-linus
for you to fetch changes up to
On Fri, Jan 29, 2021 at 07:29:31PM +0100, Jan Henrik Weinstock wrote:
> This patch proposes to use the device tree to determine the present cpus
> instead of assuming all CONFIG_NRCPUS are actually present in the system.
>
> Signed-off-by: Jan Henrik Weinstock
> ---
> arch/openrisc/kernel/smp.c
On Thu, Jan 28, 2021 at 12:49:56AM +0800, David Gow wrote:
> On Wed, Jan 27, 2021 at 8:27 PM Stafford Horne wrote:
> >
> > On Tue, Jan 26, 2021 at 07:36:04PM -0800, David Gow wrote:
> > > The LiteX SOC controller driver makes use of IOMEM functions like
> > &g
On Tue, Jan 26, 2021 at 07:36:04PM -0800, David Gow wrote:
> The LiteX SOC controller driver makes use of IOMEM functions like
> devm_platform_ioremap_resource(), which are only available if
> CONFIG_HAS_IOMEM is defined.
>
> This causes the driver not to be enable under make ARCH=um
On Mon, Jan 25, 2021 at 12:47:46PM +1100, Stephen Rothwell wrote:
> Hi Stafford,
>
> On Mon, 25 Jan 2021 10:04:46 +0900 Stafford Horne wrote:
> >
> > Thank's I knew about this conflict but I was not sure the best way to
> > handle, I
> > was/am going to rebase
On Mon, Jan 25, 2021 at 09:05:06AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the openrisc tree got a conflict in:
>
> drivers/soc/litex/litex_soc_ctrl.c
>
> between commit:
>
> e6dc077b7dff ("soc: litex: Fix compile warning when device tree is not
>
fixup for iounmap
Geert Uytterhoeven (1):
openrisc: io: Add missing __iomem annotation to iounmap()
Stafford Horne (1):
soc: litex: Fix compile warning when device tree is not configured
arch/openrisc/include/asm/io.h
On Wed, Jan 20, 2021 at 09:20:39AM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
>
> On Tue, Jan 19, 2021 at 11:11 PM Stafford Horne wrote:
> > On Wed, Jan 20, 2021 at 06:34:44AM +0900, Stafford Horne wrote:
> > > On Tue, Jan 19, 2021 at 09:09:38AM +0100, Geert Uytterh
On Wed, Jan 20, 2021 at 06:34:44AM +0900, Stafford Horne wrote:
> On Tue, Jan 19, 2021 at 09:09:38AM +0100, Geert Uytterhoeven wrote:
> > Let the LiteX SoC Controller register a restart handler, which resets
> > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> >
>
On Tue, Jan 19, 2021 at 09:09:38AM +0100, Geert Uytterhoeven wrote:
> Let the LiteX SoC Controller register a restart handler, which resets
> the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
>
> Signed-off-by: Geert Uytterhoeven
Thanks, this looks good to me, queued to my linux-next branch.
On Mon, Dec 28, 2020 at 09:33:28AM +0100, Geert Uytterhoeven wrote:
> With C=1:
>
> drivers/soc/renesas/rmobile-sysc.c:330:33: sparse: sparse: incorrect type
> in argument 1 (different address spaces) @@ expected void *addr @@
> got void [noderef] __iomem *[assigned] base @@
>
On Mon, Jan 18, 2021 at 01:27:32PM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
>
> On Mon, Jan 18, 2021 at 12:43 PM Stafford Horne wrote:
> > On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> > > On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne wr
On Sun, Jan 17, 2021 at 05:03:32PM +0900, Masahiro Yamada wrote:
> Describe the subdirectories under arch/openrisc/ in arch/openrisc/Kbuild
> so you can use the standard obj-y syntax.
>
> I removed the CONFIG_OPENRISC_BUILTIN_DTB conditional because it is
> already controlled by
On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
>
> On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne wrote:
> > On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > > On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven
On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven
> wrote:
> > Let the LiteX SoC Controller a register a restart handler, which resets
> > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> >
> > Signed-off-by: Geert
I have queued this for 5.12.
On Tue, Jan 12, 2021 at 12:31:39PM -0500, Gabriel Somlo wrote:
> This series expands on commit 22447a99c97e ("drivers/soc/litex: add LiteX
> SoC Controller driver"), adding support for handling both 8- and 32-bit
> LiteX CSR (MMIO) subregisters, on both 32- and 64-bit
with an ifdef
CONFIG_OF.
Reported-by: kernel test robot
Signed-off-by: Stafford Horne
---
drivers/soc/litex/litex_soc_ctrl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/litex/litex_soc_ctrl.c
b/drivers/soc/litex/litex_soc_ctrl.c
index 1217cafdfd4d
On Mon, Jan 11, 2021 at 09:43:34AM -0700, Nathan Chancellor wrote:
> On Mon, Jan 11, 2021 at 09:30:55PM +0900, Stafford Horne wrote:
> > On Thu, Jan 07, 2021 at 04:04:47AM +0800, kernel test robot wrote:
> > > Hi Pawel,
> > >
> > > FYI, the error/warn
On Thu, Jan 07, 2021 at 04:04:47AM +0800, kernel test robot wrote:
> Hi Pawel,
>
> FYI, the error/warning still remains.
>
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62
> commit:
On Sun, Dec 27, 2020 at 07:44:46PM +1030, Joel Stanley wrote:
> Currently openrisc will print a message and then hang in an infinite
> loop when rebooting.
>
> This patch adopts some code from ARM, which calls the common restart
> infrastructure and hangs after a small delay if the restart infra
On Fri, Dec 25, 2020 at 07:16:46PM -0500, Gabriel Somlo wrote:
> This series expands on commit 22447a99c97e ("drivers/soc/litex: add LiteX
> SoC Controller driver"), adding support for handling both 8- and 32-bit
> LiteX CSR (MMIO) subregisters, on both 32- and 64-bit CPUs.
>
> Notes v4:
>
On Fri, Dec 25, 2020 at 09:21:20AM -0500, Gabriel Somlo wrote:
> Upstream LiteX now defaults to using 32-bit CSR subregisters
> (see https://github.com/enjoy-digital/litex/commit/a2b71fde).
>
> This patch expands on commit 22447a99c97e ("drivers/soc/litex: add
> LiteX SoC Controller driver"),
On Tue, Dec 22, 2020 at 05:04:46PM -0500, Gabriel Somlo wrote:
> The upstream LiteX project now defaults to using 32-bit subregisters
> (see https://github.com/enjoy-digital/litex/commit/a2b71fde).
>
> This patch expands on commit 22447a99c97e, adding support for handling
> both 8 and 32 bit
On Tue, Dec 22, 2020 at 04:22:16PM +0900, Masahiro Yamada wrote:
> On Tue, Dec 22, 2020 at 4:07 PM Joel Stanley wrote:
> >
> > Build it by default. This is commonly used by fpga targets.
> >
> > Signed-off-by: Joel Stanley
> > ---
> > v2: Address review from Masahiro
> >
> > - Add vmlinux.bin
On Fri, Dec 18, 2020 at 03:17:06PM -0600, Rob Herring wrote:
> On Fri, 04 Dec 2020 17:38:11 +0800, Zhen Lei wrote:
> > When I do dt_binding_check for any YAML file, below wanring is always
> > reported:
> >
> > xxx/soc/litex/litex,soc-controller.yaml: 'additionalProperties' is a
> > required
LiteUART driver
openrisc: add support for LiteX
Pawel Czarnecki (2):
dt-bindings: soc: document LiteX SoC Controller bindings
drivers/soc/litex: add LiteX SoC Controller driver
Stafford Horne (2):
openrisc: fix trap for debugger breakpoint signalling
openrisc: add
local64.h to OpenRISC fixes the build
issue.
Cc: Tejun Heo
Signed-off-by: Stafford Horne
---
arch/openrisc/include/asm/Kbuild | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild
index ca5987e11053..442f3d3bcd90 100644
--- a/arc
On Tue, Sep 01, 2020 at 02:52:33PM -0400, Tejun Heo wrote:
> blk-iocost has been reading percpu stat counters from remote cpus which on
> some archs can lead to torn reads in really rare occassions. Use local[64]_t
> for those counters.
>
> Signed-off-by: Tejun Heo
> ---
> block/blk-iocost.c |
From: Filip Kokosinski
This adds support for a basic LiteX-based SoC with a mor1kx soft CPU.
Signed-off-by: Filip Kokosinski
Signed-off-by: Mateusz Holenko
[shorne: Merged in soc-cntl patch, removed CROSS_COMPILE, sort MAINT.]
Signed-off-by: Stafford Horne
---
MAINTAINERS
TRAP_BRKPT. Adding 4 to the pc was incorrect and
causing GDB to think the breakpoint was not hit.
Fixing these allows GDB to work now.
Signed-off-by: Stafford Horne
---
arch/openrisc/kernel/traps.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/openrisc/kernel
On Tue, Oct 13, 2020 at 04:45:09PM +0200, Mateusz Holenko wrote:
> This patchset introduces support for LiteX SoC Controller
> and LiteUART - serial device from LiteX SoC builder
> (https://github.com/enjoy-digital/litex).
>
> In the following patchset I will add
> a new mor1kx-based (OpenRISC)
On Fri, Oct 16, 2020 at 11:06:38AM +0200, Greg Kroah-Hartman wrote:
> On Fri, Oct 16, 2020 at 08:05:17AM +0900, Stafford Horne wrote:
> > On Fri, Oct 16, 2020, 6:46 AM Jann Horn wrote:
> >
> > > +openrisc folks
> > >
> > > On Thu, Oct 15, 2020 at 11:28
On Mon, Sep 14, 2020 at 12:33:11PM +0200, Mateusz Holenko wrote:
> On Fri, Sep 11, 2020 at 2:57 AM Stafford Horne wrote:
> >
> > On Wed, Aug 12, 2020 at 02:34:34PM +0200, Mateusz Holenko wrote:
> > > From: Pawel Czarnecki
> > >
> > > This commi
On Fri, Sep 11, 2020 at 02:37:14PM +0800, kernel test robot wrote:
> Hi Stafford,
>
> FYI, the error/warning still remains.
A change was merged to master today that should fix this. Please let me know if
it's still an issue.
-Stafford
On Fri, Sep 11, 2020 at 02:37:14PM +0800, kernel test robot wrote:
> Hi Stafford,
>
> FYI, the error/warning still remains.
>
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: 581cb3a26baf846ee9636214afaa5333919875b1
> commit:
patches.
Stafford Horne (3):
openrisc: Reserve memblock for initrd
openrisc: Fix cache API compile issue when not inlining
openrisc: Fix issue with get_user for 64-bit values
arch/openrisc/include/asm/uaccess.h | 33
On Fri, Sep 11, 2020 at 10:55:26PM +0200, Luc Van Oostenryck wrote:
> On Fri, Sep 11, 2020 at 08:39:40AM +0900, Stafford Horne wrote:
> > A build failure was raised by kbuild with the following error.
> >
> > drivers/android/binder.c: Assembler messages:
> > dr
On Wed, Aug 12, 2020 at 02:33:46PM +0200, Mateusz Holenko wrote:
> This patchset introduces support for LiteX SoC Controller
> and LiteUART - serial device from LiteX SoC builder
> (https://github.com/enjoy-digital/litex).
>
> In the following patchset I will add
> a new mor1kx-based (OpenRISC)
On Wed, Aug 12, 2020 at 02:34:34PM +0200, Mateusz Holenko wrote:
> From: Pawel Czarnecki
>
> This commit adds driver for the FPGA-based LiteX SoC
> Controller from LiteX SoC builder.
>
> Co-developed-by: Mateusz Holenko
> Signed-off-by: Mateusz Holenko
> Signed-off-by: Pawel Czarnecki
> ---
-by: Stafford Horne
Cc: Luc Van Oostenryck
---
Changes since v2:
- Add back temporary variables but move to a different place, as described in
commit message.
Changes since v1:
- New
arch/openrisc/include/asm/uaccess.h | 33 ++---
1 file changed, 21 insertions(+), 12
r,
however because of no inlining a register argument is passed causing a
failure. Fix this by using __always_inline.
Link: https://lore.kernel.org/lkml/202008200453.ohnhqkjq%25...@intel.com/
Signed-off-by: Stafford Horne
---
Changes since v2:
- None
Changes since v1:
- New
arch/openrisc/mm/c
quot;, as per Mike's comments
This is a few fixes found during testing 5.9.
Stafford Horne (3):
openrisc: Reserve memblock for initrd
openrisc: Fix cache API compile issue when not inlining
openrisc: Fix issue with get_user for 64-bit values
arch/openrisc/includ
: ff6c923dbec3 ("openrisc: Add support for external initrd images")
Signed-off-by: Stafford Horne
Reviewed-by: Mike Rapoport
---
Changes since v2:
- None
Changes since v1:
- Updated to use separate variables as suggested by Mike.
arch/openrisc/kernel/setup.c | 10 ++
1 file c
On Sun, Sep 06, 2020 at 02:22:28AM +0200, Luc Van Oostenryck wrote:
> On Sun, Sep 06, 2020 at 06:34:08AM +0900, Stafford Horne wrote:
> > On Sat, Sep 05, 2020 at 03:57:14PM +0200, Luc Van Oostenryck wrote:
> > > On Sat, Sep 05, 2020 at 10:19:35PM +0900, Stafford Horne wrot
On Sat, Sep 05, 2020 at 03:57:14PM +0200, Luc Van Oostenryck wrote:
> On Sat, Sep 05, 2020 at 10:19:35PM +0900, Stafford Horne wrote:
>
> Hi,
>
> The change for 64-bit get_user() looks good to me.
> But I wonder, given that openrisc is big-endian, what will happen
>
On Sat, Sep 05, 2020 at 10:19:33PM +0900, Stafford Horne wrote:
> Recently OpenRISC added support for external initrd images, but I found
> some instability when using larger buildroot initrd images. It turned
> out that I forgot to reserve the memblock space for the initrd image.
>
On Sat, Sep 05, 2020 at 10:19:32PM +0900, Stafford Horne wrote:
> Changes since v1:
>
> - Now a series, v1 was only the "Reserve memblock for initrd" patch
> - Added fixes for compiler issues pointed out by the kbuild robot
Forgot to mention:
- Updated "Reserve m
.ohnhqkjq%25...@intel.com/
Signed-off-by: Stafford Horne
---
arch/openrisc/include/asm/uaccess.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/openrisc/include/asm/uaccess.h
b/arch/openrisc/include/asm/uaccess.h
index f0390211236b..4a8976dda1a5 100644
r,
however because of no inlining a register argument is passed causing a
failure. Fix this by using __always_inline.
Link: https://lore.kernel.org/lkml/202008200453.ohnhqkjq%25...@intel.com/
Signed-off-by: Stafford Horne
---
arch/openrisc/mm/cache.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
: ff6c923dbec3 ("openrisc: Add support for external initrd images")
Signed-off-by: Stafford Horne
---
arch/openrisc/kernel/setup.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index b18e775f8be3..13c87f1f872b 100644
Changes since v1:
- Now a series, v1 was only the "Reserve memblock for initrd" patch
- Added fixes for compiler issues pointed out by the kbuild robot
This is a few fixes found during testing 5.9.
Stafford Horne (3):
openrisc: Reserve memblock for initrd
openrisc: Fix cache A
On Tue, Sep 01, 2020 at 03:11:30PM +0300, Mike Rapoport wrote:
> On Tue, Sep 01, 2020 at 07:20:44PM +0900, Stafford Horne wrote:
> > On Tue, Sep 01, 2020 at 08:59:24AM +0300, Mike Rapoport wrote:
> > > On Tue, Sep 01, 2020 at 06:21:01AM +0900, Stafford Horne wrote:
> > >
On Tue, Sep 01, 2020 at 08:59:24AM +0300, Mike Rapoport wrote:
> On Tue, Sep 01, 2020 at 06:21:01AM +0900, Stafford Horne wrote:
> > Recently OpenRISC added support for external initrd images, but I found
> > some instability when using larger buildroot initrd images. It turned
: ff6c923dbec3 ("openrisc: Add support for external initrd images")
Signed-off-by: Stafford Horne
---
arch/openrisc/kernel/setup.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index b18e775f8be3..2c8aa53cc7ba 100644
of user threads.
Luc Van Oostenryck (1):
openrisc: fix __user in raw_copy_to_user()'s prototype
Stafford Horne (11):
init: Align init_task to avoid conflict with MUTEX_FLAGS
openrisc: Add support for external initrd
On Sun, Aug 09, 2020 at 01:08:42AM +0200, Luc Van Oostenryck wrote:
> On Sun, Aug 09, 2020 at 07:48:22AM +0900, Stafford Horne wrote:
> > On Thu, Aug 06, 2020 at 09:04:49PM +0200, Luc Van Oostenryck wrote:
> > > On Thu, Aug 06, 2020 at 06:07:24AM +0900, St
Now that __user annotations are fixed for openrisc uaccess api's we can
add checking to the access_ok macro. This patch adds the __chk_user_ptr
check, on normal builds the added check is a nop.
Signed-off-by: Stafford Horne
Reviewed-by: Luc Van Oostenryck
---
Changes since v2:
- Remove
ly working on the access_ok macro to fixup sparse
annotations in OpenRISC.
Suggested-by: Linus Torvalds
Signed-off-by: Stafford Horne
Reviewed-by: Luc Van Oostenryck
---
arch/openrisc/include/asm/uaccess.h | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/openri
/io.h.
Signed-off-by: Stafford Horne
---
Changes since v2:
- none
Changes since v1:
- Add linux/types.h include following report from kbuild
arch/openrisc/include/asm/io.h | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/openrisc/include/asm/io.h b/arch/openrisc
:32:got struct sigset_t *
Signed-off-by: Stafford Horne
Reviewed-by: Luc Van Oostenryck
---
Changes since v2:
- Remove __force in cast suggested by Luc Van Oostenryck
arch/openrisc/kernel/signal.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch
Since commit b48b2c3e5043 ("openrisc: use generic strnlen_user()
function") the macro __addr_ok is no longer used. It is safe to remove
so this patch removes it.
Signed-off-by: Stafford Horne
---
arch/openrisc/include/asm/uaccess.h | 3 ---
1 file changed, 3 deletions(-)
diff --
:expected unsigned char const *__gu_addr
net/ipv4/ip_sockglue.c:764:29:got unsigned char [noderef] __user *
Signed-off-by: Stafford Horne
Reviewed-by: Luc Van Oostenryck
---
arch/openrisc/include/asm/uaccess.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch
ist/kbuild-...@lists.01.org/thread/MB6SE7BX425ENFTSIL6KAOB3CVS4WJLH/
Also this includes a few cleanups which I noticed while working on the warning
fixups.
-Stafford
Stafford Horne (6):
openrisc: io: Fixup defines and move include to the end
openrisc: uaccess: Fix sparse address space warnings
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