在 2017-08-24 14:07,Maxime Ripard 写道:
On Wed, Aug 23, 2017 at 11:13:04PM +0800, icen...@aosc.io wrote:
在 2017-08-23 22:35,Maxime Ripard 写道:
> On Wed, Aug 23, 2017 at 07:56:29PM +0800, icen...@aosc.io wrote:
> > > > + reg = <0x01c0f000 0x1000>;
> > > > + clocks
在 2017-08-24 14:07,Maxime Ripard 写道:
On Wed, Aug 23, 2017 at 11:13:04PM +0800, icen...@aosc.io wrote:
在 2017-08-23 22:35,Maxime Ripard 写道:
> On Wed, Aug 23, 2017 at 07:56:29PM +0800, icen...@aosc.io wrote:
> > > > + reg = <0x01c0f000 0x1000>;
> > > > + clocks
On Wed, Aug 23, 2017 at 11:13:04PM +0800, icen...@aosc.io wrote:
> 在 2017-08-23 22:35,Maxime Ripard 写道:
> > On Wed, Aug 23, 2017 at 07:56:29PM +0800, icen...@aosc.io wrote:
> > > > > + reg = <0x01c0f000 0x1000>;
> > > > > + clocks = < CLK_BUS_MMC0>, <
On Wed, Aug 23, 2017 at 11:13:04PM +0800, icen...@aosc.io wrote:
> 在 2017-08-23 22:35,Maxime Ripard 写道:
> > On Wed, Aug 23, 2017 at 07:56:29PM +0800, icen...@aosc.io wrote:
> > > > > + reg = <0x01c0f000 0x1000>;
> > > > > + clocks = < CLK_BUS_MMC0>, <
在 2017-08-23 22:35,Maxime Ripard 写道:
On Wed, Aug 23, 2017 at 07:56:29PM +0800, icen...@aosc.io wrote:
> > + reg = <0x01c0f000 0x1000>;
> > + clocks = < CLK_BUS_MMC0>, < CLK_MMC0>;
> > + clock-names = "ahb", "mmc";
> > +
在 2017-08-23 22:35,Maxime Ripard 写道:
On Wed, Aug 23, 2017 at 07:56:29PM +0800, icen...@aosc.io wrote:
> > + reg = <0x01c0f000 0x1000>;
> > + clocks = < CLK_BUS_MMC0>, < CLK_MMC0>;
> > + clock-names = "ahb", "mmc";
> > +
On Wed, Aug 23, 2017 at 07:56:29PM +0800, icen...@aosc.io wrote:
> > > + reg = <0x01c0f000 0x1000>;
> > > + clocks = < CLK_BUS_MMC0>, < CLK_MMC0>;
> > > + clock-names = "ahb", "mmc";
> > > + resets = < RST_BUS_MMC0>;
> > > +
On Wed, Aug 23, 2017 at 07:56:29PM +0800, icen...@aosc.io wrote:
> > > + reg = <0x01c0f000 0x1000>;
> > > + clocks = < CLK_BUS_MMC0>, < CLK_MMC0>;
> > > + clock-names = "ahb", "mmc";
> > > + resets = < RST_BUS_MMC0>;
> > > +
在 2017-08-23 04:05,Maxime Ripard 写道:
Hi,
On Tue, Aug 22, 2017 at 02:17:40PM +0800, Icenowy Zheng wrote:
From: Chen-Yu Tsai
The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
The R40 is a smaller chip than the A20, but features the same set
of programmable pins,
在 2017-08-23 04:05,Maxime Ripard 写道:
Hi,
On Tue, Aug 22, 2017 at 02:17:40PM +0800, Icenowy Zheng wrote:
From: Chen-Yu Tsai
The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
The R40 is a smaller chip than the A20, but features the same set
of programmable pins, with a couple
于 2017年8月23日 GMT+08:00 上午4:05:21, Maxime Ripard
写到:
>Hi,
>
>On Tue, Aug 22, 2017 at 02:17:40PM +0800, Icenowy Zheng wrote:
>> From: Chen-Yu Tsai
>>
>> The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
>> The R40 is a smaller
于 2017年8月23日 GMT+08:00 上午4:05:21, Maxime Ripard
写到:
>Hi,
>
>On Tue, Aug 22, 2017 at 02:17:40PM +0800, Icenowy Zheng wrote:
>> From: Chen-Yu Tsai
>>
>> The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
>> The R40 is a smaller chip than the A20, but features the same set
>> of
Hi,
On Tue, Aug 22, 2017 at 02:17:40PM +0800, Icenowy Zheng wrote:
> From: Chen-Yu Tsai
>
> The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
> The R40 is a smaller chip than the A20, but features the same set
> of programmable pins, with a couple extra pins and
Hi,
On Tue, Aug 22, 2017 at 02:17:40PM +0800, Icenowy Zheng wrote:
> From: Chen-Yu Tsai
>
> The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
> The R40 is a smaller chip than the A20, but features the same set
> of programmable pins, with a couple extra pins and some new pin
>
From: Chen-Yu Tsai
The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
The R40 is a smaller chip than the A20, but features the same set
of programmable pins, with a couple extra pins and some new pin
functions. The chip features 4 Cortex-A7 cores and a Mali-400 MP2
From: Chen-Yu Tsai
The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
The R40 is a smaller chip than the A20, but features the same set
of programmable pins, with a couple extra pins and some new pin
functions. The chip features 4 Cortex-A7 cores and a Mali-400 MP2
GPU. It
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