The Keystone arch has compatible nand device, so reuse it.
In case with Keystone it depends on TI_AEMIF because AEMIF
driver is responsible to set timings.
See http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
Signed-off-by: Ivan Khoronzhuk
---
.../devicetree/bindings/mtd/davinci-nand.txt |
The problem that the set timings code contains the call of Davinci
platform function davinci_aemif_setup_timing() which is not
accessible if kernel is built for Keystone only.
The Keysone platform is going to use TI AEMIF driver.
If TI AEMIF is used we don't need to set timings and bus width.
It
If the GRSTCTL_CSFTRST self-clearing bit never comes
back to 0 for any reason, the controller is under reset
state and cannot be used. It's preferable to abort
initialization in such case.
Signed-off-by: Julien Delacou
---
drivers/staging/dwc2/core.c | 58
On Wed, Nov 20, 2013 at 08:28:34AM -0700, Shuah Khan wrote:
> On 11/18/2013 11:41 AM, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 3.4.70 release.
> > There are 12 patches in this series, all will be posted as a response
> > to this one. If anyone has any
On Wed, Nov 20, 2013 at 08:04:45PM +0900, Satoru Takeuchi wrote:
> At Mon, 18 Nov 2013 10:41:33 -0800,
> Greg Kroah-Hartman wrote:
> >
> > This is the start of the stable review cycle for the 3.4.70 release.
> > There are 12 patches in this series, all will be posted as a response
> > to this
On Wed, Nov 20, 2013 at 08:12:37AM -0800, Markus Mayer wrote:
> On 19 November 2013 11:07, Markus Mayer wrote:
> > This commit adds support for the watchdog timer used on the BCM281xx
> > family of SoCs.
> >
> > Signed-off-by: Markus Mayer
> > Reviewed-by: Matt Porter
> > Reviewed-by: Guenter
On Wed, Nov 20, 2013 at 05:26:57PM +0800, Peng Tao wrote:
> On Wed, Nov 20, 2013 at 2:37 AM, Greg Kroah-Hartman
> wrote:
> > On Tue, Nov 19, 2013 at 09:23:43PM +0800, Peng Tao wrote:
> >> From: Amir Shehata
> >>
> >> The core of the issue is that the selftest module doesn't sanitize its
> >> own
Theodore Ts'o wrote:
Historically, Intel has been really good about avoiding this, but
since they've moved to using 3rd party flash controllers, I now advise
everyone who plans to use any flash storage, regardless of the
manufacturer, to do their own explicit power fail testing (hitting the
Hello, Alexander.
On Fri, Oct 18, 2013 at 07:12:06PM +0200, Alexander Gordeev wrote:
> @@ -744,23 +744,6 @@ static int msix_capability_init(struct pci_dev *dev,
>
> return 0;
>
> -out_avail:
> - if (ret < 0) {
> - /*
> - * If we had some success, report the
This series contains updates of Davinci nand driver, in order to be
reused for Keystone platform.
Depends on:
- Davinci nand driver fixes and updates:
https://lkml.org/lkml/2013/11/20/271
- Introduce AEMIF driver for Davinci/Keystone archs:
http://lkml.org/lkml/2013/11/11/352
V1:
The TI AEMIF driver registers are used to setup timings for each chip
select. The same registers range is used to setup NAND settings.
The AEMIF and NAND drivers not use the same registers in this range.
In case with TI AEMIF driver, the memory address range is requested
already by AEMIF, so we
On 11/20/2013 2:58 AM, Peter Zijlstra wrote:
On Wed, Nov 20, 2013 at 11:28:03AM +0100, Peter Zijlstra wrote:
On Tue, Nov 19, 2013 at 01:06:30PM -0800, Jacob Pan wrote:
I applied this patch on top of upstream kernel (801a760) and found out
my machine completely failed to enter idle when nothing
Hello,
On Fri, Oct 18, 2013 at 07:12:11PM +0200, Alexander Gordeev wrote:
> Make pci_msix_table_size() return error code if the device
> does not support MSI-X. This update is needed to create a
> consistent MSI-X counterpart for pci_get_msi_cap() MSI
> interface.
>
> Device drivers can use this
On 11/20/2013 01:07 AM, Christoph Hellwig wrote:
>> Just stumbled on that too. You need one more, btw, for the sg failure
>> case:
>>
>>
>> diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
>> index 588479d58f52..6a680d4de7f1 100644
>> --- a/drivers/block/virtio_blk.c
>> +++
Hi Herbert,
Is the crypto tree the right tree to go through for this support
or would you prefer I go through another tree?
Thanks,
Tom
On Tuesday, November 12, 2013 11:45:59 AM Tom Lendacky wrote:
> Resending because of typo in mailing list address...
>
> The following series implements
On 11/20/2013 01:04 AM, Christoph Hellwig wrote:
> On Tue, Nov 19, 2013 at 02:43:51PM -0700, Jens Axboe wrote:
>> No, the nr_requests isn't actually relevant in the blk-mq context, the
>> driver sets its own depth. For the above, it's 64 normal commands, and 2
>> reserved. The reserved would be
On Fri, Oct 18, 2013 at 07:12:10PM +0200, Alexander Gordeev wrote:
> As result of introduction of pci_get_msi_cap() interface
> pci_enable_msi_block_auto() function became superflous.
>
> To enable maximum possible number of MSIs drivers will
> first obtain that number from pci_get_msi_cap()
Hi Linus,
Please pull the latest fixes for the parisc architecture from
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux.git
parisc-3.13
which has the following fixes:
- revert an access_ok() patch which broke 32bit userspace on 64bit kernels
- avoid a gcc miscompilation in
On Wed, Nov 20, 2013 at 08:16:32AM -0500, Josh Boyer wrote:
> On Tue, Nov 19, 2013 at 09:39:19PM -0800, Greg KH wrote:
> > On Tue, Nov 19, 2013 at 08:56:59PM -0500, Josh Boyer wrote:
> > > On Mon, Nov 18, 2013 at 10:03:10AM +0100, Sascha Hauer wrote:
> > > > On Tue, Nov 12, 2013 at 12:15:45PM
Hello,
On Fri, Oct 18, 2013 at 07:12:09PM +0200, Alexander Gordeev wrote:
> +If this function returns a negative number, it indicates the device is
> +not capable of sending MSIs.
Wouldn't "errno" better describe the error return rather than
"negative number"?
> @@ -795,6 +795,21 @@ static int
On 20/11/2013 16:01, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 13:08 Wed 28 Aug , Boris BREZILLON wrote:
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
On 20/11/2013 15:59, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 13:06 Wed 28 Aug , Boris BREZILLON wrote:
Add slot0 of mmc0 pinctrl pins definitions:
- detect pin
- write protect pin
- enable slot0 pin: this pin is connected to an external switch which
enable mmc0 slot0 or spi
On Wed, 2013-11-20 at 18:06 +0200, Michael S. Tsirkin wrote:
> Hmm some kind of disconnect here.
> I got you rmanagement about bufferbloat.
>
> What I am saying is that maybe we should drop packets more
> aggressively: when we drop one packet of a flow, why not
> drop everything that's queued
Hello,
On Fri, Oct 18, 2013 at 07:12:08PM +0200, Alexander Gordeev wrote:
> Make pci_enable_msix() and pci_enable_msi_block() consistent
> with regard to the type of 'nvec' argument. Indeed, a number
> of vectors to allocate is a natural value, so make it unsigned.
I'm personally not a big fan
On 19 November 2013 11:07, Markus Mayer wrote:
> This commit adds support for the watchdog timer used on the BCM281xx
> family of SoCs.
>
> Signed-off-by: Markus Mayer
> Reviewed-by: Matt Porter
> Reviewed-by: Guenter Roeck
> ---
> drivers/watchdog/Kconfig| 22 +++
>
On Fri, Oct 18, 2013 at 07:12:07PM +0200, Alexander Gordeev wrote:
> Signed-off-by: Alexander Gordeev
> Suggested-by: Ben Hutchings
Yes, please.
Reviewed-by: Tejun Heo
Thanks.
--
tejun
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
Ingo, please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/oleg/misc uprobes/core
Another short series. No functional changes, everything was acked.
Oleg Nesterov (5):
uprobes: Add uprobe_task->dup_xol_work/dup_xol_addr
uprobes: Don't assume that arch_uprobe->insn/ixol
On Mon, Nov 18, 2013 at 05:17:31PM -0800, David Rientjes wrote:
> On Mon, 18 Nov 2013, Johannes Weiner wrote:
>
> > > Um, no, those processes are going through a repeated loop of direct
> > > reclaim, calling the oom killer, iterating the tasklist, finding an
> > > existing oom killed process
On Wed, Nov 20, 2013 at 07:16:33AM -0800, Eric Dumazet wrote:
> On Wed, 2013-11-20 at 10:58 +0200, Michael S. Tsirkin wrote:
> > On Tue, Nov 19, 2013 at 02:00:11PM -0800, Eric Dumazet wrote:
> > > On Tue, 2013-11-19 at 23:53 +0200, Michael S. Tsirkin wrote:
> > >
> > > > Which NIC? Virtio? Prior
On Fri, 2013-11-08 at 08:46 -0700, Bjorn Helgaas wrote:
>
> I don't know the IOMMU drivers well either, but it seems like they
> rely on notifications of device addition and removal (see
> iommu_bus_notifier()). It doesn't seem right for them to also use the
> generic PCI interfaces like
On 20/11/2013 15:56, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 13:02 Wed 28 Aug , Boris BREZILLON wrote:
Add spi0 cs pinctrl pins definitions.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200.dtsi | 20
1 file changed, 20 insertions(+)
diff --git
On 20/11/2013 15:57, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 13:04 Wed 28 Aug , Boris BREZILLON wrote:
Add vbus and pullup pinctrl definitions.
Request the vbus and pullup pins in usb1 node.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek.dts | 15 +++
On Fri, Oct 18, 2013 at 07:12:05PM +0200, Alexander Gordeev wrote:
> If populate_msi_sysfs() function failed msix_capability_init()
> must return the error code, but it returns the success instead.
> This update fixes the described misbehaviour.
>
> Signed-off-by: Alexander Gordeev
Reviewed-by:
On Wed, Nov 20, 2013 at 10:37:03AM -0500, Theodore Ts'o wrote:
> On Wed, Nov 20, 2013 at 08:52:36PM +0530, Chinmay V S wrote:
> >
> > If you have confirmed the performance numbers, then it indicates that
> > the Intel 530 controller is more advanced and makes better use of the
> > internal
On 11/20/2013 05:46 PM, Arnd Bergmann wrote:
On Wednesday 20 November 2013, Ivan Khoronzhuk wrote:
Extend bindings for davinci_nand driver to be more clear.
Signed-off-by: Ivan Khoronzhuk
---
.../devicetree/bindings/mtd/davinci-nand.txt | 77 ++--
1 file changed, 54
On Wed, 2013-11-20 at 12:56 +0100, Rafael J. Wysocki wrote:
> On Tuesday, November 19, 2013 06:22:07 PM Toshi Kani wrote:
> > On Wed, 2013-11-20 at 01:08 +0100, Rafael J. Wysocki wrote:
> > > On Wednesday, November 20, 2013 12:42:28 AM Rafael J. Wysocki wrote:
> > > > On Tuesday, November 19, 2013
On 14:37 Wed 28 Aug , Boris BREZILLON wrote:
> Add a new at91rm9200ek_mmc board (based on at91rm9200ek board) which enables
> mmc0/slot0.
no for multiple dts
this need to handle at user space level
Best Regards,
J.
>
> Signed-off-by: Boris BREZILLON
> ---
>
Add new AEMIF driver for EMIF16 Texas Instruments controller.
The EMIF16 module is intended to provide a glue-less interface to
a variety of asynchronous memory devices like ASRA M, NOR and NAND
memory. A total of 256M bytes of any of these memories can be
accessed at any given time via four chip
Add bindings for AEMIF controller drivers/memory/ti-aemif.c
Signed-off-by: Ivan Khoronzhuk
---
.../bindings/memory-controllers/ti-aemif.txt | 198
1 file changed, 198 insertions(+)
create mode 100644
Documentation/devicetree/bindings/memory-controllers/ti-aemif.txt
These patches introduce Async External Memory Interface (EMIF16/AEMIF)
controller driver for Davinci/Keystone archs.
V1:
https://lkml.org/lkml/2013/11/11/352
Ivan Khoronzhuk (2):
memory: ti-aemif: introduce AEMIF driver
memory: ti-aemif: add bindings for AEMIF driver
On Wednesday 20 November 2013, Ivan Khoronzhuk wrote:
> Extend bindings for davinci_nand driver to be more clear.
>
> Signed-off-by: Ivan Khoronzhuk
> ---
> .../devicetree/bindings/mtd/davinci-nand.txt | 77
> ++--
> 1 file changed, 54 insertions(+), 23 deletions(-)
Hi
On 13-11-20 07:34 AM, Jan Kiszka wrote:
> On 2013-11-20 13:26, Frederich, Jens wrote:
>> Hello,
>>
>> I got a Kernel panic by some long time stress tests. Look here:
>> http://dy.cx/pqP7M.
>
> Ah, that should be http://thread.gmane.org/gmane.linux.kernel/1564783
>
> Paul, was there any
Hello,
Sorry about the long delay. Was traveling quite a bit.
On Fri, Oct 18, 2013 at 07:12:04PM +0200, Alexander Gordeev wrote:
> Signed-off-by: Alexander Gordeev
Please explain what the race condition in detail and how it gets fixed
by the patch. This isn't a trivial change and non-trivial
On Wed, Nov 20, 2013 at 08:52:36PM +0530, Chinmay V S wrote:
>
> If you have confirmed the performance numbers, then it indicates that
> the Intel 530 controller is more advanced and makes better use of the
> internal disk-cache to achieve better performance (as compared to the
> Intel 520). Thus
On Wed, Nov 20, 2013 at 03:12:11PM +0100, Krzysztof Kozlowski wrote:
> + size = sizeof(struct regulator_dev *) * pdata->num_regulators;
> + info->regulators = devm_kzalloc(>dev, size, GFP_KERNEL);
> + if (!info->regulators) {
> + dev_err(>dev, "Cannot allocate memory for
On Tue, Nov 19, 2013 at 05:37:43PM -0800, Tim Chen wrote:
> This patch corrects the way memory barriers are used in the MCS lock
> with smp_load_acquire and smp_store_release fucnction.
> It removes ones that are not needed.
>
> It uses architecture specific load-acquire and store-release
>
On Wed, Nov 20, 2013 at 03:12:08PM +0100, Krzysztof Kozlowski wrote:
> +static irqreturn_t max14577_irq_thread(int irq, void *data)
> +{
> + struct max14577 *max14577 = data;
> + u8 irq_reg[MAX14577_IRQ_REGS_NUM] = {0};
> + u8 tmp_irq_reg[MAX14577_IRQ_REGS_NUM] = {};
> + int i,
On 11/18/2013 11:41 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 3.4.70 release.
There are 12 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be
On 11/18/2013 11:42 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 3.10.20 release.
There are 24 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be
On 11/18/2013 11:40 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 3.11.9 release.
There are 25 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be
On 11/18/2013 11:37 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 3.12.1 release.
There are 19 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be
This series contains fixes and updates of Davinci nand driver, in
order to prepare it to be reused for Keystone platform.
V1:
https://lkml.org/lkml/2013/11/11/352
Ivan Khoronzhuk (7):
mtd: nand: davinci: fix driver registration
mtd: nand: davinci: return ENOMEM if memory allocation is failed
There is not needed to use a lot of names for err handling.
It complicates code support and reading.
Signed-off-by: Ivan Khoronzhuk
Acked-by: Santosh Shilimkar
---
drivers/mtd/nand/davinci_nand.c | 46 +++
1 file changed, 17 insertions(+), 29 deletions(-)
Extend bindings for davinci_nand driver to be more clear.
Signed-off-by: Ivan Khoronzhuk
---
.../devicetree/bindings/mtd/davinci-nand.txt | 77 ++--
1 file changed, 54 insertions(+), 23 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/davinci-nand.txt
The properties davinci-ecc-mode, davinci-nand-use-bbt, davinci-nand-buswidth
are MTD generic. Correct names for them are: nand-ecc-mode, nand-on-flash-bbt,
nand-bus-width accordingly. So rename them in dts and documentation.
Signed-off-by: Ivan Khoronzhuk
---
In case when memory allocation is failed the driver should return
ENOMEM instead of ENODEV.
Signed-off-by: Ivan Khoronzhuk
---
drivers/mtd/nand/davinci_nand.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/davinci_nand.c
When kernel is booted using DT, there is no guarantee that Davinci
NAND device has been created already at the time when driver init
function is executed. Therefore, platform_driver_probe() can't be used
because this may result the Davinci NAND driver will never be probed.
The driver probing has
Move bindings under mtd. Do this in order to make davinci-nand
driver usable by keystone architecture.
Signed-off-by: Ivan Khoronzhuk
Acked-by: Santosh Shilimkar
---
.../devicetree/bindings/arm/davinci/nand.txt | 46
.../devicetree/bindings/mtd/davinci-nand.txt
The property "ti,davinci-chipselect" is required. So we have to check
if it is set.
Signed-off-by: Ivan Khoronzhuk
---
drivers/mtd/nand/davinci_nand.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index
Hi Stefan,
> thanks for your great and detailed reply. I'm just wondering why an
> intel 520 ssd degrades the speed just by 2% in case of O_SYNC. intel 530
> the newer model and replacement for the 520 degrades speed by 75% like
> the crucial m4.
>
> The Intel DC S3500 instead delivers also
On Wed 20-11-13 00:02:20, David Rientjes wrote:
> On Tue, 19 Nov 2013, Michal Hocko wrote:
>
> > > We have basically ended up with 3 options AFAIR:
> > > 1) allow memcg approach (memcg.oom_control) on the root level
> > >for both OOM notification and blocking OOM killer and handle
>
On 11/18, Namhyung Kim wrote:
>
> -DEFINE_BASIC_PRINT_TYPE_FUNC(u8, "%x", unsigned int)
> -DEFINE_BASIC_PRINT_TYPE_FUNC(u16, "%x", unsigned int)
> -DEFINE_BASIC_PRINT_TYPE_FUNC(u32, "%lx", unsigned long)
> +DEFINE_BASIC_PRINT_TYPE_FUNC(u8 , "%x", unsigned char)
> +DEFINE_BASIC_PRINT_TYPE_FUNC(u16,
On Wed, Nov 20, 2013 at 02:37:09PM +, Richard Fitzgerald wrote:
> The FLL must be placed into free-run mode before disabling
> to allow it to entirely shut down.
Applied, thanks.
signature.asc
Description: Digital signature
On 11/18, Namhyung Kim wrote:
>
> From: Namhyung Kim
>
> The uprobe syntax requires an offset after a file path not a symbol.
>
> Reviewed-by: Masami Hiramatsu
> Cc: Srikar Dronamraju
> Cc: Oleg Nesterov
> Cc: zhangwei(Jovi)
> Cc: Arnaldo Carvalho de Melo
> Signed-off-by: Namhyung Kim
On 13:04 Wed 28 Aug , Boris BREZILLON wrote:
> Add vbus and pullup pinctrl definitions.
> Request the vbus and pullup pins in usb1 node.
>
> Signed-off-by: Boris BREZILLON
> ---
> arch/arm/boot/dts/at91rm9200ek.dts | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git
On Wed, 2013-11-20 at 10:58 +0200, Michael S. Tsirkin wrote:
> On Tue, Nov 19, 2013 at 02:00:11PM -0800, Eric Dumazet wrote:
> > On Tue, 2013-11-19 at 23:53 +0200, Michael S. Tsirkin wrote:
> >
> > > Which NIC? Virtio? Prior to 2613af0ed18a11d5c566a81f9a6510b73180660a
> > > it didn't drop packets
On Thu, Nov 14, 2013 at 04:32:28PM -0500, Vince Weaver wrote:
> Hello
>
> when running the perf_fuzzer on a core2 machine I often get the syslog
> spammed with messages like this:
>
> [ 7911.810186] Uhhuh. NMI received for unknown reason 3d on CPU 0.
> [ 7911.812756] Do you have a strange power
On 13:02 Wed 28 Aug , Boris BREZILLON wrote:
> Add spi0 cs pinctrl pins definitions.
>
> Signed-off-by: Boris BREZILLON
> ---
> arch/arm/boot/dts/at91rm9200.dtsi | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/at91rm9200.dtsi
>
On 13:06 Wed 28 Aug , Boris BREZILLON wrote:
> Add slot0 of mmc0 pinctrl pins definitions:
> - detect pin
> - write protect pin
> - enable slot0 pin: this pin is connected to an external switch which
>enable mmc0 slot0 or spi dataflash connected to cs3
>
> The mmc0 device is not
On 13:08 Wed 28 Aug , Boris BREZILLON wrote:
> Signed-off-by: Boris BREZILLON
> ---
> arch/arm/boot/dts/at91rm9200ek.dts | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
> b/arch/arm/boot/dts/at91rm9200ek.dts
> index
On Wed, Nov 20, 2013 at 05:29:16AM +, Atsushi Kumagai wrote:
> On 2013/11/18 22:56:10, kexec wrote:
> > On Mon, Nov 18, 2013 at 12:51:39AM +, Atsushi Kumagai wrote:
> >
> > [..]
> > > > Is there any chance that you could look into fixing this. I have no
> > > > experience writing code
On 11/19/2013 11:24 PM, viresh kumar wrote:
> On Tuesday 19 November 2013 11:13 PM, Nishanth Menon wrote:
>> we depend on the first transition to take us to a sane configuration -
>> but we cannot predict when and if it will happen.
>
> I really believe that it happens fairly quickly, isn't it?
On Tuesday 19 of November 2013 10:59:39 Doug Anderson wrote:
> On Tue, Nov 19, 2013 at 10:46 AM, Stephen Warren
> wrote:
> > On 11/19/2013 10:15 AM, Tomasz Figa wrote:
> >> This patch extends the range of settings configurable via pinfunc API
> >> to cover pin value as well. This allows
On Wednesday 20 November 2013 07:09 AM, Grygorii Strashko wrote:
> This patch fixes Keystone gate control clock driver initialization path:
> 1) clk_register_psc() returns error code and not a pure pointer, hence
> its return value need to be checked using IS_ERR(clk) macro.
>
> 2) Mapped IO
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Hash: SHA1
On 11/20/2013 2:53 AM, Marcel Holtmann wrote:
> fix for this is already in John’s wireless tree. On a side note,
> the bisect is correct, but it is not the patch that broke it. It is
> just the patch that uncovered it.
Great, thanks!
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On Thu, Nov 14, 2013 at 01:02:31PM +0100, Pali Rohár wrote:
> On Wednesday 13 November 2013 17:28:40 Dmitry Torokhov wrote:
> > On Wed, Nov 13, 2013 at 11:47:18AM +0100, Jiri Kosina wrote:
> > > On Sun, 15 Sep 2013, Pali Rohár wrote:
> > > > I do not know where to ask this question, but I think
The FLL must be placed into free-run mode before disabling
to allow it to entirely shut down.
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/arizona.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c
On Tue, 2013-11-19 at 09:32 -0800, David Cohen wrote:
> On 11/19/2013 01:27 AM, Alex Courbot wrote:
> > On 11/19/2013 06:24 PM, Linus Walleij wrote:
> >> On Wed, Jun 5, 2013 at 3:58 PM, Andy Shevchenko
> >> wrote:
> >>
> >>> To support some (legacy) firmwares and platforms let's make life
> >>>
Here is a second [1] version of the SFI GPIO API. This series contains SFI GPIO
API layer along with the update of intel-mid platform to use it instead of
internal copy.
It has been tested on Medfield device with linux-next 20131118.
[1] https://lkml.org/lkml/2013/6/5/316
Andy Shevchenko (3):
This fixes the following compiler warnings when build is done by make W=1.
drivers/sfi/sfi_acpi.c:154:5: warning: no previous prototype for
‘sfi_acpi_table_parse’ [-Wmissing-prototypes]
drivers/sfi/sfi_core.c:164:26: warning: no previous prototype for
‘sfi_map_table’ [-Wmissing-prototypes]
To support some (legacy) firmwares and platforms let's make life easier for
their customers.
This patch extracts SFI GPIO API from arch/x86/platform/intel-mid/sfi.c and
moves it to GPIO descriptor API.
Signed-off-by: Andy Shevchenko
Cc: Len Brown
Cc: Grant Likely
Cc: Linus Walleij
---
Instead of custom implementation of the SFI GPIO API let's use one provided by
gpiolib.
Signed-off-by: Andy Shevchenko
---
arch/x86/include/asm/intel-mid.h | 1 -
.../intel-mid/device_libs/platform_emc1403.c | 8 ++--
.../intel-mid/device_libs/platform_gpio_keys.c
masami.hiramatsu.pt wrote:
> [...] This series also includes a change which prohibits probing on
> the address in .entry.text because the code is used for very
> low-level sensitive interrupt/syscall entries. Probing such code may
> cause unexpected result (actually most of that area is already
On Wednesday 20 November 2013 05:12 PM, Thomas Gleixner wrote:
> Viresh,
>
> On Wed, 20 Nov 2013, Viresh Kumar wrote:
>
>> Migration of timers from idle cores to non-idle ones for power saving is very
>> well working and really saves a lot of power for us. What's currently not
>> working is the
On Nov 20, 2013, at 8:29 AM, Marcelo Tosatti wrote:
> On Wed, Aug 07, 2013 at 12:06:49PM +0800, Xiao Guangrong wrote:
>> On 08/07/2013 09:48 AM, Marcelo Tosatti wrote:
>>> On Tue, Jul 30, 2013 at 09:02:02PM +0800, Xiao Guangrong wrote:
Make sure we can see the writable spte before the dirt
On Wed, Nov 20, 2013 at 08:54:02AM -0500, Jason Wang wrote:
>
>
> - 原始邮件 -
> > On Wed, Nov 20, 2013 at 05:07:25PM +0800, Jason Wang wrote:
> > > When mergeable buffer were used, we only put the first page buf leave the
> > > rest
> > > of buffers in the virt queue. This will cause the
This patch adds support for propagation of setup of clock's parent one level
up.
This feature is helpful when a driver changes topology of its clocks using
clk_set_parent(). The problem occurs when driver's clock is located at MUX
output on one platform/SoC but on the other platform/SoC there is
MAX14577 chip is a multi-function device which includes MUIC, charger
and voltage regulator. The driver is located in drivers/mfd.
This patch supports battery charging control of MAX14577 chip and
provides power supply class information to userspace.
Signed-off-by: Krzysztof Kozlowski
On Monday 18 November 2013 04:18 PM, Linus Walleij wrote:
> On Tue, Nov 12, 2013 at 7:18 AM, Sekhar Nori wrote:
>> On Friday 08 November 2013 12:15 PM, Prabhakar Lad wrote:
>>> From: "Lad, Prabhakar"
>>>
>>> This patch fixes a check for offset in gpio_to_irq_unbanked()
>>> and also assigns
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