On Fri, May 4, 2018 at 2:27 AM, Peter Rosin wrote:
> On 2018-05-04 09:17, Wenwen Wang wrote:
>> On Fri, May 4, 2018 at 1:49 AM, Peter Rosin wrote:
>>> On 2018-05-04 07:28, Wenwen Wang wrote:
On Fri, May 4, 2018 at 12:04 AM, Peter Rosin
Em Fri, May 04, 2018 at 03:09:59PM +0300, Alexander Shishkin escreveu:
> On Wed, Apr 04, 2018 at 05:53:23PM +0300, Alexander Shishkin wrote:
> > It has been pointed out to me many times that it is useful to be able
> > to switch off AUX records to save the bandwidth for records that actually
> >
On Fri, May 4, 2018 at 3:14 AM Matthew Wilcox wrote:
> > In fact, the conversion I saw was buggy. You can *not* convert a
GFP_ATOMIC
> > user of kmalloc() to use kvmalloc.
> Not sure which conversion you're referring to; not one of mine, I hope?
I was thinking of the
: 4992.00
> clflush size : 64
> cache_alignment : 64
> address sizes : 39 bits physical, 48 bits virtual
> power management:
>
>>
>> Thank you,
>> Pavel
>> On Fri, May 4, 2018 at 4:27 AM Andrei Vagin <ava...@virtuozzo.com> wrote:
>>
>>>
On Fri, May 4, 2018 at 8:35 AM, Linus Torvalds
wrote:
> On Fri, May 4, 2018 at 3:14 AM Matthew Wilcox wrote:
>
>> > In fact, the conversion I saw was buggy. You can *not* convert a
> GFP_ATOMIC
>> > user of kmalloc() to use kvmalloc.
>
>> Not
Hello,
syzbot found the following crash on:
HEAD commit:150426981426 Merge tag 'linux-kselftest-4.17-rc4' of git:/..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=17f7b3e780
kernel config: https://syzkaller.appspot.com/x/.config?x=5a1dc06635c10d27
On Wed, May 02, 2018 at 02:20:52PM +0200, Thomas Gleixner wrote:
> Thanks for confirming. Still need to find a way which is less fragile, but
> that's probably too much of churn for rc4
>
> At least I know exactly what's happening, so I can write a better changelog.
>
> Thanks for testing!
On 5/4/18 4:12 AM, Michal Hocko wrote:
On Thu 03-05-18 15:39:49, prakash.sangappa wrote:
On 05/03/2018 11:03 AM, Christopher Lameter wrote:
On Tue, 1 May 2018, Prakash Sangappa wrote:
For analysis purpose it is useful to have numa node information
corresponding mapped address ranges of
On Tue, Apr 10, 2018 at 09:04:06PM +0800, Jia-Ju Bai wrote:
> pci_epf_test_write() is never called in atomic context.
>
> The call chain ending up at pci_epf_test_write() is:
> [1] pci_epf_test_write() <- pci_epf_test_cmd_handler()
>
> pci_epf_test_cmd_handler() is set as a parameter of
Hi Kim,
On 04/05/18 01:30, Kim Phillips wrote:
On Tue, 1 May 2018 12:54:05 +0100
Will Deacon wrote:
Hi Kim,
Hi Will, thanks for responding.
On Fri, Apr 27, 2018 at 11:56:25AM -0500, Kim Phillips wrote:
On Fri, 27 Apr 2018 17:09:14 +0100
Will Deacon
Stoney SoC provides oscout clock. This clock can support 25Mhz and
48Mhz of frequency.
The clock is available for general system use.
Signed-off-by: Akshu Agrawal
---
v2: config change, added SPDX tag and used clk_hw_register_.
v3: Fix kbuild warning for checking of NULL
AMD SoC exposes clock for general purpose use. The clock registration
is done in clk-st driver. The MMIO mapping are passed on to the
clock driver for accessing the registers.
The misc clock handler will create MMIO mappings to access the
clock registers and enable the clock driver to expose the
Hi Peter,
On 05/04/2018 02:47 AM, Peter Zijlstra wrote:
On Wed, May 02, 2018 at 01:52:10PM -0700, Rohit Jain wrote:
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 5e10aae..75d1ecf 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -4033,6 +4033,9 @@ int idle_cpu(int
Hi Florian,
On Fri, May 04, 2018 at 10:04:48AM -0700, Florian Fainelli wrote:
> On 05/04/2018 06:56 AM, Antoine Tenart wrote:
> > SFP connectors can be solder on a board without having any of their pins
> > (LOS, i2c...) wired. In such cases the SFP link state cannot be guessed,
> > and the
On Fri, May 04, 2018 at 09:09:32AM -0400, Theodore Y. Ts'o wrote:
> On Fri, May 04, 2018 at 03:31:17PM +0300, Jani Nikula wrote:
> > On Fri, 04 May 2018, David Howells wrote:
> > > Sasha Levin via Ksummit-discuss wrote:
> > >
> > >> Cc: sta...@vger.kernel.org #
Currently a number of arm64-specific files include for
the definition of the cmpxchg helpers. This works fine today, but won't
when we switch over to instrumented atomics, and as noted in
Documentation/core-api/atomic_ops.rst:
If someone wants to use xchg(), cmpxchg() and their variants,
Currently only instruments the fully
ordered variants of atomic functions, ignoring the {relaxed,acquire,release}
ordering variants.
This patch reworks the header to instrument all ordering variants of the atomic
functions, so that architectures implementing these are instrumented
appropriately.
As our atomics are written in inline assembly, they don't get
instrumented when we enable KASAN, and thus we can miss when they are
used on erroneous memory locations.
As with x86, let's use atomic-instrumented.h to give arm64 instrumented
atomics. This requires that we add an arch_ prefix to our
Our __smp_store_release() and __smp_load_acquire() macros use inline
assembly, which is opaque to kasan. This means that kasan can't catch
erroneous use of these.
This patch adds kasan instrumentation to both.
It might be better to turn these into __arch_* variants, as we do for
the atomics, but
This series (based on v4.17-rc3) allows arm64's atomics to be
instrumented, which should make it easier to catch bugs where atomics
are used on erroneous memory locations.
The bulk of the diffstat is teaching the generic instrumentation about
the acquire/release/relaxed variants of each atomic,
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 625e2001e99e82ea3eb5b0370a428a4328b9166b
commit: eb27fde2731b6cb5818493b8ac18e01f427e335f eeprom: at24: drop redundant
variable in at24_read()
date: 6 weeks ago
config: x86_64-randconfig-g0-05042232
On 5/1/2018 12:33 PM, Jiri Olsa wrote:
On Tue, May 01, 2018 at 07:31:36AM -0700, kan.li...@linux.intel.com wrote:
From: Kan Liang
Perf stat doesn't count the uncore event aliases from the same uncore
block in a group, for example:
perf stat -e
DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
Some of its uses are described below resulting in need to
have a separate glue driver instead of using dwc3-of-simple:
- It exposes register interface to override vbus-override
and lane0-pwr-present signals going to hardware. These
On 05/02/2018 02:58 PM, Subhra Mazumdar wrote:
On 05/01/2018 11:03 AM, Peter Zijlstra wrote:
On Mon, Apr 30, 2018 at 04:38:42PM -0700, Subhra Mazumdar wrote:
I also noticed a possible bug later in the merge code. Shouldn't it be:
if (busy < best_busy) {
best_busy = busy;
On Fri, May 04, 2018 at 02:38:42AM +0800, Icenowy Zheng wrote:
> Allwinner H6 has also a PRCM CCU.
>
> Add its device node into the device tree.
>
> Signed-off-by: Icenowy Zheng
Applied, thanks!
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and
On Fri, May 04, 2018 at 05:39:57PM +0300, Dmitry Osipenko wrote:
> Hi,
>
> This series improves DRM plane support by supporting zPos on older Tegra's
> and enabling plane scaling filters (up to Tegra210).
>
> Changelog:
>
> v2:
> - Addressed v1 review comments.
>
> Dmitry Osipenko (3):
>
On 05/03/2018 09:17 PM, Stephen Rothwell wrote:
> Hi Andrew,
>
> After merging the akpm-current tree, today's linux-next build
> (x86_64_allmodconfig) produced this warning:
>
> drivers/block/zram/zram_drv.c: In function 'read_block_state':
> drivers/block/zram/zram_drv.c:674:16: warning: format
From: Zhengyuan Liu
It looks weird that the stack_trace_filter file can be written by root
but shows that it does not have write permission by ll command.
Link:
http://lkml.kernel.org/r/1518054113-28096-1-git-send-email-liuzhengy...@kylinos.cn
Signed-off-by: Zhengyuan
From: Chen LinX
The set_graph_function and set_graph_notrace file mode should be 0644
instead of 0444 as they are writeable. Note, the mode appears to be ignored
regardless, but they should at least look sane.
Link:
On Fri, May 04, 2018 at 05:45:28PM +0200, Sebastian Andrzej Siewior wrote:
> This series introduces atomic_dec_and_lock_irqsave() and converts a few
> users to use it. They were using local_irq_save() +
> atomic_dec_and_lock() before that series.
Should not all these users be converted to
On Thursday, May 3, 2018 6:12 AM, Kiran Gunda wrote:
If you really want someone to review your patch, please add more detailed
explanations.
1. Please add 0th patch.
2. Please add what the difference is between V1 and V2 patches.
If you cannot understand what I am saying, just ask another
Linus,
Some of the files in the tracing directory show file mode 0444
when they are writable by root. To fix the confusion, they should
be 0644. Note, either case root can still write to them.
Note, Zhengyuan asked why I never applied that patch (the first one
is from 2014!). I simply forgot
On Sat, 5 May 2018 00:48:28 +0900
Masami Hiramatsu wrote:
> So the syntax will be
>
> p[:EVENT] SYM[(CAST)|+OFFS] [FETCHARG]
>
> And here is an example;
>
> p:myevent vfs_read(void *file, char *buf, size_t count, void *pos) $arg1 $arg2
If we do this, why bother with
On 2018-05-04 17:54:46 [+0200], Peter Zijlstra wrote:
> On Fri, May 04, 2018 at 05:45:28PM +0200, Sebastian Andrzej Siewior wrote:
> > This series introduces atomic_dec_and_lock_irqsave() and converts a few
> > users to use it. They were using local_irq_save() +
> > atomic_dec_and_lock() before
On Fri, May 04, 2018 at 06:21:02PM +0200, Peter Zijlstra wrote:
> On Fri, May 04, 2018 at 06:07:26PM +0200, Sebastian Andrzej Siewior wrote:
>
> > do you intend to kill refcount_dec_and_lock() in the longterm?
>
> You meant to say atomic_dec_and_lock() ? Dunno if we ever get there, but
>
From: Daniel Wagner
Commit 40f70c03e33a ("serial: sh-sci: add locking to console write
function to avoid SMP lockup") copied the strategy to avoid locking
problems in conjuncture with the console from the UART8250
driver. Instead using directly
When a script file that isn't generated uses the variable
TEST_GEN_PROGS_EXTENDED and a 'make -C tools/testing/selftests clean' is
performed the script file gets removed and git shows the file as
deleted. For script files that isn't generated TEST_PROGS_EXTENDED
should be used.
Fixes:
Ensure the translation happens by failing to read or write
posix acls when the filesystem has not indicated it supports
posix acls.
This ensures that modern cached posix acl support is available
and used when dealing with posix acls. This is important
because only that path has the code to
AMD ST/CZ platform provides a general system clock which can be used
by any driver. Registration of this clock will done in clk-st driver.
While the ACPI misc device will create the required MMIO mappings
and pass the same to the clk-st driver. The clk-st driver will
use the address to
When invoked for an I/O request rq, the prepare_request hook of bfq
increments reference counters in the destination bfq_queue for rq. In
this respect, after this hook has been invoked, rq may still be
transformed into a request with no icq attached, i.e., for bfq, a
request not associated with
Sebastian Andrzej Siewior writes:
> On 2018-05-04 11:59:08 [-0500], Eric W. Biederman wrote:
>> Sebastian Andrzej Siewior writes:
>> > From: Anna-Maria Gleixner
> …
>> > This long-term fix has been made in commit
On Fri, May 04, 2018 at 10:04:48AM -0700, Florian Fainelli wrote:
> On 05/04/2018 06:56 AM, Antoine Tenart wrote:
> > SFP connectors can be solder on a board without having any of their pins
> > (LOS, i2c...) wired. In such cases the SFP link state cannot be guessed,
> > and the overall link
--
This is the second time i am sending you this mail.
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On 5/4/2018 1:22 PM, Rohit Jain wrote:
> Hi Peter,
>
> On 05/04/2018 02:47 AM, Peter Zijlstra wrote:
>> On Wed, May 02, 2018 at 01:52:10PM -0700, Rohit Jain wrote:
>>> diff --git a/kernel/sched/core.c b/kernel/sched/core.c
>>> index 5e10aae..75d1ecf 100644
>>> --- a/kernel/sched/core.c
>>> +++
On Fri, May 04, 2018 at 10:28:20PM +0800, zhangq95 wrote:
> When I run "cat /proc/stat" in a container, container will access
> host's file directly which is a security risk.
Why is this a "security risk"? What can be learned there that is
somehow "bad"?
thanks,
greg k-h
From: Andres Rodriguez
This should let us associate enum kdoc to these values.
While at it, kdocify the fw_opt.
Signed-off-by: Andres Rodriguez
Acked-by: Luis R. Rodriguez
[mcgrof: coding style fixes, merge kdoc with enum move]
* Sebastian Andrzej Siewior [180504 17:50]:
> On 2018-05-04 10:39:31 [-0700], Tony Lindgren wrote:
> > Uhh sorry I managed to commit also a patch I was testing while
> > updating patch comments.. Will send out v3 shortly, this can be
> > ignored.
>
> I assumed you were
commit da861e18eccc ("x86, vdso: Get rid of the fake section mechanism")
left this file behind; nothing is using it anymore.
Signed-off-by: Jann Horn
---
arch/x86/entry/vdso/vdso32/vdso-fakesections.c | 1 -
1 file changed, 1 deletion(-)
delete mode 100644
I have a business to discuss with you, can we talk?
Regards
Faruk Sakawo
On Fri, May 04, 2018 at 08:01:05PM +0200, Peter Zijlstra wrote:
> On Fri, May 04, 2018 at 06:39:32PM +0100, Mark Rutland wrote:
> > Currently only instruments the fully
> > ordered variants of atomic functions, ignoring the {relaxed,acquire,release}
> > ordering variants.
> >
> > This patch
Darren,
Is this with that fix of mine merged?
> -Original Message-
> From: kbuild test robot [mailto:l...@intel.com]
> Sent: Friday, May 4, 2018 1:24 PM
> To: Limonciello, Mario
> Cc: kbuild-...@01.org; linux-kernel@vger.kernel.org; Darren Hart (VMware)
> Subject:
Hi Kyle,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on cryptodev/master]
[also build test ERROR on v4.17-rc3 next-20180504]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
On Fri, May 4, 2018 at 10:42 AM Paul E. McKenney
wrote:
[...]
> > > > But preemptible RCU *does not* use context-switch as a quiescent
state.
> > > It doesn't?
> >
> > I thought that's what preemptible rcu is about. You can get preempted
but
> > you shouldn't block in
The LHR050H41 panel is the panel shipped with the BananaPi M2-Magic, and is
based on the Ilitek ILI9881c Controller. Add a driver for it, modelled
after the other Ilitek controller drivers.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/panel/Kconfig
Hi,
Here is the next version of the patches to add the support for the Ilitek
ILI9881c panel controller.
This used to be a part of the larger DSI support series for the Allwinner
SoCs whose patches have been since merged and are obviously not part of
this series anymore.
Let me know what you
On Thu, Apr 12, 2018 at 5:07 PM, Miklos Szeredi wrote:
> Git tree is here:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs.git
> overlayfs-rorw
Thanks everyone for your review.
Force pushed new version to the above branch.
Hopefully no comment was missed
From: Anna-Maria Gleixner
The irqsave variant of atomic_dec_and_lock handles irqsave/restore when
taking/releasing the spin lock. With this variant the call of
local_irq_save/restore is no longer required.
Signed-off-by: Anna-Maria Gleixner
On Thu, 3 May 2018 18:11:37 -0400
Steven Rostedt wrote:
> On Wed, 25 Apr 2018 21:16:06 +0900
> Masami Hiramatsu wrote:
>
> > Hi,
> >
> > This is the 7th version of the fetch-arg improvement series.
> > This includes variable changes on fetcharg
From: Anna-Maria Gleixner
There is no need to invoke release_inactive_stripe_list() with interrupts
disabled. All call sites, except raid5_release_stripe(), unlock
->device_lock and enable interrupts before invoking the function.
Make it consistent.
Signed-off-by:
From: Anna-Maria Gleixner
The irqsave variant of atomic_dec_and_lock handles irqsave/restore when
taking/releasing the spin lock. With this variant the call of
local_irq_save/restore is no longer required.
Signed-off-by: Anna-Maria Gleixner
Added entry for at91 usart mfd driver.
Signed-off-by: Radu Pirea
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8e2a2fddbd19..ca06c6f58299 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9192,6 +9192,13 @@ S:
On Fri, May 04, 2018 at 10:35:53AM -0400, Vince Weaver wrote:
> On Wed, 2 May 2018, Josh Poimboeuf wrote:
>
> > After looking closer, I realized that at least some of these warnings
> > are due to bad unwind hints in the entry code. Can you try this patch
> > instead of the last one?
>
> with
From: "Gustavo A. R. Silva"
Date: Thu, 3 May 2018 13:17:12 -0500
> pool can be indirectly controlled by user-space, hence leading to
> a potential exploitation of the Spectre variant 1 vulnerability.
>
> This issue was detected with the help of Smatch:
>
>
On Fri, 4 May 2018, Josh Poimboeuf wrote:
> Also, any tips for reproducing this locally? I cloned the perf fuzzer
> github. Is it as simple as just "make" and "./run_tests.sh"?
run_tests only runs the perf_event regressiong tests.
To run the fuzzer, enter the "fuzzer" directory and either run
Michal Hocko reported:
> I am getting the following for nommu with MEMCG=y randconfig:
> kernel/fork.o: In function `mm_init':
> fork.c:(.text+0x948): undefined reference to `mm_update_memcg'
> kernel/fork.o: In function `mmput':
> fork.c:(.text+0x119c): undefined reference to
Oleg pointed out that there is a race at exec time between when
bprm->mm is initialized and the exec'ing task being migrated to a
different memory control group.
Ractor the code in memcontrol so exec_mmap can use the same code as as
fork to ensure that task->memcg == task->mm->memcg.
On Tue, May 01, 2018 at 10:10:43AM +0100, Suzuki K Poulose wrote:
> This patch introduces a generic sg table data structure and
> associated operations. An SG table can be used to map a set
> of Data pages where the trace data could be stored by the TMC
> ETR. The information about the data pages
Em Fri, 4 May 2018 18:08:59 +0200
SF Markus Elfring escreveu:
> > Adjust jump targets so that a bit of exception handling can be better
> > reused at the end of these functions.
>
> Why was this update suggestion rejected once more a moment ago?
>
>
> On Fri, May 04, 2018 at 03:35:33PM +0200, Michal Hocko wrote:
> > On Fri 04-05-18 14:52:08, Huaisheng Ye wrote:
> > > Suggest using unsigned int instead of int for bit within gfp_zone.
> > > @@ -401,7 +401,7 @@ static inline bool gfpflags_allow_blocking(const
> gfp_t gfp_flags)
> > > static
On Fri, May 4, 2018 at 7:03 PM, Pavel Tatashin
wrote:
> Thank you, I will try to figure out what is happening.
+1 is here.
The last message I have seen on the console are:
[4.690972] Non-volatile memory driver v1.3
[4.703360] Linux agpgart interface v0.103
[
Hallo Andrew,
I need your ACK or NACK for this patch.
This function is used to configure external PMIC to interpret
signal which will be triggered by pm_power_off as power off.
Since same signal can be used for stand by, I linked PMIC configuration
with pm_power_off_prepare to avoid possible
On Fri, May 04, 2018 at 02:38:41AM +0800, Icenowy Zheng wrote:
> The H6 has clock/reset controls in PRCM part, like old SoCs such as H3
> and A64. However, the PRCM CCU is rearranged; the register arragement
> is now similar to the main CCU of H6, and the PRCM now has two APB
> buses to control --
On Fri, May 04, 2018 at 02:38:43AM +0800, Icenowy Zheng wrote:
> Allwinner H6 SoC has a R_PIO pin controller like other Allwinner SoCs,
> which controls the PL and PM pin banks.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng
Acked-by: Maxime Ripard
In an SFP EEPROM values can be read to get information about a given SFP
module. One of those is the bitrate, which can be determined using a
nominal bitrate in addition with min and max values (in %). The SFP code
currently compute both BR,min and BR,max values thanks to this nominal
and min,max
The LHR050H41 from BananaPi is a 1280x700 4-lanes DSI panel based on the
ILI9881c from Ilitek.
Acked-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.txt | 20
1
The BananaPi M2M has an optional 1280x720 DSI panel. Since that panel is
optional, we can only show a DT patch that would show how to enable it.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 39 +-
1 file changed,
> 在 2018年5月4日,21:39,Leon Romanovsky 写道:
>
>> On Fri, May 04, 2018 at 04:32:38PM +0800, 858585 jemmy wrote:
>>> On Fri, May 4, 2018 at 6:01 AM, Jason Gunthorpe wrote:
On Thu, May 03, 2018 at 09:43:01PM +0300, Leon Romanovsky wrote:
> On Thu, May 03,
On 2018-05-04 16:59, Wenwen Wang wrote:
> On Fri, May 4, 2018 at 2:27 AM, Peter Rosin wrote:
>> On 2018-05-04 09:17, Wenwen Wang wrote:
>>> On Fri, May 4, 2018 at 1:49 AM, Peter Rosin wrote:
On 2018-05-04 07:28, Wenwen Wang wrote:
> On Fri, May 4, 2018
On Fri, May 04, 2018 at 10:28:20PM +0800, zhangq95 wrote:
> diff --git a/kernel/sched/core.c b/kernel/sched/core.c
> index 5e10aae..ba969af 100644
> --- a/kernel/sched/core.c
> +++ b/kernel/sched/core.c
> @@ -3404,11 +3404,19 @@ static void __sched notrace __schedule(bool preempt)
> struct
On Fri, May 04, 2018 at 03:57:48PM +0200, Paul Kocialkowski wrote:
> On Fri, 2018-05-04 at 15:40 +0200, Maxime Ripard wrote:
> > On Fri, May 04, 2018 at 02:04:38PM +0200, Paul Kocialkowski wrote:
> > > On Fri, 2018-05-04 at 11:15 +0200, Maxime Ripard wrote:
> > > > On Fri, May 04, 2018 at
Le 04/05/2018 00:31, Bjorn Helgaas a écrit :
> [+cc LKML]
>
> On Thu, May 03, 2018 at 12:40:27PM +, Gilles Buloz wrote:
>> Subject:[PATCH] For exception at PCI probe due to bridge reporting UR
>>
>> Even if a device supports extended config access, no such access must be
>> done to this
On Thu, May 03, 2018 at 02:38:15PM +0300, Adrian Hunter wrote:
SNIP
> >>> index 7afeb80cc39e..d14464c42714 100644
> >>> --- a/tools/perf/util/parse-events.y
> >>> +++ b/tools/perf/util/parse-events.y
> >>> @@ -224,15 +224,15 @@ event_def: event_pmu |
> >>> event_bpf_file
> >>>
> >>>
From: Salil Mehta
Date: Thu, 3 May 2018 17:28:11 +0100
> From: Yunsheng Lin
>
> This patch adds support of hardware rx-vlan-offload to VF driver.
> VF uses mailbox to convey PF to configure the hardware.
>
> Signed-off-by: Yunsheng Lin
From: "Gustavo A. R. Silva"
Date: Thu, 3 May 2018 13:45:58 -0500
> ioc_data.dev_num can be controlled by user-space, hence leading to
> a potential exploitation of the Spectre variant 1 vulnerability.
>
> This issue was detected with the help of Smatch:
>
Hi Steven,
Just for a warning/disclaimer, I am new to RCU-land and trying to make
sense ;-) So forgive me if something sounds too outlandish.
On Fri, May 4, 2018 at 9:30 AM Steven Rostedt wrote:
> On Fri, 04 May 2018 16:20:11 +
> Joel Fernandes
From: Sebastian Andrzej Siewior
Date: Fri, 4 May 2018 16:24:45 +0200
> ide_pio_bytes() disables interrupts around kmap_atomic(). This is a
> leftover from the old kmap_atomic() implementation which relied on fixed
> mapping slots, so the caller had to make sure that the
On Fri, May 04, 2018 at 03:23:57PM +0200, Florian Schmaus wrote:
> I triggerd the BUG_ON() in driver_register(), which was added in
> f48f3febb2cbfd0f2ecee7690835ba745c1034a4, when booting a domU Xen
> domain. Since there was no contextual information logged, I needed to
> attach kgdb to determine
We don't currently define instrumentation wrappers for the various forms
of atomic*andnot*(), as these aren't implemented directly by x86.
So that we can instrument architectures which provide these, let's
define wrappers for all the variants of these atomics.
Signed-off-by: Mark Rutland
From: Sebastian Andrzej Siewior
Date: Fri, 4 May 2018 16:24:46 +0200
> The interrupts are enabled/disabled so the interrupt handler can run
> with enabled interrupts while serving the interrupt and not lose other
> interrupts especially the timer tick.
> If the system
Our LL/SC cmpxchg assembly uses "Lr" as the constraint for old, which
allows either an integer constant suitable for a 64-bit logical
oepration, or a register.
However, this assembly is also used for 32-bit cases (where we
explicitly add a 'w' prefix to the output format), where the set of
valid
* Tony Lindgren [180504 17:33]:
> I noticed that unused UARTs won't necessarily idle properly always
> unless at least one byte tx transfer is done first.
> ---
> arch/arm/mach-actions/platsmp.c | 6 +++---
> arch/arm/mach-exynos/platsmp.c | 12 ++--
>
On Fri, May 04, 2018 at 12:17:20PM -0500, Eric W. Biederman wrote:
> Sebastian Andrzej Siewior writes:
>
> > On 2018-05-04 11:59:08 [-0500], Eric W. Biederman wrote:
> >> Sebastian Andrzej Siewior writes:
> >> > From: Anna-Maria Gleixner
On Fri, May 04, 2018 at 06:39:32PM +0100, Mark Rutland wrote:
> Currently only instruments the fully
> ordered variants of atomic functions, ignoring the {relaxed,acquire,release}
> ordering variants.
>
> This patch reworks the header to instrument all ordering variants of the
> atomic
>
Hi Mario,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 625e2001e99e82ea3eb5b0370a428a4328b9166b
commit: 25d47027e1003546bfd8964b4423cb39bc2d53e9 platform/x86: dell-smbios:
Link all dell-smbios-* modules together
On Fri, May 04, 2018 at 07:09:09PM +0100, Mark Rutland wrote:
> On Fri, May 04, 2018 at 08:01:05PM +0200, Peter Zijlstra wrote:
> > On Fri, May 04, 2018 at 06:39:32PM +0100, Mark Rutland wrote:
> > > include/asm-generic/atomic-instrumented.h | 1195
> > > -
> > > 1
Existing documentation has lot of incorrect information as it
was originally added for a driver that no longer exists.
Signed-off-by: Manu Gautam
---
.../devicetree/bindings/usb/qcom,dwc3.txt | 85 --
1 file changed, 63 insertions(+), 22
Add separate dwc3-qcom glue driver for Qualcomm SOCs having dwc3 core.
It is needed to support peripheral mode.
Patches also add support to invoke PHY runtime PM functions on host
mode bus-suspend.
Changes since v2:
- Addressed Rob's comments for DT binding documentation.
Changes since v1:
-
On Fri, May 04, 2018 at 06:34:32PM +, Joel Fernandes wrote:
> On Fri, May 4, 2018 at 10:42 AM Paul E. McKenney
>
> wrote:
> [...]
> > > > > But preemptible RCU *does not* use context-switch as a quiescent
> state.
> > > > It doesn't?
> > >
> > > I thought that's
Some PHY drivers (e.g. for Qualcomm QUSB2 and QMP PHYs) support
runtime PM to reduce PHY power consumption during bus_suspend.
Add changes to let core auto-suspend PHYs on host bus-suspend
using GUSB2PHYCFG register if needed for a platform. Also perform
PHYs runtime suspend/resume and let
On Fri, May 04, 2018 at 02:38:46AM +0800, Icenowy Zheng wrote:
> Allwinner H6 SoC has a R_I2C controller wired to the PL0/PL1 pins, which
> are used in the reference design to connect AXP805 PMIC.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng
Dropped the headers
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