Hi!
On 08/01/2019 02:39, Masami Hiramatsu wrote:
> On Thu, 3 Jan 2019 17:05:18 +
> James Morse wrote:
>> On 17/12/2018 06:40, Masami Hiramatsu wrote:
>>> Move extable address check into arch_prepare_kprobe() from
>>> arch_within_kprobe_blacklist().
>>
>> I'm trying to work out the pattern
On 08-01-19, 12:00, Robin Gong wrote:
> The context loaded only one time before channel running,but
> currently sdma_config_channel() and dma_prep_* duplicated with
> sdma_load_context(), so refine it to load context only one time
> before channel running and reload after the channel terminated.
On 2019/1/8 21:24, Sidong Yang wrote:
> Add identifier for function definition arguments in xattr_iter_handlers,
> this change clears the checkpatch.pl issue and make code more explicit.
>
> Signed-off-by: Sidong Yang
personally looks good to me.
Reviewed-by: Gao Xiang
Thanks,
Gao Xiang
On 01/08/2019 11:11 AM, Michal Hocko wrote:
> On Tue 08-01-19 13:04:22, Dave Chinner wrote:
>> On Mon, Jan 07, 2019 at 05:41:39PM -0500, Waiman Long wrote:
>>> On 01/07/2019 05:32 PM, Dave Chinner wrote:
On Mon, Jan 07, 2019 at 10:12:56AM -0500, Waiman Long wrote:
> As newer systems have
Hi Ravi,
I noticed that in:
commit ab66dcc76d6ab8fae9d69d149ae38c42605e7fc5
Author: Firoz Khan
Date: Mon Dec 17 16:10:36 2018 +0530
powerpc: generate uapi header and system call table files
powerpc now generates its syscall tables headers from a syscall.tbl just
like x86
On 1/8/19 5:52 PM, Randy 'ayaka' Li wrote:
On Thu, Nov 15, 2018 at 03:56:49PM +0100, Maxime Ripard wrote:
From: Pawel Osciak
Stateless video codecs will require both the H264 metadata and slices in
order to be able to decode frames.
This introduces the definitions for a new pixel format
On 08-01-19, 20:19, Shun-Chih.Yu wrote:
> On Fri, 2019-01-04 at 18:08 +0530, Vinod Koul wrote:
> > On 27-12-18, 21:10, shun-chih...@mediatek.com wrote:
> > > From: Shun-Chih Yu
> > Have you tested this with dmatest, if so can you provide results of the
> > test as well.
> Yes, I tested with
Hi yinbo.zhu,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on usb/usb-testing]
[also build test ERROR on v5.0-rc1 next-20190108]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
On 01/07/2019 09:04 PM, Dave Chinner wrote:
> On Mon, Jan 07, 2019 at 05:41:39PM -0500, Waiman Long wrote:
>> On 01/07/2019 05:32 PM, Dave Chinner wrote:
>>> On Mon, Jan 07, 2019 at 10:12:56AM -0500, Waiman Long wrote:
As newer systems have more and more IRQs and CPUs available in their
One of the more common cases of allocation size calculations is finding the
size of a structure that has a zero-sized array at the end, along with memory
for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kzalloc(sizeof(struct
THis commit adds memory reservation required by MFC to run.
On S5PV210 both regions needs to be on separate memory banks.
Size of both regions is taken from stock sources.
Signed-off-by: Paweł Chmiel
---
Changes from v1:
- Fixed name of nodes to be more generic
---
This commit enables following drivers:
- i2c support (using s3c2410 driver)
- s5p-jpeg
- s5p-mfc
- exynos drm rotator
- pwm support
- pwm vibrator
- fixed regulator
- syscon poweroff
- Atmel maXTouch touchscreen
- Broadcom BCM4329 bluetooth over uart0
- dma devices (so we can use pl330 dma driver)
This is result of running savedefconfig. It's preparation for adding
support for more hw present on Samsung Aries based devices.
Signed-off-by: Paweł Chmiel
---
arch/arm/configs/s5pv210_defconfig | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git
This patchset enables more drivers for devices present on
Samsung Aries based devices.
Changes from v1:
- Removed already applied patches
- Fixed name of mfc memory reservation nodes
- Added separate patch with savedefconfig result
- Fixed configuration of touchscreen
Jonathan Bakker
From: Jonathan Bakker
This commit enables following devices present on Aries based phones:
- pwm-vibrator attached to PWM 1
- poweroff support
- Atmel maXTouch touchscreen, connected to i2c2
- Broadcom BCM4329 bluetooth over uart0
Signed-off-by: Jonathan Bakker
Signed-off-by: Paweł Chmiel
---
Dnia poniedziałek, 31 grudnia 2018 14:35:55 CET Krzysztof Kozlowski pisze:
> On Fri, 28 Dec 2018 at 17:18, Paweł Chmiel
> wrote:
> >
> > From: Jonathan Bakker
> >
> > This commit enables following devices present on Aries based phones:
> > - pwm-vibrator attached to PWM 1
> > - poweroff support
Sorry for delay, vacation,
On 01/02, Andrei Vagin wrote:
>
> zap_pid_ns_processes() can stuck on waiting tasks from the dead list. In
> this case, we will have one unkillable process with one or more dead
> children.
Thanks!
> --- a/kernel/exit.c
> +++ b/kernel/exit.c
> @@ -664,9 +664,6 @@
One of the more common cases of allocation size calculations is finding the
size of a structure that has a zero-sized array at the end, along with memory
for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kzalloc(sizeof(struct
Kangjie Lu writes:
> ath6kl_wmi_cmd_send could fail, so let's return its error code upstream.
>
> Signed-off-by: Kangjie Lu
> ---
> drivers/net/wireless/ath/ath6kl/wmi.c | 4 +---
The correct prefix is "ath6kl: " but I can fix that.
Le lun. 7 janv. 2019 à 16:59, Noralf Trønnes a écrit :
>
>
>
> Den 30.12.2018 18.48, skrev Sam Ravnborg:
> > drmP.h was the only header file in the past and a lot
> > of files rely on that drmP.h defines everything.
> > The goal is to one day to delete drmP.h and
> > as a step towards this it
Kangjie Lu writes:
> sysfs_create_group() could fail, so let's check its return values and
> issue error messages if it fails.
>
> Signed-off-by: Kangjie Lu
> ---
> drivers/net/wireless/marvell/libertas/mesh.c | 4
The correct prefix is "libertas: ".
On Tue, Jan 08, 2019 at 03:51:18PM +, Marc Zyngier wrote:
> On 08/01/2019 15:40, Dave Martin wrote:
> > On Tue, Jan 08, 2019 at 02:07:30PM +, Julien Thierry wrote:
> >> Instead disabling interrupts by setting the PSR.I bit, use a priority
> >> higher than the one used for interrupts to
On Tue, 8 Jan 2019, Kalle Valo wrote:
> Julia Lawall writes:
>
> > Drop LIST_HEAD where the variable it declares has never
> > been used.
> >
> > The semantic patch that fixes this problem is as follows:
> > (http://coccinelle.lip6.fr/)
> >
> > //
> > @@
> > identifier x;
> > @@
> > -
Kangjie Lu writes:
> usb_register() may fail, so let's check its status and issue an error
> message if it fails.
>
> Signed-off-by: Kangjie Lu
> ---
> drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c | 6 +-
The title prefix should be "brcmfmac: " but I can fix that.
On Tue, 8 Jan 2019 at 16:53, Tony Lindgren wrote:
>
> * Vincent Guittot [190108 08:00]:
> > Hi Tony,
> >
> > On Tue, 8 Jan 2019 at 00:38, Tony Lindgren wrote:
> > >
> > > Hi all,
> > >
> > > Looks like commit 8234f6734c5d ("PM-runtime: Switch autosuspend
> > > over to using hrtimers") caused a
The below referenced commit adds a test for integer overflow, but in
doing so prevents the unmap ioctl from ever including the last page of
the address space. Subtract one to compare to the last address of the
unmap to avoid the overflow and wrap-around.
Fixes: 71a7d3d78e3c ("vfio/type1: silence
On 1/8/19 5:48 AM, Peter Zijlstra wrote:
> On Mon, Jan 07, 2019 at 04:27:27PM +, Andrew Murray wrote:
>> For drivers that do not support context exclusion let's advertise the
>> PERF_PMU_CAP_NOEXCLUDE capability. This ensures that perf will
>> prevent us from handling events where any
Add a driver to support COMPHY, a hardware block providing shared
serdes PHYs on Marvell Armada 3700. This driver uses SMC calls and
rely on having an up-to-date firmware.
SATA, PCie and USB3 host mode have been tested successfully with an
ESPRESSObin. (HS)SGMII mode cannot be tested with this
Describe the A3700 COMPHY node. It has three PHYs that can be
configured as follow:
* PCIe or GbE
* USB3 or GbE
* SATA or USB3
Each of them has its own memory area.
Suggested-by: Grzegorz Jaszczyk
Signed-off-by: Miquel Raynal
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 29
Add myself as Armada 3700 COMPHY driver/bindings maintainer.
Signed-off-by: Miquel Raynal
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 72e930c51fd4..2ef7a60ab24b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8865,6 +8865,12 @@ F:
Fix the SATA IP memory area which is only 0x178 bytes long (from
Marvell A3700 specification). Actually, starting from the offset
0xe0178, there is an area dedicated to the COMPHY driver.
Suggested-by: Grzegorz Jaszczyk
Signed-off-by: Miquel Raynal
---
Current file describe COMPHY bindings for the IP available on the
CP110 of Armada 7k/8k. Bindings are very close (and serve the same
purpose) as the new Armada 3700 COMPHY driver so update this file to
describe both. Also add an example of how to use this second
compatible (same as for the
From: Grzegorz Jaszczyk
Add SATA mode to the PHY framework in preparation of upcoming PHYs
that will handle it. For instance, SATA mode will be used by the
Armada3700 COMPHY driver, which supports configuring SERDES lanes to
be used by various controllers: Ethernet, USB3, SATA and PCIe.
So far the PHY ->xlate() callback was checking if the port was
"invalid" before continuing, meaning that the port has not been used
yet. This check is not correct as there is no opposite call to
->xlate() once the PHY is released by the user and the port will
remain "valid" after the first
Hello,
This series adds a new driver to support Armada 3700 COMPHY IP.
The series has been tested on an ESPRESSObin with SATA, PCIe
and USB3 host. For this purpose, patch 1 enumerates the SATA PHY
mode. The SGMII PHY mode that is supported by the IP has been written
(uses SMC calls anyway) but
Julia Lawall writes:
> Drop LIST_HEAD where the variable it declares has never
> been used.
>
> The semantic patch that fixes this problem is as follows:
> (http://coccinelle.lip6.fr/)
>
> //
> @@
> identifier x;
> @@
> - LIST_HEAD(x);
> ... when != x
> //
>
> Fixes: a910e4a94f692 ("cw1200:
Hi Paolo,
On 1/7/19 11:42 PM, Paolo Bonzini wrote:
> On 02/01/19 18:29, Tomas Bortoli wrote:
>> n = kvm_dirty_bitmap_bytes(memslot);
>> +
>> +if (n << 3 < log->num_pages || log->first_page > log->num_pages)
>> +return -EINVAL;
>> +
>
> This should be
>
> if
From: Guo Ren
For I/O access, 810/807 store instruction fast retire will cause wrong
primitive. For example:
stw (clear interrupt source)
stw (unmask interrupt controller)
enable interrupt
stw is fast retire instruction. When PC is run at enable interrupt
stage, the
From: Guo Ren
The handle_irq_perbit function loop every bit in hwirq local variable.
handle_irq_perbit(hwirq) {
for_everyt_bit_in(hwirq) {
handle_domain_irq()
->irq_exit()
->invoke_softirq()
->__do_softirq()
From: Guo Ren
Commit: 4cf58924951e remove the address argument of pte_alloc without
modify csky related code. linux-5.0-rc1 compile failed with csky.
Remove the unnecessary address testing in pte_alloc().
Signed-off-by: Guo Ren
Cc: Joel Fernandes (Google)
Cc: Guenter Roeck
Cc: Arnd Bergmann
From: Guo Ren
810 doesn't support jsri instruction and csky-as will leave
jsri + nop for relocation. Module-probe need replace them with
lrw + jsr.
Signed-off-by: Guo Ren
Cc: Hui Kai
---
arch/csky/kernel/module.c | 38 ++
1 file changed, 22 insertions(+),
From: Guo Ren
core/ cBPF-JIT : TODO |
core/ eBPF-JIT : TODO |
core/ generic-idle-thread : ok |
core/ jump-labels : TODO |
core/ tracehook: ok |
debug/ KASAN: TODO |
debug/ gcov-profile-all
This delay has been proven to work until now, however, there is a
reproducible way to fail the driver probe because of it.
Adding the support for the PCIe gated peripheral clock that feeds the
Aardvark IP defers the Aardvark driver probe at boot time. The probe
functions calls pci_host_probe() at
Mimic U-Boot configuration to be sure all hardware registers are set
properly. This will be needed for future S2RAM operation.
Signed-off-by: Miquel Raynal
---
drivers/pci/controller/pci-aardvark.c | 14 ++
1 file changed, 14 insertions(+)
diff --git
Hello,
As part of an effort to bring suspend to RAM support to Armada 3700
SoCs (main target: ESPRESSObin), this series handles the work around
the PCIe IP.
First, more configuration is done in the 'setup' helper as inspired
from the U-Boot driver. This is needed to entirely initialize the IP
Document the possibility to reference a PHY.
Signed-off-by: Miquel Raynal
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/pci/aardvark-pci.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt
The IP needs its PHY to be properly configured to work. While the PHY
is usually already configured by the bootloader, we will need this
feature when adding S2RAM support. Take care of registering and
configuring the PHY from the driver itself.
Suggested-by: Grzegorz Jaszczyk
Signed-off-by:
Add suspend and resume callbacks. The priority of these are
"_noirq()", to workaround early access to the registers done by the
PCI core through the ->read()/->write() callbacks at resume time.
Signed-off-by: Miquel Raynal
---
drivers/pci/controller/pci-aardvark.c | 45
Describe the missing gated clock feeding the PCIe IP.
Signed-off-by: Miquel Raynal
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/pci/aardvark-pci.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt
The IP relies on a gated clock. When we will add S2RAM support, this
clock will need to be resumed before any PCIe registers are
accessed. Add support for this clock.
Signed-off-by: Miquel Raynal
---
drivers/pci/controller/pci-aardvark.c | 29 +++
1 file changed, 29
A line might be used by the PCIe IP to reset the endpoint card upon:
- platform reset,
- hot reset,
- link failure.
Describe the properties needed in this case (optional).
Signed-off-by: Miquel Raynal
---
Documentation/devicetree/bindings/pci/aardvark-pci.txt | 5 +
1 file changed, 5
A GPIO might be used to reset the PCI IP. Describe the property needed
in this case.
Signed-off-by: Miquel Raynal
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/pci/aardvark-pci.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
The PCIe IP is fed by a gated clock.
Signed-off-by: Miquel Raynal
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 65bf774516ec..f6f8d2b3b2c1
Add support for a possible external reset GPIO wired to the PCIe
endpoint card. Asserting/deasserting the reset line is done during the
warm reset because the warm reset operation already triggers the
internal reset line that may also reset the endpoint card (if muxed).
Signed-off-by: Miquel
Make use of the 'warm reset' register to ensure every peace of
hardware (core, phy, endpoint card) are in a known state before doing
the hardware setup.
The Aardvark IP can trigger a reset signal upon hot reset or link
failure that will only reach the components on the board without
affecting the
Ensure the PCIe endpoint card reset that is toggled by the PCIe
controller itself is muxed correctly on the EspressoBin.
Signed-off-by: Miquel Raynal
---
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git
The PCIe node is wired to the second PHY of the COMPHY IP.
Suggested-by: Grzegorz Jaszczyk
Signed-off-by: Miquel Raynal
---
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
One pin can be muxed as PCIe endpoint card reset.
Signed-off-by: Miquel Raynal
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index
On Tue, 8 Jan 2019, Ran Wang wrote:
> From: yinbo.zhu
>
> Remove USB errata checking code from driver. Applicability of erratum
> is retrieved by reading corresponding property in device tree.
> This property is written during device tree fixup.
>
> Signed-off-by: Ramneek Mehresh
>
One of the more common cases of allocation size calculations is finding the
size of a structure that has a zero-sized array at the end, along with memory
for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kzalloc(sizeof(struct
Hi Lee,
Missatge de Lee Jones del dia dv., 21 de des.
2018 a les 16:39:
>
> On Wed, 12 Dec 2018, Enric Balletbo i Serra wrote:
>
> > Hi,
> >
> > This is another patchset to try to cleanup a bit more the crossed
> > references for cros-ec driver between the MFD and the platform/chrome
> >
On Tue, 8 Jan 2019, Ran Wang wrote:
> arm/arm64's io.h doesn't define clrbits32() and clrsetbits_be32(), which
> causing compile failure on some Layerscape Platforms (such as LS1021A and
> LS2012A which also integrates FSL EHCI controller). So use
> ioread32be()/iowrite32be() instead to make it
Hello,
While working on suspend to RAM feature, I ran into troubles multiple
times when clocks where not suspending/resuming at the desired time. I
had a look at the core and I think the same logic as in the
regulator's core may be applied here to (very easily) fix this issue:
using device links.
So far the clk_hw_register_fixed_factor() call was not providing any
device structure. While doing so is harmless for regular use, the
missing device structure may be a problem for suspend to RAM support.
Since, device links have been added to clocks, links created during
probe will enforce the
One major concern when, for instance, suspending/resuming a platform
is to never access registers before the underlying clock has been
resumed, otherwise most of the time the kernel will just crash. One
solution is to use syscore operations when registering clock drivers
suspend/resume callbacks.
So far the clk_hw_register_fixed_factor() calls are not providing any
device structure. While doing so is harmless for regular use, the
missing device structure may be a problem for suspend to RAM support.
Since, device links have been added to clocks, links created during
probe will enforce the
The error message should state that the driver failed to get the
parent clock, not the opposite.
Signed-off-by: Miquel Raynal
---
drivers/clk/mvebu/armada-37xx-tbg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/mvebu/armada-37xx-tbg.c
The patch
regulator: Fix trivial language typos
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: ADAU7002: Add optional delay before start of capture
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
Thx Michal,
On Tue, Jan 08, 2019 at 04:40:31PM +0100, Michal Hocko wrote:
> On Tue 08-01-19 17:51:07, Guo Ren wrote:
> [...]
> > static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm)
> > {
> > pte_t *pte;
> > unsigned long i;
> >
> > pte = (pte_t *)
One of the more common cases of allocation size calculations is finding the
size of a structure that has a zero-sized array at the end, along with memory
for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kzalloc(sizeof(struct
On Tue, Jan 08, 2019 at 09:54:50AM +, Lee Jones wrote:
> On Mon, 07 Jan 2019, Mark Brown wrote:
> > Is there a tag I can merge?
> Afraid not, but I reserve the right to rebase my tree, so if you want
> one, you can have one.
Yes, please - that'd be most helpful!
signature.asc
Description:
On Mon, Jan 07, 2019 at 11:45:24PM -0500, Paul Elder wrote:
> Hi Bin,
>
> On Mon, Jan 07, 2019 at 01:11:57PM -0600, Bin Liu wrote:
> > Hi Paul,
> >
> > Sorry for the delay on reviewing it.
>
> Thanks for the review.
>
> > For the subject, can you please use
> >
> > usb: musb: gadget: fix
Typo in subject line (helper)
> On 26 Dec 2018, at 09:25, Yang Weijiang wrote:
>
> These functions are called when return CPUID xsave area
> size information.
>
> Signed-off-by: Zhang Yi
> Signed-off-by: Yang Weijiang
> ---
> target/i386/cpu.c | 26 +-
> 1 file
On Tue, 8 Jan 2019, Ran Wang wrote:
> From: Rajesh Bhagat
>
> CONFIG_USB_EHCI_FSL is not dependent on FSL_SOC, it can be built on
> non-PPC platforms.
>
> Signed-off-by: Rajesh Bhagat
> Signed-off-by: Ran Wang
> ---
> drivers/usb/host/Kconfig |4 ++--
> 1 files changed, 2 insertions(+),
None of these are required at the moment.
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_sysfs.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_sysfs.c
b/drivers/platform/chrome/cros_ec_sysfs.c
index
None of these are required at the moment.
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_lightbar.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_lightbar.c
b/drivers/platform/chrome/cros_ec_lightbar.c
index
None of these are required at the moment.
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_vbc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_vbc.c
b/drivers/platform/chrome/cros_ec_vbc.c
index af9bfe6f385c..86903bc31b27 100644
On Tue 08-01-19 13:04:22, Dave Chinner wrote:
> On Mon, Jan 07, 2019 at 05:41:39PM -0500, Waiman Long wrote:
> > On 01/07/2019 05:32 PM, Dave Chinner wrote:
> > > On Mon, Jan 07, 2019 at 10:12:56AM -0500, Waiman Long wrote:
> > >> As newer systems have more and more IRQs and CPUs available in
This driver no longer has any pr_{level} messages. Remove the pr_fmt().
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_lightbar.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_lightbar.c
This driver no longer has any pr_{level} messages. Remove the pr_fmt().
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_sysfs.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_sysfs.c
b/drivers/platform/chrome/cros_ec_sysfs.c
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_vbc.c | 24 +---
1 file changed, 5 insertions(+), 19 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_vbc.c
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_sysfs.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_sysfs.c
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_lightbar.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_debugfs.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git
None of these are required at the moment.
Signed-off-by: Enric Balletbo i Serra
---
drivers/platform/chrome/cros_ec_debugfs.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_debugfs.c
b/drivers/platform/chrome/cros_ec_debugfs.c
index
Hi,
After the patchset to move cros_ec sysfs attributes to its own drivers
[1], I'd like to do some cleanup and switch to the SPDX license on these
files. This patchset applies on top of [1] and can go through the
platform-chrome repository once [1] is applied.
Best regards,
Enric
[1]
On 8.1.2019 16:00, Vokáč Michal wrote:
> On 8.1.2019 15:56, Rob Herring wrote:
>> On Tue, Jan 8, 2019 at 5:43 AM Vokáč Michal wrote:
>>>
>>> On 29.12.2018 00:25, Rob Herring wrote:
On Tue, Dec 18, 2018 at 02:42:11PM +, Vokáč Michal wrote:
> These are i.MX6S/DL based SBCs embedded in
On Tue, Jan 08, 2019 at 03:48:27PM +, Jon Hunter wrote:
> > Yes so this does workaround the problem. However, per my previous
> > comments, I would like to explore whether it is necessary to allocate
> > the platform link component or if it can be static.
> To be specific, the following also
On 2019-01-08 16:16, Davidlohr Bueso wrote:
On 2019-01-08 04:42, Roman Penyaev wrote:
What we can do:
a) disable irqs if we are not in interrupt.
b) revert the patch completely.
David, is it really crucial in terms of performance to avoid double
local_irq_save() on Xen on this
On 1/8/19, Paul Menzel wrote:
> Dear Maarten,
>
>
> Thank you very much for the quick response.
>
> On 01/08/19 16:37, Maarten Lankhorst wrote:
>> Op 08-01-2019 om 16:07 schreef Paul Menzel:
>
>>> Building Linux 5.0-rc1 fails with the errors below. Please find the
>>> configuration file attached.
From: Sean Wang
linux 5.0-rc1 shows following warning on bpi-r2/mt7623 bootup:
[ 5.170597] WARNING: CPU: 3 PID: 1 at drivers/net/phy/phy.c:548
phy_start_aneg+0x110/0x144
[ 5.178826] called from state READY
[ 5.264111] [] (phy_start_aneg) from []
(mtk_init+0x414/0x47c)
[ 5.271630]
> On Jan 8, 2019, at 11:41 PM, Greg KH wrote:
>
> On Mon, Dec 03, 2018 at 06:26:43PM +0800, Kai-Heng Feng wrote:
>> USB Bluetooth controller QCA ROME (0cf3:e007) sometimes stops working
>> after S3:
>> [ 165.110742] Bluetooth: hci0: using NVM file: qca/nvm_usb_0302.bin
>> [ 168.432065]
One of the more common cases of allocation size calculations is finding the
size of a structure that has a zero-sized array at the end, along with memory
for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kzalloc(sizeof(struct
On Tue, 8 Jan 2019, Nicolas Saenz Julienne wrote:
> The hub sends hot-plug events to the host trough it's interrupt URB. The
> driver takes care of completing the URB and re-submitting it. Completion
> errors are handled in the hub_event() work, yet submission errors are
> ignored, rendering the
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kmalloc(sizeof(struct
One of the more common cases of allocation size calculations is finding the
size of a structure that has a zero-sized array at the end, along with memory
for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kzalloc(sizeof(struct
Dear Maarten,
Thank you very much for the quick response.
On 01/08/19 16:37, Maarten Lankhorst wrote:
> Op 08-01-2019 om 16:07 schreef Paul Menzel:
>> Building Linux 5.0-rc1 fails with the errors below. Please find the
>> configuration file attached.
>>
>> ```
>> $ make -j120
>> […]
>>
* Vincent Guittot [190108 08:00]:
> Hi Tony,
>
> On Tue, 8 Jan 2019 at 00:38, Tony Lindgren wrote:
> >
> > Hi all,
> >
> > Looks like commit 8234f6734c5d ("PM-runtime: Switch autosuspend
> > over to using hrtimers") caused a regression on at least
> > omap5-uevm where 8250 UART rx wake no
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kmalloc(sizeof(struct
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