On Tue, 12 Feb 2019 at 00:05, Rafael J. Wysocki wrote:
>
> On Mon, Feb 11, 2019 at 4:51 PM Ulf Hansson wrote:
> >
> > On Mon, 11 Feb 2019 at 14:27, Ulf Hansson wrote:
> > >
> > > On Thu, 7 Feb 2019 at 19:46, Rafael J. Wysocki wrote:
> > > >
> > > > From: Rafael J. Wysocki
> > > >
> > > > If
On 12.02.19 at 01:56, Andrew Morton wrote:
On Sat, 9 Feb 2019 12:35:03 +0200 Andy Shevchenko
wrote:
On Sat, Feb 9, 2019 at 12:08 AM Andrew Morton wrote:
On Fri, 8 Feb 2019 21:45:21 +0200 Andy Shevchenko
wrote:
On Tue, Oct 30, 2018 at 5:22 PM David Engraf wrote:
Unpacking an external
On Tue, 12 Feb 2019, Mark Zhang wrote:
> On 2/7/2019 4:48 PM, Lee Jones wrote:
> > On Tue, 29 Jan 2019, Mark Zhang wrote:
> >
> >> This patch set adds support for max77620 backup battery charging and
> >> low battery monitoring.
> >>
> >> Changes in v2:
> >> - Add devicetree binding
On 12/02/19 4:04 AM, Chaotian Jing wrote:
> On Tue, 2019-02-05 at 15:42 +0200, Adrian Hunter wrote:
>> On 5/02/19 3:06 PM, Ulf Hansson wrote:
>>> On Mon, 4 Feb 2019 at 14:42, Adrian Hunter wrote:
On 4/02/19 12:54 PM, Ulf Hansson wrote:
> On Mon, 4 Feb 2019 at 10:58, Adrian Hunter
On Tue, 12 Feb 2019, Mark Zhang wrote:
> Add PMIC configurations for backup battery charger, which
> is a constant voltage and constant current style charger
> with a series output resistance.
>
> The max77620 register CNFGBBC(addr: 0x04) defines the
> parameters of backup battery charger. This
On Tue, 12 Feb 2019, Aubrey Li wrote:
> The architecture specific information of the running processes could
> be useful to the userland. Add support to examine process architecture
> specific information externally.
>
> Signed-off-by: Aubrey Li
> Cc: Peter Zijlstra
> Cc: Andi Kleen
> Cc: Tim
On 12. 02. 19, 8:51, Greg Kroah-Hartman wrote:
> On Mon, Feb 11, 2019 at 02:25:33PM +0100, Christoph Hellwig wrote:
>> Hi Greg and Jiri,
>>
>> I've been working hard to get rid of the remaining callers the pass a
>> NULL struct device to the DMA mapping functions and am almost done.
>>
>> The only
On 11/02/19 3:23 PM, Thomas Petazzoni wrote:
> Even though SDHCI controllers may have a dedicated WP pin that can be
> queried using the SDHCI_PRESENT_STATE register, some platforms may
> chose to use a separate regular GPIO to route the WP signal. Such a
> GPIO is typically represented using the
On Tue, 2019-02-12 at 08:46 +0100, Daniel Vetter wrote:
> On Tue, Feb 12, 2019 at 10:36:23AM +0800, Hean-Loong, Ong via dri-
> devel wrote:
> > From: Ong, Hean Loong
> >
> > Driver for Intel FPGA Video and Image Processing Suite Frame Buffer
> > II.
> > The driver only supports the Intel Arria10
On Monday, February 11, 2019 5:54:54 PM CET Wolfram Sang wrote:
> On Mon, Feb 11, 2019 at 05:49:12PM +0100, Federico Vaga wrote:
> > It adds the SPDX tag and it removes the old text about the GPLv2.
> >
> > Signed-off-by: Federico Vaga
>
> I can convert the platform_data header to SPDX again.
Le 11/02/2019 à 16:23, Keith Busch a écrit :
> On Sun, Feb 10, 2019 at 09:19:58AM -0800, Jonathan Cameron wrote:
>> On Sat, 9 Feb 2019 09:20:53 +0100
>> Brice Goglin wrote:
>>
>>> Hello Keith
>>>
>>> Could we ever have a single side cache in front of two NUMA nodes ? I
>>> don't see a way to
On 11/02/19 3:23 PM, Thomas Petazzoni wrote:
> The SDHCI core is now properly checking for the state of a WP GPIO,
> so there is no longer any need for the sdhci-omap code to implement
> ->get_ro() using mmc_gpio_get_ro().
>
> Signed-off-by: Thomas Petazzoni
> Reviewed-by: Thierry Reding
On 11/02/19 3:23 PM, Thomas Petazzoni wrote:
> The SDHCI core is know properly checking for the state of a WP GPIO,
> so there is no longer any need for the sdhci-tegra code to implement
> ->get_ro() using mmc_gpio_get_ro().
>
> Signed-off-by: Thomas Petazzoni
> Tested-by: Thierry Reding
>
On Sun, 10 Feb 2019, Yauhen Kharuzhy wrote:
> Add MFD cell for LEDs driver to the Intel Cherry Trail Whiskey Cove PMIC
> mfd device driver.
>
> Signed-off-by: Yauhen Kharuzhy
> ---
> drivers/mfd/intel_soc_pmic_chtwc.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git
On 12/02/19 1:41 PM, Adrian Hunter wrote:
> On 11/02/19 3:23 PM, Thomas Petazzoni wrote:
>> The SDHCI core is now properly checking for the state of a WP GPIO,
>> so there is no longer any need for the sdhci-omap code to implement
>> ->get_ro() using mmc_gpio_get_ro().
>>
>> Signed-off-by:
On Tue, 12 Feb 2019, Thomas Gleixner wrote:
> On Tue, 12 Feb 2019, Aubrey Li wrote:
>
> > The architecture specific information of the running processes could
> > be useful to the userland. Add support to examine process architecture
> > specific information externally.
> >
> > Signed-off-by:
ebied...@xmission.com (Eric W. Biederman) writes:
> Oleg Nesterov writes:
>
>> sorry again for delay...
>>
>> On 02/07, Eric W. Biederman wrote:
>>>
>>> --- a/kernel/signal.c
>>> +++ b/kernel/signal.c
>>> @@ -2393,6 +2393,11 @@ bool get_signal(struct ksignal *ksig)
>>> goto relock;
On Mon, 2019-02-04 at 18:24 +0100, Matthias Brugger wrote:
>
> On 01/02/2019 08:38, michael@mediatek.com wrote:
> > From: Michael Kao
> >
> > The index of msr and adcpnp should match the sensor
> > which belongs to the selected bank in the for loop.
> >
>
> If I get that right, this fixes
On Thu, 07 Feb 2019, Brian Masney wrote:
> Now that ssbi-gpio is a proper hierarchical IRQ chip, and all in-tree
> users of device tree have been updated, we can now drop the hack that
> was introduced to disassociate the old Linux virq if a hwirq mapping
> already exists. That patch was
On 11/02/19 4:06 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> There are two users upstream which register external callbacks for
> switching the port power on/off and overcurrent protection. Both
> users only use two GPIOs for that. Instead of having that functionality
> in the
On 05/02/19 6:11 PM, Linus Walleij wrote:
> On Tue, Feb 5, 2019 at 10:49 AM Bartosz Golaszewski wrote:
>> From: Bartosz Golaszewski
>>
>> In order to drop the hard-coded GPIO base values from the davinci GPIO
>> driver's platform data, we first need to get rid of all calls to the
>> legacy GPIO
On Tue, 12 Feb 2019, Aubrey Li wrote:
> diff --git a/arch/x86/include/asm/processor.h
> b/arch/x86/include/asm/processor.h
> index d53c54b842da..60ee932070fe 100644
> --- a/arch/x86/include/asm/processor.h
> +++ b/arch/x86/include/asm/processor.h
> @@ -996,5 +996,7 @@ enum l1tf_mitigations {
>
Sebastian,
Just waiting on your Ack for the set.
Could you review this please?
> From: Bartosz Golaszewski
>
> Add basic support for the battery charger for max77650 PMIC.
>
> Signed-off-by: Bartosz Golaszewski
> ---
> drivers/power/supply/Kconfig| 7 +
>
Hi Arnd,
On Fri, 1 Feb 2019 at 19:53, Baolin Wang wrote:
>
> Hi Arnd,
> On Thu, 31 Jan 2019 at 00:52, Arnd Bergmann wrote:
> >
> > On Tue, Jan 22, 2019 at 2:21 PM Baolin Wang wrote:
> > >
> > > The DMA engine clients can trigger DMA engine automatically by setting
> > > the corresponding
On 11/02/19 5:55 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> NOTE: resending due to missing irqchip maintainers in Cc
>
> This series ports the davinci platform to using SPARSE_IRQ, cleans up
> the irqchip drivers and moves them over to drivers/irqchip.
>
> The series can be
On Tue, Feb 12, 2019 at 09:08:41AM +0100, Jiri Slaby wrote:
> On 12. 02. 19, 8:51, Greg Kroah-Hartman wrote:
> > On Mon, Feb 11, 2019 at 02:25:33PM +0100, Christoph Hellwig wrote:
> >> Hi Greg and Jiri,
> >>
> >> I've been working hard to get rid of the remaining callers the pass a
> >> NULL
On Mon, Feb 11, 2019 at 11:13:39PM -0800, Christoph Hellwig wrote:
> On Fri, Jan 18, 2019 at 03:03:08PM +0100, Johan Hovold wrote:
> > Use the new for_each_of_cpu_node() helper to iterate over cpu nodes
> > instead of open coding. Note that this will allow matching also on the
> > node name
On Mon, 11 Feb 2019 at 23:41, Rafael J. Wysocki wrote:
>
> On Mon, Feb 11, 2019 at 2:28 PM Ulf Hansson wrote:
> >
> > On Thu, 7 Feb 2019 at 19:46, Rafael J. Wysocki wrote:
> > >
> > > From: Rafael J. Wysocki
> > >
> > > If the target device has any suppliers, as reflected by device links
> >
On 11/02/19 5:55 PM, Bartosz Golaszewski wrote:
> @@ -74,6 +75,7 @@ void __init davinci_irq_init(void)
> {
> unsigned i, j;
> const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
> + int rv, irq_base;
>
> davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
>
pon., 11 lut 2019 o 23:28 Marc Zyngier napisał(a):
>
> On Tue, 29 Jan 2019 09:44:03 +0100
> Bartosz Golaszewski wrote:
>
> > From: Bartosz Golaszewski
> >
> > We want to support multiple instances of irq_sim. Make struct irq_chip
> > part of the irq_sim structure.
>
> Why? There is nothing
On 2/12/2019 4:04 PM, Lee Jones wrote:
> On Tue, 12 Feb 2019, Mark Zhang wrote:
>
>> On 2/7/2019 4:48 PM, Lee Jones wrote:
>>> On Tue, 29 Jan 2019, Mark Zhang wrote:
>>>
This patch set adds support for max77620 backup battery charging and
low battery monitoring.
Changes in v2:
On Mon, Feb 11, 2019 at 11:48:12PM +, alex_gagn...@dellteam.com wrote:
> On 2/9/19 5:58 AM, Lukas Wunner wrote:
> ECN [1] was approved last November, so it's normative spec text. Sorry
> if the Ukranians didn't get ahold of it yet. I'll try to explain the delta.
> There's an in-band PD
The following changes since commit d13937116f1e82bf508a6325111b322c30c85eb9:
Linux 5.0-rc6 (2019-02-10 14:42:20 -0800)
are available in the git repository at:
g...@github.com:c-sky/csky-linux.git tags/csky-for-linus-5.0-rc6
for you to fetch changes up to
pon., 11 lut 2019 o 23:26 Marc Zyngier napisał(a):
>
> On Tue, 29 Jan 2019 09:44:04 +0100
> Bartosz Golaszewski wrote:
>
> > From: Bartosz Golaszewski
> >
> > Delegate the offset to virq number mapping to the provided framework
> > instead of handling it locally. Use the legacy domain as we
On 2/11/19 8:06 PM, Uwe Kleine-König wrote:
> Hello Fabrice,
>
> On Mon, Feb 11, 2019 at 05:12:02PM +0100, Fabrice Gasnier wrote:
>> Add a device link between the PWM consumer and the PWM provider. This
>> enforces the PWM user to get suspended before the PWM provider. It
>> allows proper
wt., 12 lut 2019 o 09:24 Sekhar Nori napisał(a):
>
> On 11/02/19 5:55 PM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski
> >
> > NOTE: resending due to missing irqchip maintainers in Cc
> >
> > This series ports the davinci platform to using SPARSE_IRQ, cleans up
> > the irqchip
On Mon 11-02-19 17:50:46, Robin Murphy wrote:
> ARCH_MEMORY_PROBE is a useful thing for testing and debugging hotplug,
> but being able to exercise the (arguably trickier) hot-remove path would
> be even more useful. Extend the feature to allow removal of offline
> sections to be triggered
On Fri 08-02-19 10:06:04, Oscar Salvador wrote:
> isolate_huge_page() expects we pass the head of hugetlb page to it:
>
> bool isolate_huge_page(...)
> {
> ...
> VM_BUG_ON_PAGE(!PageHead(page), page);
> ...
> }
>
> While I really cannot think of any situation where we end up
On Fri, Feb 08, 2019 at 07:43:57AM +0530, Anshuman Khandual wrote:
> Hello,
>
> THP is currently supported for
>
> - PMD level pages (anon and file)
> - PUD level pages (file - DAX file system)
>
> THP is a single entry mapping at standard page table levels (either PMD or
> PUD)
>
> But
On 11/02/19 5:55 PM, Bartosz Golaszewski wrote:
> diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
> index 9d4a58a3113a..cde72ba35dc3 100644
> --- a/arch/arm/mach-davinci/usb.c
> +++ b/arch/arm/mach-davinci/usb.c
> @@ -5,13 +5,14 @@
> #include
> #include
> #include
> -
On Tue, 05 Feb 2019, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Add the core mfd driver for max77650 PMIC. We define five sub-devices
> for which the drivers will be added in subsequent patches.
>
> Signed-off-by: Bartosz Golaszewski
> ---
> drivers/mfd/Kconfig | 11
Cadence OSPI controller IP supports Octal IO (x8 IO lines),
It also has an integrated PHY. IP register layout is very
similar to existing QSPI IP except for additional bits to support Octal
and Octal DDR mode. Therefore, extend current driver to support Octal
mode. Only Octal SDR read (1-1-8)mode
This series adds support for OSPI version of Cadence QSPI controller IP.
Tested with AM654 EVM with MT35x512 Octal flash
Changes:
v5:
Fix comments from by on v4.
v4:
Fix comments on v3 by Tudor.
Rebase on top latest linux-next(all dependencies are now part of -next)
v3:
Rebase on top of v7 of
AM654 SoC has Cadence Octal SPI controller, which is similar to Cadence
QSPI controller but supports Octal IO(x8 data lines) and Double Data
Rate(DDR) mode. Add new compatible to support OSPI controller on TI's
AM654 SoCs.
Signed-off-by: Vignesh R
Reviewed-by: Rob Herring
---
v6: No change
On Thu, 07 Feb 2019, Brian Masney wrote:
> Convert the PM8XXX IRQ code to use the version 2 IRQ interface in order
> to support hierarchical IRQ chips. This is necessary so that ssbi-gpio
> can be setup as a hierarchical IRQ chip with PM8xxx as the parent. IRQ
> chips in device tree should be
On Mon, 11 Feb 2019 13:49:27 -0800
> Kees Cook wrote:
>
> > On Mon, Feb 11, 2019 at 12:28 PM Steven Rostedt wrote:
> > >
> > > On Mon, 11 Feb 2019 15:27:25 -0500
> > > Steven Rostedt wrote:
> > >
> > > > On Mon, 11 Feb 2019 12:21:32 -0800
> > > > Kees Cook wrote:
> > > >
> > > > > > > Looks
On Thu, 07 Feb 2019, Brian Masney wrote:
> Check to see if the hwirq is already associated with another virq on
> this IRQ domain. If so, then disassociate it before associating the
> hwirq with the new virq.
>
> This is a temporary hack that is needed in order to not break git
> bisect for
Hi Mark,
Sorry for late reply.
On Fri, 1 Feb 2019 at 21:05, Mark Brown wrote:
>
> On Fri, Feb 01, 2019 at 08:05:30PM +0800, Baolin Wang wrote:
>
> > On Spreadtrum platform, we use one mfd driver [1] to populate the
> > SC27XX series PMICs including SC2731, SC2721, SC2720 and SC2730. So we
> >
On 12. 02. 19, 9:25, Greg Kroah-Hartman wrote:
> It's just a #define, in a uapi file, so we should probably leave it as
> userspace programs _might_ depend on it. I have no idea why, but oh
> well...
Uh, I didn't even think this could be in a uapi header. Ok, it makes
sense then.
thanks,
--
js
Gustavo A. R. Silva schreef op ma 11-02-2019 om 16:34 [-0600]:
> In preparation to enabling -Wimplicit-fallthrough, mark switch
> cases where we are expecting to fall through.
>
> This patch fixes the following warning:
>
> drivers/isdn/gigaset/ser-gigaset.c: In function ‘gigaset_tty_ioctl’:
>
On 2/12/19 12:26 AM, Johan Hovold wrote:
On Mon, Feb 11, 2019 at 11:13:39PM -0800, Christoph Hellwig wrote:
On Fri, Jan 18, 2019 at 03:03:08PM +0100, Johan Hovold wrote:
Use the new for_each_of_cpu_node() helper to iterate over cpu nodes
instead of open coding. Note that this will allow
On Fri, Feb 1, 2019 at 12:54 AM Joe Perches wrote:
>
> On Thu, 2019-01-31 at 17:56 +0800, Pi-Hsun Shih wrote:
> > Currently for a header line "/* SPDX-License-Identifier: GPL-2.0 */",
> > only the part starting from "SPDX-" is passed to spdxcheck.py, and cause
> > false warning. Fix this by
Current overlap check of minor range cannot correctly
handle a case which is baseminor < existing baseminor &&
baseminor + minorct > existing baseminor + minorct.
Fix it and meanwhile do some code cleanups.
Fixes: 01d553d0fe9f90 ("Chardev checking of overlapping ranges")
Signed-off-by: Chengguang
Currently chardev allows to share major, showing
major with minor range for chardev will be more
helpful.
Signed-off-by: Chengguang Xu
---
fs/char_dev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/fs/char_dev.c b/fs/char_dev.c
index b25b1da097d5..6f00acdeb308 100644
On Mon, Feb 11, 2019 at 07:02:06PM -0600, Eric W. Biederman wrote:
> Greg Kroah-Hartman writes:
>
> > 4.20-stable review patch. If anyone has any objections, please let me
> > know.
>
> No objection. But I think of this as a feature addition rather than a
> fix for something. As a feature
On Fri, 08 Feb 2019, Andy Shevchenko wrote:
> On Fri, Feb 01, 2019 at 03:08:17PM +, Lee Jones wrote:
> > On Fri, 01 Feb 2019, Andy Shevchenko wrote:
> > > On Fri, Feb 1, 2019 at 11:50 AM Lee Jones wrote:
> > > > On Thu, 24 Jan 2019, Andy Shevchenko wrote:
> > > >
> > > > > We now using a
On Mon, 11 Feb 2019 08:23:04 -0700
Keith Busch wrote:
> On Sun, Feb 10, 2019 at 09:19:58AM -0800, Jonathan Cameron wrote:
> > On Sat, 9 Feb 2019 09:20:53 +0100
> > Brice Goglin wrote:
> >
> > > Hello Keith
> > >
> > > Could we ever have a single side cache in front of two NUMA nodes ? I
> >
On Thu, 24 Jan 2019, Andy Shevchenko wrote:
> We now using a common macro for PM operations in Intel LPSS driver,
> and, since that macro relies on the definition and macro from linux/pm.h
> header file, it's logical to include it directly in intel-lpss.h.
> Otherwise it's a bit fragile and
Hi,
On Tue, Feb 12, 2019 at 06:03:42AM +, Jun Li wrote:
> > > return dev_fwnode(dev->parent) == fwnode;
> >
> > That's actually not the case. struct usb_role_switch_desc has a member for
> > fwnode,
> > and that's what we use with the actual mux device. Check
> > usb_role_switch_register():
On Tue, Feb 12, 2019 at 07:21:00AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> On Tue, 12 Feb 2019 07:18:58 +1100 Stephen Rothwell
> wrote:
> >
> > Does the 4.20 stable tree use -Wimplicit-fallthrough? I assume not
> > (since v4.20 doesn't), so this warning does not happen in that tree.
>
>
Bartosz,
On Tue, 12 Feb 2019 08:30:32 +,
Bartosz Golaszewski wrote:
>
> pon., 11 lut 2019 o 23:26 Marc Zyngier napisał(a):
> >
> > On Tue, 29 Jan 2019 09:44:04 +0100
> > Bartosz Golaszewski wrote:
> >
> > > From: Bartosz Golaszewski
> > >
> > > Delegate the offset to virq number mapping
wt., 12 lut 2019 o 09:36 Lee Jones napisał(a):
>
> On Tue, 05 Feb 2019, Bartosz Golaszewski wrote:
>
> > From: Bartosz Golaszewski
> >
> > Add the core mfd driver for max77650 PMIC. We define five sub-devices
> > for which the drivers will be added in subsequent patches.
> >
> > Signed-off-by:
On Tue, Feb 12, 2019 at 12:47:09AM -0800, Atish Patra wrote:
> On 2/12/19 12:26 AM, Johan Hovold wrote:
> > On Mon, Feb 11, 2019 at 11:13:39PM -0800, Christoph Hellwig wrote:
> >> On Fri, Jan 18, 2019 at 03:03:08PM +0100, Johan Hovold wrote:
> >>> Use the new for_each_of_cpu_node() helper to
Hi Bjorn,
Am Montag, den 11.02.2019, 15:39 -0600 schrieb Bjorn Helgaas:
> On Wed, Feb 06, 2019 at 10:57:32AM +0100, Stefan Agner wrote:
> > Define the length of the DBI registers. This makes sure that
> > the kernel does not access registers beyond that point, avoiding
> > the following abort on
wt., 12 lut 2019 o 09:53 Marc Zyngier napisał(a):
>
> Bartosz,
>
> On Tue, 12 Feb 2019 08:30:32 +,
> Bartosz Golaszewski wrote:
> >
> > pon., 11 lut 2019 o 23:26 Marc Zyngier napisał(a):
> > >
> > > On Tue, 29 Jan 2019 09:44:04 +0100
> > > Bartosz Golaszewski wrote:
> > >
> > > > From:
On Mon, Feb 11, 2019 at 09:51:25PM +0100, Pavel Machek wrote:
> Hi!
>
> > 4.9-stable review patch. If anyone has any objections, please let me know.
> >
> > --
> >
> > [ Upstream commit f36797ee43802b367e59f0f9a9805304a4ff0c98 ]
> >
> > The device-tree booted MMP2 needs to
Am Montag, den 11.02.2019, 17:51 -0800 schrieb Andrey Smirnov:
> Add a binding for an extra clock required on i.MX8MQ.
>
> Signed-off-by: Andrey Smirnov
> Cc: Bjorn Helgaas
> Cc: Fabio Estevam
> Cc: Chris Healy
> Cc: Lucas Stach
> Cc: Leonard Crestez
> Cc: "A.s. Dong"
> Cc: Richard Zhu
>
On Tue, Feb 12, 2019 at 9:08 AM Ong, Hean Loong
wrote:
> On Tue, 2019-02-12 at 08:46 +0100, Daniel Vetter wrote:
> > On Tue, Feb 12, 2019 at 10:36:23AM +0800, Hean-Loong, Ong via dri-
> > devel wrote:
> > > From: Ong, Hean Loong
> > >
> > > Driver for Intel FPGA Video and Image Processing Suite
On Tue, Feb 12, 2019 at 04:47:38PM +0800, Chengguang Xu wrote:
> Current overlap check of minor range cannot correctly
> handle a case which is baseminor < existing baseminor &&
> baseminor + minorct > existing baseminor + minorct.
> Fix it and meanwhile do some code cleanups.
Ick, don't do a fix
On Tue, Feb 12, 2019 at 04:47:39PM +0800, Chengguang Xu wrote:
> Currently chardev allows to share major, showing
> major with minor range for chardev will be more
> helpful.
>
> Signed-off-by: Chengguang Xu
> ---
> fs/char_dev.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
>
Hello Fabrice,
On Tue, Feb 12, 2019 at 09:31:37AM +0100, Fabrice Gasnier wrote:
> On 2/11/19 8:06 PM, Uwe Kleine-König wrote:
> > On Mon, Feb 11, 2019 at 05:12:02PM +0100, Fabrice Gasnier wrote:
> >> @@ -943,6 +950,8 @@ struct pwm_device *devm_of_pwm_get(struct device *dev,
> >> struct
On Tuesday, February 5, 2019 4:19 AM, Nitesh Narayan Lal wrote:
> The following patch-set proposes an efficient mechanism for handing freed
> memory between the guest and the host. It enables the guests with no page
> cache to rapidly free and reclaims memory to and from the host respectively.
>
Mon, Feb 11, 2019 at 10:17:46PM CET, f.faine...@gmail.com wrote:
>Hi all,
>
>AFAICT there is no code that attempts to get the value of the attribute
>SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS while it is used with
>switchdev_port_attr_set().
>
>This is effectively no doing anything and it can slow down
Mon, Feb 11, 2019 at 10:17:47PM CET, f.faine...@gmail.com wrote:
>There is no code that will query the SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS
>attribute remove support for that.
>
>Signed-off-by: Florian Fainelli
Acked-by: Jiri Pirko
On 08/02/2019 13:26, Sugaya Taichi wrote:
> Add timer driver for Milbeaut SoCs series.
>
> The timer has two 32-bit width down counters, one of which is configured
> as a clockevent device and the other is configured as a clock source.
>
> Signed-off-by: Sugaya Taichi
Do want me to take it
Mon, Feb 11, 2019 at 10:17:48PM CET, f.faine...@gmail.com wrote:
>There is no code that attempts to get the
>SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS attribute, remove support for that.
>
>Signed-off-by: Florian Fainelli
Acked-by: Jiri Pirko
Mon, Feb 11, 2019 at 10:17:49PM CET, f.faine...@gmail.com wrote:
>There is no code that tries to get the attribute
>SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS, remove support for doing that.
>
>Signed-off-by: Florian Fainelli
Acked-by: Jiri Pirko
On Mon, Feb 11, 2019 at 11:01:12AM -0800, egran...@chromium.org wrote:
> From: Enrico Granata
>
> ACPI 5 added support for GpioInt resources as a way to provide
> information about interrupts mediated via a GPIO controller.
>
> Several device buses (e.g. SPI, I2C) have support for retrieving
>
On 22/01/2019 18:57, Tony Lindgren wrote:
> Commit 84badc5ec5fc ("ARM: dts: omap4: Move l4 child devices to probe
> them with ti-sysc") moved some omap4 timers to probe with ti-sysc
> interconnect target module. Turns out this broke pwm-omap-dmtimer
> where we now try to reparent the clock to
On Fri, Feb 01, 2019 at 11:36:34AM +0800, Shawn Guo wrote:
> On Tue, Jan 22, 2019 at 02:21:33PM +0100, Philippe Schenker wrote:
> > Philippe Schenker (2):
> > ARM: dts: Add stmpe-adc DT node to Toradex iMX6 modules
> > ARM: dts: Add stmpe-adc DT node to Toradex T30 modules
>
> Applied both,
On 29/01/2019 08:44, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Provide a more specialized variant of irq_sim_fire() that allows to
> specify the type of the fired interrupt. The type is stored in the
> dummy irq context struct via the set_type callback.
>
> Signed-off-by:
On 11.02.2019 17:07, Paweł Chmiel wrote:
> On poniedziałek, 11 lutego 2019 16:35:19 CET Andrzej Hajda wrote:
>> On 02.02.2019 15:27, Paweł Chmiel wrote:
>>> This patch adds Samsung S6E63M0 AMOLED LCD panel driver, connected over
>>> spi. It's based on already removed, non dt s6e63m0 driver and
>>>
On 02/12/2019 10:38 AM, Vignesh R wrote:
> Cadence OSPI controller IP supports Octal IO (x8 IO lines),
> It also has an integrated PHY. IP register layout is very
> similar to existing QSPI IP except for additional bits to support Octal
> and Octal DDR mode. Therefore, extend current driver to
On 2019/2/12 16:22, Thomas Gleixner wrote:
> On Tue, 12 Feb 2019, Aubrey Li wrote:
>> diff --git a/arch/x86/include/asm/processor.h
>> b/arch/x86/include/asm/processor.h
>> index d53c54b842da..60ee932070fe 100644
>> --- a/arch/x86/include/asm/processor.h
>> +++ b/arch/x86/include/asm/processor.h
On 24/01/2019 14:46, Christoffer Dall wrote:
> From: Andre Przywara
>
> A host running in VHE mode gets the EL2 physical timer as its time
> source (accessed using the EL1 sysreg accessors, which get re-directed
> to the EL2 sysregs by VHE).
>
> The EL1 physical timer remains unused by the host
On 11/02/2019 13:51, Peter Zijlstra wrote:
> On Mon, Feb 11, 2019 at 02:45:27PM +0100, Ingo Molnar wrote:
>>> diff --git a/kernel/sched/core.c b/kernel/sched/core.c
>>> index a674c7db..b1bb7e9 100644
>>> --- a/kernel/sched/core.c
>>> +++ b/kernel/sched/core.c
>>> @@ -3289,6 +3289,14 @@ static
On Fri, 08 Feb 2019, Matti Vaittinen wrote:
> Hello Lee,
>
> On Fri, Feb 08, 2019 at 10:57:43AM +, Lee Jones wrote:
> > >
> > > This is needed by both RTC and WDT drivers as RTC driver must stop the
> > > WDT when it sets RTC. WDT HW is using RTC counter and might trigger
> > >
On Tue, Jan 22, 2019 at 10:33:57PM +0800, Bo Wang wrote:
> From: wangbo
>
> In uio_dmem_genirq_open the variable ret is unneeded,remove it now.
>
> Signed-off-by: Bo Wang
This name does not match up with the "From:" line :(
Please fix up and resend.
thanks
greg k-h
On Tue, 2019-02-12 at 17:09 +0800, Shawn Guo wrote:
> On Fri, Feb 01, 2019 at 11:36:34AM +0800, Shawn Guo wrote:
> > On Tue, Jan 22, 2019 at 02:21:33PM +0100, Philippe Schenker wrote:
> > > Philippe Schenker (2):
> > > ARM: dts: Add stmpe-adc DT node to Toradex iMX6 modules
> > > ARM: dts: Add
On Mon, Feb 11, 2019 at 8:01 PM wrote:
>
> From: Enrico Granata
>
> ACPI 5 added support for GpioInt resources as a way to provide
> information about interrupts mediated via a GPIO controller.
>
> Several device buses (e.g. SPI, I2C) have support for retrieving
> an IRQ specified via this type
wt., 12 lut 2019 o 10:10 Marc Zyngier napisał(a):
>
> On 29/01/2019 08:44, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski
> >
> > Provide a more specialized variant of irq_sim_fire() that allows to
> > specify the type of the fired interrupt. The type is stored in the
> > dummy irq
On 2/12/19 12:53 AM, Johan Hovold wrote:
On Tue, Feb 12, 2019 at 12:47:09AM -0800, Atish Patra wrote:
On 2/12/19 12:26 AM, Johan Hovold wrote:
On Mon, Feb 11, 2019 at 11:13:39PM -0800, Christoph Hellwig wrote:
On Fri, Jan 18, 2019 at 03:03:08PM +0100, Johan Hovold wrote:
Use the new
On Mon, Feb 11, 2019 at 06:15:20PM +0100, Daniel Vetter wrote:
> Hi all,
>
> Here's the typed component topic branch.
>
> drm-intel maintainers: Please pull, I need this for the mei hdcp work from
> Ram.
>
> drm-misc maintainers: Please pull, there's a drm doc patch follow-up
> that I want to
Got it, I'll submit another patch after your patch merged.
Thanks,
Fish
Hans Verkuil 於 2019年2月8日 週五 下午5:58寫道：
>
> On 1/30/19 10:11 AM, Fish Lin wrote:
> > Add following V4L2 QP parameters for H.264:
> > * V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP
> > * V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP
>
On 12.02.19 10:03, Wang, Wei W wrote:
> On Tuesday, February 5, 2019 4:19 AM, Nitesh Narayan Lal wrote:
>> The following patch-set proposes an efficient mechanism for handing freed
>> memory between the guest and the host. It enables the guests with no page
>> cache to rapidly free and reclaims
On Sun, Feb 10, 2019 at 10:45:00PM +0100, Hugo Lefeuvre wrote:
> > Use pci_iomap instead of ioremap_nocache in nozomi_card_init(). This
> > is a cleaner way to do PCI MMIO (performs additional checks) and
> > allows to drop the manual call to pci_resource_start.
> >
> > pci_iomap relies on
The cpumasks updated here are not subject to concurrency and using
atomic bitops for them is pointless and expensive. Use the non-atomic
variants instead.
Suggested-by: Peter Zijlstra
Signed-off-by: Viresh Kumar
---
kernel/sched/fair.c | 6 +++---
kernel/sched/isolation.c | 2 +-
2 files
On 12/02/2019 07:19, Jitao Shi wrote:
> This patch adds mipi tx driver support for mt8183.
>
> Mipi_tx of mt8183 is very different to mt8173.
> 1.Separate mipi tx setting to mtk_mt8173_mipi_tx.c for mt8173
> 2.Separate mipi tx setting to mtk_mt8183_mipi_tx.c for mt8183
> 3.To reuse the common
On Tue, Feb 12, 2019 at 02:02:52PM +0800, Chengguang Xu wrote:
> Actually, total amount of available minor number
> for a single major is MINORMARK + 1. So expand
> minor range when registering chrdev region.
>
> Signed-off-by: Chengguang Xu
> ---
> drivers/misc/mei/main.c | 2 +-
> 1 file
On Mon, Feb 11, 2019 at 07:37:57PM +0530, Jagan Teki wrote:
> Hi Maxime,
>
> On Fri, Feb 1, 2019 at 8:01 PM Maxime Ripard
> wrote:
> >
> > On Tue, Jan 29, 2019 at 11:01:31PM +0530, Jagan Teki wrote:
> > > On Tue, Jan 29, 2019 at 8:43 PM Maxime Ripard
> > > wrote:
> > > >
> > > > On Mon, Jan
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