On Thu, May 16, 2019 at 07:55:53PM -0400, Sasha Levin wrote:
> On Thu, May 16, 2019 at 11:42:58AM -0700, Linus Torvalds wrote:
> > On Thu, May 16, 2019 at 11:39 AM Greg KH wrote:
> > >
> > > Thanks, I'll work on that later tonight...
> >
> > Note that it probably is almost entirely impossible
On 16.05.19 18:11, Stefan Wahren wrote:
> Hi Linus,
>
> On 16.05.19 17:07, Linus Torvalds wrote:
>> On Wed, May 15, 2019 at 9:43 PM Eduardo Valentin wrote:
>>> - thermal core has a new devm_* API for registering cooling devices, thanks
>>> to Guenter R.
>>> I took the entire series, that is
On Fri 17-05-19 13:42:04, Jiri Slaby wrote:
> We have a single node system with node 0 disabled:
> Scanning NUMA topology in Northbridge 24
> Number of physical nodes 2
> Skipping disabled node 0
> Node 1 MemBase Limit fbff
> NODE_DATA(1) allocated [mem
Tegra194 has six PCIe controllers based on Synopsys DesignWare core.
There are two Universal PHY (UPHY) blocks with each supporting 12(HSIO:
Hisg Speed IO) and 8(NVHS: NVIDIA High Speed) lanes respectively.
Controllers:0~4 use UPHY lanes from HSIO brick whereas Controller:5 uses
UPHY lanes from
Add #defines only for the Data Link Feature and Physical Layer 16.0 GT/s
features.
Signed-off-by: Vidya Sagar
Reviewed-by: Thierry Reding
---
Changes since [v6]:
* None
Changes since [v5]:
* None
Changes since [v4]:
* None
Changes since [v3]:
* None
Changes since [v2]:
* Updated commit
Tegra194 rootports don't generate MSI interrupts for PME events and hence
MSI needs to be disabled for them to avoid root ports service drivers
registering their respective ISRs with MSI interrupt.
Signed-off-by: Vidya Sagar
---
Changes since [v6]:
* This is a new patch
drivers/pci/quirks.c |
Remove multiple write enable and disable sequences of dbi registers as
Tegra194 implements writes to BAR-0 register (offset: 0x10) controlled by
DBI write-lock enable bit thereby not allowing any further writes to BAR-0
register in config space to take place. Hence enabling write permission at
the
Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
module instantiated one for each PCIe lane between Synopsys DesignWare core
based PCIe IP and Universal PHY block.
Signed-off-by: Vidya Sagar
Reviewed-by: Rob Herring
---
Changes since [v6]:
* None
Changes since [v5]:
*
Some host controllers need to know the existence of clkreq signal routing to
downstream devices to be able to advertise low power features like ASPM L1
substates. Without clkreq signal routing being present, enabling ASPM L1 sub
states might lead to downstream devices falling off the bus. Hence a
Move PCIe config space capability search API to common DesignWare file
as this can be used by both host and ep mode codes.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes since [v6]:
* Exported dw_pcie_find_capability() API
Changes since [v5]:
* None
Changes since [v4]:
*
Add support to enable CDM (Configuration Dependent Module) registers check
for any data corruption. CDM registers include standard PCIe configuration
space registers, Port Logic registers and iATU and DMA registers.
Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook
Add support to enable CDM (Configuration Dependent Module) register check
for any data corruption based on the device-tree flag 'snps,enable-cdm-check'.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes since [v6]:
* Changed "enable-cdm-check" to "snps,enable-cdm-check"
Changes
Add extended configuration space capability search API using struct dw_pcie *
pointer
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes since [v6]:
* None
Changes since [v5]:
* None
Changes since [v4]:
* None
Changes since [v3]:
* None
Changes since [v2]:
* None
Changes
Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree.
The Tegra194 SoC contains six PCIe controllers and twenty P2U instances
grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us)
and NVIDIA High Speed (NVHS-8 P2Us) respectively.
Signed-off-by: Vidya Sagar
---
Add support for Tegra194 PCIe controllers. These controllers are based
on Synopsys DesignWare core IP.
Signed-off-by: Vidya Sagar
---
Changes since [v6]:
* Changed description of the property "nvidia,bpmp".
* Removed property "nvidia,disable-aspm-states".
Changes since [v5]:
* Removed
Enable PCIe controller nodes to enable respective PCIe slots on
P2972- board. Following is the ownership of slots by different
PCIe controllers.
Controller-0 : M.2 Key-M slot
Controller-1 : On-board Marvell eSATA controller
Controller-3 : M.2 Key-E slot
Signed-off-by: Vidya Sagar
---
Changes
Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface
with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module.
For each PCIe lane of a controller, there is a P2U unit instantiated at
hardware level. This driver provides support for the programming required
for each
On Wed 15-05-19 11:41:12, Konstantin Khlebnikov wrote:
> Do not stuck forever if something wrong.
> This function also used for /proc/pid/smaps.
I do agree that the killable variant is better but I do not understand
the changelog. What would keep the lock blocked for ever? I do not think
we have
Add PCIe host controller driver for DesignWare core based
PCIe controller IP present in Tegra194.
Signed-off-by: Vidya Sagar
---
Changes since [v6]:
* None
Changes since [v5]:
* None
Changes since [v4]:
* None
Changes since [v3]:
* None
Changes since [v2]:
* None
Changes since [v1]:
*
Add support for Synopsys DesignWare core IP based PCIe host controller
present in Tegra194 SoC.
Signed-off-by: Vidya Sagar
---
Changes since [v6]:
* Removed code around "nvidia,disable-aspm-states" DT property
* Refactored code to remove code duplication
Changes since [v5]:
* Addressed review
On Wed 15-05-19 11:41:14, Konstantin Khlebnikov wrote:
> Ditto.
Proper changelog or simply squash those patches into a single patch if
you do not feel like copy is fun
>
> Signed-off-by: Konstantin Khlebnikov
> ---
> fs/proc/task_mmu.c |8 ++--
> 1 file changed, 6 insertions(+), 2
On Wed 15-05-19 11:41:19, Konstantin Khlebnikov wrote:
> Ditto.
ditto to the previous patch, including -EINTR.
>
> Signed-off-by: Konstantin Khlebnikov
> ---
> fs/proc/task_mmu.c |4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/fs/proc/task_mmu.c
On Wed 15-05-19 11:41:21, Konstantin Khlebnikov wrote:
> Replace the only unkillable mmap_sem lock in clear_refs_write.
Poor changelog again.
The change itself looks ok to me.
> Signed-off-by: Konstantin Khlebnikov
> ---
> fs/proc/task_mmu.c |5 -
> 1 file changed, 4 insertions(+), 1
Linus,
please pull sound fixes for v5.2-rc1 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-fix-5.2-rc1
The topmost commit is 56df90b631fc027fe28b70d41352d820797239bb
sound fixes for 5.2-rc1
On Wed 15-05-19 11:21:18, Konstantin Khlebnikov wrote:
> This function is used by ptrace and proc files like /proc/pid/cmdline and
> /proc/pid/environ. Return 0 (bytes read) if current task is killed.
Please add an explanation about why this is OK (as explained in the
follow up email).
>
Hi,
On 14/01/19 17:19, Juri Lelli wrote:
> Power Management and Scheduling in the Linux Kernel (OSPM-summit) III edition
> May 20-22, 2019
> Scuola Superiore Sant'Anna
> Pisa, Italy
>
> ---
>
> .:: FOCUS
>
> The III edition of the Power Management and Scheduling in the Linux
> Kernel (OSPM)
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* This automated bisection report was sent to you on the basis *
* that you may be involved with the breaking commit it has *
* found. No manual investigation has been done to verify it, *
* and the root cause of the
On Fri, 17 May 2019 at 14:41, Vidya Sagar wrote:
>
> Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree.
> The Tegra194 SoC contains six PCIe controllers and twenty P2U instances
> grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us)
> and NVIDIA High Speed
* Peter Zijlstra wrote:
> In perf_output_put_handle(), an IRQ/NMI can happen in below location and
> write records to the same ring buffer:
> ...
> local_dec_and_test(>nest)
> ... <-- an IRQ/NMI can happen here
> rb->user_page->data_head = head;
This adds support for printing stack frame description on invalid stack
accesses. The frame description is embedded by the compiler, which is
parsed and then pretty-printed.
Currently, we can only print the stack frame info for accesses to the
task's own stack, but not accesses to other tasks'
The MPR121 chip (and I2C bus in general) is quite sensitive to ESD.
An electrostatic discharge can easily cause a reset of the MPR121 chip.
Even though the chip then recovers and respond to read/write commands,
it is not properly initialized.
This state can be detected using a write-through cache
This driver is based on the original driver with interrupts. Polling
driver may be used in cases where the MPR121 chip is connected using
only the I2C interface and the interrupt line is not available.
Signed-off-by: Michal Vokáč
---
drivers/input/keyboard/Kconfig | 13 +
Normally, the MPR121 controller uses separate interrupt line to notify
the I2C host that a key was touched/released. To support platforms that
can not use the interrupt line, polling of the MPR121 registers can be
used.
Signed-off-by: Michal Vokáč
---
Changes since v1:
- Document the polled
Hi,
I have to deal with a situation where we have a custom i.MX6 based
platform in production that uses the MPR121 touchkey controller.
Unfortunately the chip is connected using only the I2C interface.
The interrupt line is not used. Back in 2015 (Linux v3.14), my
colleague modded the existing
Enable the I2C connected touch keypad on Hydra board.
Use the polled binding as the interrupt line is not available.
Signed-off-by: Michal Vokáč
---
arch/arm/boot/dts/imx6dl-yapp4-common.dtsi | 12
arch/arm/boot/dts/imx6dl-yapp4-hydra.dts | 4
2 files changed, 16
Adds the devicetree bindings for the Si5341 and Si5340 chips from
Silicon Labs. These are multiple-input multiple-output clock
synthesizers.
Signed-off-by: Mike Looijmans
---
v3: Remove synthesizers child nodes
Fix typo
v2: Add data sheet reference.
Restructured to enable use of
Hello Alan,
On 5/16/19 7:20 PM, Alan Cox wrote:
>
>> +static int rpmsg_tty_data_handler(struct rpmsg_device *rpdev, void *data,
>> + int len, void *priv, u32 src)
>> +{
>> +struct rpmsg_tty_port *cport = dev_get_drvdata(>dev);
>> +u8 *cbuf;
>> +int space;
On Fri, May 17, 2019 at 01:49:49PM +0530, Vidya Sagar wrote:
> On 5/16/2019 7:04 PM, Bjorn Helgaas wrote:
> > On Tue, May 14, 2019 at 09:00:19AM +0530, Vidya Sagar wrote:
> > > On 5/13/2019 12:55 PM, Christoph Hellwig wrote:
> > > > On Mon, May 13, 2019 at 10:36:13AM +0530, Vidya Sagar wrote:
> >
On Fri, May 17, 2019 at 11:17:23AM +0200, Greg Kroah-Hartman wrote:
> On Fri, May 17, 2019 at 07:53:49AM +, Quentin Deslandes wrote:
> > Returns error code from 'vnt_int_start_interrupt()' so the device's private
> > buffers will be correctly freed and 'struct ieee80211_hw' start function
> >
On Wed, May 15, 2019 at 11:12:50AM +0300, Jarkko Sakkinen wrote:
On Mon, Apr 15, 2019 at 11:56:35AM -0400, Sasha Levin wrote:
This patch adds support for a software-only implementation of a TPM
running in TEE.
There is extensive documentation of the design here:
As detected by kmemleak running on i.MX6ULL board:
nreferenced object 0xd8366600 (size 64):
comm "swapper/0", pid 1, jiffies 4294937370 (age 933.220s)
hex dump (first 32 bytes):
64 75 6d 6d 79 2d 69 6f 6d 75 78 63 2d 67 70 72 dummy-iomuxc-gpr
40 32 30 65 34 30 30 30 00 e3 f3 ab fe d1
On Thu, May 16, 2019 at 02:21:45PM +0100, Raphael Gault wrote:
> In order to be able to access the counter directly for userspace,
> we need to provide the index of the counter using the userpage.
> We thus need to override the event_idx function to retrieve and
> convert the perf_event index to
On 24/04/19 4:37 PM, Hans Verkuil wrote:
On 4/15/19 5:36 PM, Sumit Gupta wrote:
From: sumitg
Fixing use-after-free within __v4l2_ctrl_handler_setup().
Memory is being freed with kfree(new_ref) for duplicate
control reference entry but ctrl->cluster pointer is still
referring to freed
On Fri, May 17, 2019 at 03:05:59PM +0300, Vladimir Oltean wrote:
> Hi Shawn,
>
> Thanks for the feedback!
> Do you want a v2 now (will you merge it for 5.2) or should I send it
> after the merge window closes?
It's a 5.3 material.
Shawn
> The "nxp,sja1105t" compatible is not undocumented but
On Wed, May 08, 2019 at 05:17:44PM +0800, Chunfeng Yun wrote:
> Add a property usb-role-switch to tell the driver that use
> USB Role Switch framework to handle the role switch,
> it's useful when the driver has already supported other ways,
> such as extcon framework etc.
>
> Cc: Biju Das
> Cc:
From: Mark Brown
Sent: Thursday 16th May 2019 18:20
>
> On Thu, May 16, 2019 at 12:48:10PM +, Christoph Niedermaier wrote:
>
> > You are right, it has something do to with encryption on our mailing server.
> > I am in contact with our IT department to fix this issue.
> > Should I resend the
On Fri, May 17, 2019 at 01:15:43PM +, Quentin Deslandes wrote:
> On Fri, May 17, 2019 at 11:17:23AM +0200, Greg Kroah-Hartman wrote:
> > On Fri, May 17, 2019 at 07:53:49AM +, Quentin Deslandes wrote:
> > > Returns error code from 'vnt_int_start_interrupt()' so the device's
> > > private
>
Adds a driver for the Si5341 and Si5340 chips. The driver does not fully
support all features of these chips, but allows the chip to be used
without any support from the "clockbuilder pro" software.
If the chip is preprogrammed, that is, you bought one with some defaults
burned in, or you
Sorry, something went wrong.
The result is not as expected in one of the tests.
Abandon this series of patches.
Will debug and resubmit later.
Jim
On 2019年05月16日 22:56, Alan Stern wrote:
On Thu, 16 May 2019, Jim Lin wrote:
The Clear_TT_Buffer request sent to the hub includes the address
On 17/05/2019 11:25, Alexander Kapshuk wrote:
> On Fri, May 17, 2019 at 11:58 AM Bernd Petrovitsch
> wrote:
>>
>> On 17/05/2019 10:16, Alexander Kapshuk wrote:
>> [...]
>>> The 'xargs' '-r' flag is a GNU extension.
>>> If POSIX compliance is important here, the use of 'cat', 'xargs' and
>>>
On Fri, May 17, 2019 at 4:27 AM Fabrizio Castro
wrote:
>
> Add "Jiangsu HopeRun Software Co., Ltd." to the list of devicetree
> vendor prefixes as "hoperun".
>
> Website: http://www.hoperun.com/en
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Chris Paterson
>
> ---
> v2->v3:
> * Moved to
On Fri, May 17, 2019 at 03:17:02AM -0700, syzbot wrote:
> This bug is marked as fixed by commit:
> vfs: namespace: error pointer dereference in do_remount()
> But I can't find it in any tested tree for more than 90 days.
> Is it a correct commit? Please update it by replying:
> #syz fix:
And now as a proper patch:
---
From: Borislav Petkov
... so that early debugging output from the RSDP parsing code can be
visible and collected.
Suggested-by: Dave Young
Signed-off-by: Borislav Petkov
Cc: Baoquan He
Cc: Chao Fan
Cc: Jun'ichi Nomura
Cc: Kairui Song
Cc:
From: sumitg
Fixing use-after-free within __v4l2_ctrl_handler_setup().
Memory is being freed with kfree(new_ref) for duplicate
control reference entry but ctrl->cluster pointer is still
referring to freed duplicate entry resulting in error on
access. Change done to update cluster pointer only
Hi Bo,
On 5/17/19 1:02 AM, Tong, Bo wrote:
Is this patch going to be merged? Or still any blocking issue there?
Thanks,
Bo
-Original Message-
From: shuah [mailto:sh...@kernel.org]
Sent: Friday, April 19, 2019 10:05 PM
To: Tong, Bo ; l...@kernel.org; x...@kernel.org
Cc:
On 5/16/19 6:23 PM, Xing, Cedric wrote:
Hi Andy,
SIGSTRUCT isn't necessarily stored on disk so may not always have a fd.
How about the following?
void *ss_pointer = mmap(sigstruct_fd, PROT_READ,...);
ioctl(enclave_fd, SGX_INIT_THE_ENCLAVE, ss_pointer);
The idea here is SIGSTRUCT will still
The linux-next commit e45adf665a53 ("KVM: Introduce a new guest mapping
API") introduced compilation errors on arm64.
arch/arm64/kvm/../../../virt/kvm/kvm_main.c:1764:9: error: implicit
declaration of function 'memremap'
[-Werror,-Wimplicit-function-declaration]
hva =
ThOn 17/05/19 16:01, Qian Cai wrote:
> The linux-next commit e45adf665a53 ("KVM: Introduce a new guest mapping
> API") introduced compilation errors on arm64.
>
> arch/arm64/kvm/../../../virt/kvm/kvm_main.c:1764:9: error: implicit
> declaration of function 'memremap'
>
On Fri, May 17, 2019 at 3:48 PM Al Viro wrote:
>
> On Fri, May 17, 2019 at 03:17:02AM -0700, syzbot wrote:
> > This bug is marked as fixed by commit:
> > vfs: namespace: error pointer dereference in do_remount()
> > But I can't find it in any tested tree for more than 90 days.
> > Is it a correct
>
> I would think that ACPI hotplug would have a similar problem, but it does
> this:
>
> acpi_unbind_memory_blocks(info);
> __remove_memory(nid, info->start_addr, info->length);
ACPI does have exactly the same problem, so this is not a bug for this
series, I will
Hi,
I noticed that livepatching selftests fail on our master branch
(https://git.kernel.org/pub/scm/linux/kernel/git/livepatching/livepatching.git/).
...
TEST: busy target module ... not ok
--- expected
+++ result
@@ -7,16 +7,24 @@ livepatch: 'test_klp_callbacks_demo': in
Hi Cornelia,
> -Original Message-
> From: Cornelia Huck
> Sent: Friday, May 17, 2019 6:22 AM
> To: Parav Pandit
> Cc: k...@vger.kernel.org; linux-kernel@vger.kernel.org;
> kwankh...@nvidia.com; alex.william...@redhat.com; c...@nvidia.com
> Subject: Re: [PATCHv3 3/3] vfio/mdev:
This panic is unrelated to circular lock issue that I reported in a
separate thread, that also happens during memory hotremove.
xakep ~/x/linux$ git describe
v5.1-12317-ga6a4b66bd8f4
Config is attached, qemu script is following:
qemu-system-x86_64
On Fri, May 17, 2019 at 03:05:09PM +0200, Ingo Molnar wrote:
>
> * Peter Zijlstra wrote:
>
> > In perf_output_put_handle(), an IRQ/NMI can happen in below location and
> > write records to the same ring buffer:
> > ...
> > local_dec_and_test(>nest)
> > ...
This patch set introduces a TTY console on top of the RPMsg framework which
enables the following use cases:
- Provide a console to communicate easily with the remote processor
application.
- Provide an interface to get the remote processor log traces without
ring buffer limitation.
- Ease the
On 5/17/19 10:17 AM, Miroslav Benes wrote:
Hi,
I noticed that livepatching selftests fail on our master branch
(https://git.kernel.org/pub/scm/linux/kernel/git/livepatching/livepatching.git/).
...
TEST: busy target module ... not ok
--- expected
+++ result
@@ -7,16 +7,24 @@ livepatch:
This driver exposes a standard tty interface on top of the rpmsg
framework through the "rpmsg-tty-channel" rpmsg service.
This driver supports multi-instances, offering a /dev/ttyRPMSGx entry
per rpmsg endpoint.
Signed-off-by: Arnaud Pouliquen
Signed-off-by: Fabien Dessenne
---
Return the rpmsg buffer payload size for sending message, so rpmsg users
can split a long message in several sub rpmsg buffers.
Signed-off-by: Arnaud Pouliquen
Signed-off-by: Fabien Dessenne
---
drivers/rpmsg/rpmsg_core.c | 20
drivers/rpmsg/rpmsg_internal.h | 2
On Fri 17-05-19 10:20:38, Pavel Tatashin wrote:
> This panic is unrelated to circular lock issue that I reported in a
> separate thread, that also happens during memory hotremove.
>
> xakep ~/x/linux$ git describe
> v5.1-12317-ga6a4b66bd8f4
Does this happen on 5.0 as well?
--
Michal Hocko
SUSE
On 5/16/2019 9:29 PM, Lakshmi wrote:
On 5/16/19 7:34 AM, Ken Goldman wrote:
But outside the client machine this key id is not sufficient to
uniquely determine which key the signature corresponds to.
Why is this not sufficient?
In my implementation, I create a lookup table at the attestation
This is the final round of mostly small fixes in our initial
submit. The fix for the read only regressions is the most extensive
change and also intrudes outside of SCSI because the partition and read
only handling is mostly in block. The specific problem is the
inability to distinguish between
There are several clocks on the r9ag032 which are currently not enabled
in their drivers that can be delegated to clock domain system for power
management. Therefore add support for clock domain functionality to the
r9a06g032 clock driver.
Signed-off-by: Gareth Williams
---
On 17.05.19 16:38, Michal Hocko wrote:
> On Fri 17-05-19 10:20:38, Pavel Tatashin wrote:
>> This panic is unrelated to circular lock issue that I reported in a
>> separate thread, that also happens during memory hotremove.
>>
>> xakep ~/x/linux$ git describe
>> v5.1-12317-ga6a4b66bd8f4
>
> Does
Em Wed, May 15, 2019 at 06:44:29PM +0300, Alexey Budankov escreveu:
> On 15.05.2019 15:59, Arnaldo Carvalho de Melo wrote:
> > Em Wed, May 15, 2019 at 11:43:30AM +0300, Alexey Budankov escreveu:
> >> On 15.05.2019 0:46, Arnaldo Carvalho de Melo wrote:
> >>> Em Tue, May 14, 2019 at 05:20:41PM
On Fri, May 17, 2019 at 1:47 AM Jan Kara wrote:
>
> Let's add Kees to CC for usercopy expertise...
>
> On Thu 16-05-19 17:33:38, Dan Williams wrote:
> > Jeff discovered that performance improves from ~375K iops to ~519K iops
> > on a simple psync-write fio workload when moving the location of
On Fri, May 17, 2019 at 09:53:06AM -0400, Stephen Smalley wrote:
> On 5/16/19 6:23 PM, Xing, Cedric wrote:
> >I thought EXECMOD applied to files (and memory mappings backed by them) but
> >I was probably wrong. It sounds like EXECMOD applies to the whole process so
> >would allow all pages within
--
DEAR FRIEND:
GREETINGS FROM MY OWN SIDE; I AM MRS. GLORY SIMPORE ASUQUO, A WIDOW TO
LATE DIPLOMAT DR. SIMPORE RACHIDI ASUQUO.
I AM 52 YEARS OLD, SUFFERING FROM PANCREATIC CANCER. MY CONDITION IS
REALLY BAD AND IT IS QUITE OBVIOUS THAT I AM AFRAID OF MY LIFE.
I AM WILLING TO DONATE THE SUM
Em Fri, May 17, 2019 at 11:01:45AM +0200, Miguel Ojeda escreveu:
> On Fri, May 17, 2019 at 10:51 AM Greg KH wrote:
> >
> > On Fri, May 17, 2019 at 10:35:29AM +0200, Miguel Ojeda wrote:
> > > On Fri, May 17, 2019 at 9:38 AM Peter Zijlstra
> > > wrote:
> > > >
> > > > Right; if there is anything
Yes (and syzbot seemed to confirm the fix). I didn't realize I needed
to manually close the issue. I guess you closed it yesterday.
From: Dmitry Vyukov
Date: Fri, May 17, 2019 at 3:08 AM
To: syzbot
Cc: Arve Hjønnevåg, Christian Brauner, open list:ANDROID DRIVERS, Greg
Kroah-Hartman, Joel
It is best practice to have 1 binding per file, so board level bindings
should be separate for various misc SoC bindings.
Cc: Mark Rutland
Cc: Carlo Caione
Cc: Kevin Hilman
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-amlo...@lists.infradead.org
Convert Amlogic SoC bindings to DT schema format using json-schema.
Cc: Carlo Caione
Cc: Kevin Hilman
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
v3:
- Add board descriptions
- Rebase onto Linus' master
.../devicetree/bindings/arm/amlogic.txt | 113
Convert Actions Semi SoC bindings to DT schema format using json-schema.
Cc: "Andreas Färber"
Cc: Manivannan Sadhasivam
Cc: Mark Rutland
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
v3:
- update MAINTAINERS
On Fri, May 17, 2019 at 5:26 PM Todd Kjos wrote:
>
> Yes (and syzbot seemed to confirm the fix). I didn't realize I needed
> to manually close the issue. I guess you closed it yesterday.
This is required to auto-close the bug when the commit is merged:
> IMPORTANT: if you fix the bug, please
On 17/05/2019 17:27, Rob Herring wrote:
> It is best practice to have 1 binding per file, so board level bindings
> should be separate for various misc SoC bindings.
>
> Cc: Mark Rutland
> Cc: Carlo Caione
> Cc: Kevin Hilman
> Cc: devicet...@vger.kernel.org
> Cc:
This divisor is controlled by the firmware, we don't want the clock
subsystem to update it inadvertently.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/clk/bcm/clk-bcm2835.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c
Raspberry Pi's firmware offers and interface though which update it's
performance requirements. It allows us to request for specific runtime
frequencies, which the firmware might or might not respect, depending on
the firmware configuration and thermals.
As the maximum and minimum frequencies are
Convert Alpine SoC bindings to DT schema format using json-schema.
Cc: Tsahee Zidenberg
Cc: Antoine Tenart
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/al,alpine.txt | 16 --
Raspberry Pi's firmware, which runs in a dedicated processor, keeps
track of the board's temperature and voltage. It's resposible for
scaling the CPU frequency whenever it deems the device reached an unsafe
state. On top of that the firmware provides an interface which allows
Linux to to query the
Raspberry Pi's firmware is responsible for updating the cpu clocks and
pll. This makes sure we get the right rates anytime.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/clk/bcm/clk-bcm2835.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Hi all,
as some of you may recall I've been spending some time looking into
providing 'cpufreq' support for the Raspberry Pi platform[1]. I think
I'm close to something workable, so I'd love for you to comment on it.
There has been some design changes since the last version. Namely the
fact that
The four CPUs share a same clock source called pllb_arm. The clock can
be scaled through the raspberrypi firmware interface.
Signed-off-by: Nicolas Saenz Julienne
---
arch/arm/boot/dts/bcm2837.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2837.dtsi
From: Dmitry Vyukov
Date: Fri, May 17, 2019 at 3:26 AM
To: Greg Kroah-Hartman, Arve Hjønnevåg, Todd Kjos, Martijn Coenen,
Joel Fernandes, Christian Brauner, open list:ANDROID DRIVERS, LKML
Cc: syzkaller
> Hi,
>
> I have 2 questions re drivers/android/binder.c stress testing.
>
> 1. Are there any
On 17/05/2019 17:27, Rob Herring wrote:
> Convert Amlogic SoC bindings to DT schema format using json-schema.
>
> Cc: Carlo Caione
> Cc: Kevin Hilman
> Cc: Mark Rutland
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring
> ---
> v3:
> - Add board descriptions
> - Rebase onto Linus'
Convert Atmel SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Nicolas Ferre
Cc: Alexandre Belloni
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Rob Herring
---
v3:
- correct maintainers
On 10/05/2019 13:29, Amit Kucheria wrote:
> The idle-states binding documentation[1] mentions that the
> 'entry-method' property is required on 64-bit platforms and must be set
> to "psci".
>
> Signed-off-by: Amit Kucheria
Acked-by: Daniel Lezcano
> ---
>
On 10/05/2019 13:29, Amit Kucheria wrote:
> Instead of using Qualcomm-specific terminology, use generic node names
> for the idle states that are easier to understand. Move the description
> into the "idle-state-name" property.
>
> Signed-off-by: Amit Kucheria
Acked-by: Daniel Lezcano
> ---
On Thu, May 16, 2019 at 05:26:15PM -0700, Andy Lutomirski wrote:
> On Thu, May 16, 2019 at 5:03 PM Sean Christopherson
> wrote:
> >
> > On Wed, May 15, 2019 at 11:27:04AM -0700, Andy Lutomirski wrote:
> > > Here's a very vague proposal that's kind of like what I've been
> > > thinking over the
> On 16. May 2019, at 15:50, Graf, Alexander wrote:
>
> On 14.05.19 08:16, Filippo Sironi wrote:
>> Start populating /sys/hypervisor with KVM entries when we're running on
>> KVM. This is to replicate functionality that's available when we're
>> running on Xen.
>>
>> Start with
Convert MediaTek SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Matthias Brugger
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-media...@lists.infradead.org
Signed-off-by: Rob Herring
---
v3:
- Rebase to Linus' master
On 10/05/2019 13:29, Amit Kucheria wrote:
> From: Niklas Cassel
>
> Add device bindings for cpuidle states for cpu devices.
>
> [amit: rename the idle-states to more generic names and fixups]
>
> Signed-off-by: Niklas Cassel
> Reviewed-by: Vinod Koul
> Signed-off-by: Amit Kucheria
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