From: Jakub Kicinski
Date: Mon, 11 May 2020 10:08:07 -0700
> ENOTSUPP often feels like the right error code to use, but it's
> in fact not a standard Unix error. E.g.:
>
> $ python
import errno
errno.errorcode[errno.ENOTSUPP]
> Traceback (most recent call last):
> File "", line 1,
On Mon, May 11, 2020 at 05:20:08PM -0300, Arnaldo Melo wrote:
>
> Thanks, applied
>
Thanks, Arnaldo.
I wonder if could also take the other two:
https://lore.kernel.org/lkml/20200511200911.GA13149@embeddedor/
https://lore.kernel.org/lkml/20200511201227.GA14041@embeddedor/
--
Gustavo
On Mon, May 11, 2020 at 11:10:45PM +, Luis Chamberlain wrote:
> On Mon, May 11, 2020 at 05:59:04PM -0400, Rafael Aquini wrote:
> > The sysctl knob allows any user with SYS_ADMIN capability to
> > taint the kernel with any arbitrary value, but this might
> > produce an invalid flags bitset
sa_8021q-in-vlan_filtering-1-mode/20200512-024329
> base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git
> a6f0b26d6a5dcf27980e65f965779a929039f11d
> config: xtensa-randconfig-r021-20200511 (attached as .config)
> compiler: xtensa-linux-gcc (GCC) 9.3.0
> reproduce:
Added documentation to configure servers to use Intel(R) Speed
Select Technology using intel-speed-select tool.
Signed-off-by: Srinivas Pandruvada
Acked-by: Andriy Shevchenko
---
v3:
- Match the command results with the latest tool and added to this
documentation.
Tool made some "numbers" to
Stephen,
> Fixes: 4910b524ac9 ("scsi: qla2xxx: Add support for setting port speed")
>
> has these problem(s):
>
> - SHA1 should be at least 12 digits long
I'm pretty good at spotting 8-digit SHAs but the 11 digits tripped me up
in this case.
I refined the SHA validation logic in my commit
From: Xiaoliang Yang
Date: Mon, 11 May 2020 13:43:31 +0800
> @@ -710,7 +714,7 @@ static void felix_port_policer_del(struct dsa_switch *ds,
> int port)
> ocelot_port_policer_del(ocelot, port);
> }
>
> -static const struct dsa_switch_ops felix_switch_ops = {
> +static struct
On Mon, May 11, 2020 at 4:33 PM Babu Moger wrote:
>
> Both Intel and AMD support (MPK) Memory Protection Key feature.
> Move the feature detection from VMX to the common code. It should
> work for both the platforms now.
>
> Signed-off-by: Babu Moger
> ---
> arch/x86/kvm/cpuid.c |4 +++-
>
From: Florian Fainelli
Date: Mon, 11 May 2020 16:47:13 -0700
> This patch series constifies the dsa_device_ops for ocelot and sja1105
Series applied, thanks Florian.
sja1105_netdev_ops should be const since that is what the DSA layer
expects.
Signed-off-by: Florian Fainelli
---
net/dsa/tag_sja1105.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/dsa/tag_sja1105.c b/net/dsa/tag_sja1105.c
index d553bf36bd41..5ecac5921a7d 100644
---
ocelot_netdev_ops should be const since that is what the DSA layer
expects.
Signed-off-by: Florian Fainelli
---
net/dsa/tag_ocelot.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/dsa/tag_ocelot.c b/net/dsa/tag_ocelot.c
index 59de1315100f..b0c98ee4e13b 100644
---
This patch series constifies the dsa_device_ops for ocelot and sja1105
Florian Fainelli (2):
net: dsa: ocelot: Constify dsa_device_ops
net: dsa: tag_sja1105: Constify dsa_device_ops
net/dsa/tag_ocelot.c | 2 +-
net/dsa/tag_sja1105.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
On 5/11/20 4:32 PM, Babu Moger wrote:
> AMD's next generation of EPYC processors support the MPK (Memory
> Protection Keys) feature.
>
> So, rename X86_INTEL_MEMORY_PROTECTION_KEYS to X86_MEMORY_PROTECTION_KEYS.
>
> No functional changes.
>
> AMD documentation for MPK feature is available at
Both Intel and AMD support (MPK) Memory Protection Key feature.
Move the feature detection from VMX to the common code. It should
work for both the platforms now.
Signed-off-by: Babu Moger
---
arch/x86/kvm/cpuid.c |4 +++-
arch/x86/kvm/vmx/vmx.c |4
2 files changed, 3
From: WeiXiong Liao
In order to configure itself, the MTD backend needs to be able to query
the current pstore configuration. Introduce pstore_blk_get_config() for
this purpose.
Signed-off-by: WeiXiong Liao
Link:
From: WeiXiong Liao
pstore/blk is similar to pstore/ram, but uses a block device as the
storage rather than persistent ram.
The pstore/blk backend solves two common use-cases that used to preclude
using pstore/ram:
- not all devices have a battery that could be used to persist
regular RAM
From: WeiXiong Liao
One requirement to support MTD devices in pstore/zone is having a
way to declare certain regions as broken. Add this support to
pstore/zone.
The MTD driver should return -ENOMSG when encountering a bad region,
which tells pstore/zone to skip and try the next one.
MPK feature is supported by both VMX and SVM. So we can
safely move pkru state save/restore to common code. Also
move all the pkru data structure to kvm_vcpu_arch.
Also fixes the problem Jim Mattson pointed and suggested below.
"Though rdpkru and wrpkru are contingent upon CR4.PKE, the PKRU
On 5/11/20 6:57 AM, Mike Rapoport wrote:
> On Wed, May 06, 2020 at 05:41:40PM -0700, Anthony Yznaga wrote:
>> The size of the memblock reserved array may be increased while preserved
>> pages are being reserved. When this happens, preserved pages that have
>> not yet been reserved are at risk
AMD's next generation of EPYC processors support the MPK (Memory
Protection Keys) feature.
So, rename X86_INTEL_MEMORY_PROTECTION_KEYS to X86_MEMORY_PROTECTION_KEYS.
No functional changes.
AMD documentation for MPK feature is available at "AMD64 Architecture
Programmer’s Manual Volume 2: System
From: WeiXiong Liao
Add support for non-block devices (e.g. MTD). A non-block driver calls
pstore_blk_register_device() to register iself.
In addition, pstore/zone is updated to handle non-block devices,
where an erase must be done before a write. Without this, there is no
way to remove records
AMD's next generation of EPYC processors support the MPK (Memory
Protection Keys) feature.
AMD documentation for MPK feature is available at "AMD64 Architecture
Programmer’s Manual Volume 2: System Programming, Pub. 24593 Rev. 3.34,
Section 5.6.6 Memory Protection Keys (MPK) Bit".
The
From: WeiXiong Liao
Support backend for console. To enable console backend, just make
console_size be greater than 0 and a multiple of 4096.
Signed-off-by: WeiXiong Liao
Link:
https://lore.kernel.org/r/1585126506-18635-6-git-send-email-liaoweixi...@allwinnertech.com
Signed-off-by: Kees Cook
From: WeiXiong Liao
Add pmsg support to pstore/blk (through pstore/zone). To enable, pmsg_size
must be greater than 0 and a multiple of 4096.
Signed-off-by: WeiXiong Liao
Link:
https://lore.kernel.org/r/1585126506-18635-5-git-send-email-liaoweixi...@allwinnertech.com
Signed-off-by: Kees Cook
From: WeiXiong Liao
This introduces mtdpstore, which is similar to mtdoops but more
powerful. It uses pstore/blk, and aims to store panic and oops logs to
a flash partition, where pstore can later read back and present as files
in the mounted pstore filesystem.
To make mtdpstore work, the
From: WeiXiong Liao
Implement a common set of APIs needed to support pstore storage zones,
based on how ramoops is designed. This will be used by pstore/blk with
the intention of migrating pstore/ram in the future.
Signed-off-by: WeiXiong Liao
Link:
From: WeiXiong Liao
Add details on using pstore/blk, the new backend of pstore to record
dumps to block devices, in Documentation/admin-guide/pstore-blk.rst
Signed-off-by: WeiXiong Liao
Link:
https://lore.kernel.org/r/1585126506-18635-8-git-send-email-liaoweixi...@allwinnertech.com
Hi,
After some small fixes, here's v8. :) Thanks!
-Kees
v8:
- oops -> kmsg dump (WeiXiong)
- typo/language fixes (Randy)
- fix bdev failure paths (WeiXiong)
- fix dev_err() -> pr_err (WeiXiong)
v7: https://lore.kernel.org/lkml/20200510202436.63222-1-keesc...@chromium.org/
v6:
In order to use arbitrary block devices as a pstore backend, provide a
new module param named "best_effort", which will allow using any block
device, even if it has not provided a panic_write callback.
Signed-off-by: Kees Cook
---
fs/pstore/blk.c | 21 -
1 file changed, 20
From: WeiXiong Liao
Support backend for ftrace. To enable ftrace backend, just make
ftrace_size be greater than 0 and a multiple of 4096.
Signed-off-by: WeiXiong Liao
Link:
https://lore.kernel.org/r/1585126506-18635-7-git-send-email-liaoweixi...@allwinnertech.com
Signed-off-by: Kees Cook
---
On Tue, 12 May 2020 01:07:44 +0200
Paul Menzel wrote:
> >>
> >> initcall_debug log_buf_len=32M trace_buf_size=57074K
> >> trace_clock=global
> >>
This patch adds USB role switch support to the tps6598x.
The setup to initiate or accept a data-role switch is both assumed and
currently required to be baked-into the firmware as described in TI's
document here.
Link: https://www.ti.com/lit/an/slva843a/slva843a.pdf
With this change its
On Mon, May 11, 2020 at 06:54:11PM +0800, WeiXiong Liao wrote:
> On 2020/5/11 AM 4:24, Kees Cook wrote:
> > Hi!
> >
> > Well, I guess I spoke too soon. :) Here is v7. Hopefully this is
> > it. WeiXiong, can you test this and make sure you're happy with the
> > results?
>
> I tested it on
On Mon, May 11, 2020 at 05:01:26PM +0800, WeiXiong Liao wrote:
> On 2020/5/11 AM 4:24, Kees Cook wrote:
> > [...]
> > + if (strlen(info->device) == 0) {
> > + dev_err(>dev, "mtd device must be supplied\n");
>
> mtd is NULL here, "mtd->dev" leads to error.
>
> > + return
On Mon, May 11, 2020 at 08:38:32AM -0700, Randy Dunlap wrote:
> On 5/10/20 1:24 PM, Kees Cook wrote:
> > diff --git a/fs/pstore/Kconfig b/fs/pstore/Kconfig
> > index f18cd126d83f..f1484f751c5e 100644
> > --- a/fs/pstore/Kconfig
> > +++ b/fs/pstore/Kconfig
> > @@ -236,3 +236,15 @@ config
> From: Kai-Heng Feng
> Sent: Monday, May 4, 2020 9:02 PM
> To: Kirsher, Jeffrey T
> Cc: Kai-Heng Feng ; Brown, Aaron F
> ; David S. Miller ;
> moderated list:INTEL ETHERNET DRIVERS ;
> open list:NETWORKING DRIVERS ; open list ker...@vger.kernel.org>
> Subject: [PATCH v2] igb: Report speed and
11.05.2020 05:05, Wang, Jiada пишет:
> Hello Dmitry
>
> Thanks for your comment and test,
>
> can you let me know which platform (board) you are using for test,
> and DTS changes if you have added any.
That's this device-tree [1] without any extra changes.
[1]
On Mon, Apr 27, 2020 at 03:31:30PM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai
>
> The bindings currently list a very small subset of valid triggers for
> LEDs. Since many drivers or subsystems in Linux register custom
> triggers, the list would become very hard to maintain.
The idea was
Feel free to add my tested by
On Mon, 11 May 2020 at 23:58, Arvind Sankar wrote:
>
> Mike Lothian reports that after commit
> 964124a97b97 ("efi/x86: Remove extra headroom for setup block")
> gcc 10.1.0 fails with
>
> HOSTCC arch/x86/boot/tools/build
>
>
On Mon, May 11, 2020 at 08:36:49AM -0700, Randy Dunlap wrote:
> On 5/10/20 1:24 PM, Kees Cook wrote:
> > diff --git a/fs/pstore/Kconfig b/fs/pstore/Kconfig
> > index 98d2457bdd9f..92ba73bd0b62 100644
> > --- a/fs/pstore/Kconfig
> > +++ b/fs/pstore/Kconfig
> > @@ -160,3 +160,67 @@ config
On Mon, May 11, 2020 at 05:59:04PM -0400, Rafael Aquini wrote:
> The sysctl knob allows any user with SYS_ADMIN capability to
> taint the kernel with any arbitrary value, but this might
> produce an invalid flags bitset being committed to tainted_mask.
>
> This patch introduces a simple way for
On Mon, May 11, 2020 at 04:36:51PM +0800, WeiXiong Liao wrote:
> On 2020/5/11 AM 4:24, Kees Cook wrote:
> > [...]
> > +static struct block_device *psblk_get_bdev(void *holder,
> > + struct bdev_info *info)
>
> Well. That's pretty a good idea to get information
Dear Steven,
Thank you for your quick response.
Am 11.05.20 um 20:58 schrieb Steven Rostedt:
On Sat, 9 May 2020 12:16:30 +0200 Paul Menzel wrote:
Linux master and Linux 5.6.7 (from Debian Sid/unstable) are used.
Instrumenting Linux’ start-up time, I’d like to trace the init function
of
On Mon, May 11, 2020 at 6:42 PM Lyude Paul wrote:
> diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
> b/drivers/gpu/drm/nouveau/nouveau_connector.c
> index 43bcbb6d73c4..6dae00da5d7e 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_connector.c
> +++
On Sun, 26 Apr 2020 22:42:02 -0700, Bjorn Andersson wrote:
> Add SM8250 compatible to the qcom_aoss binding and driver.
>
> Signed-off-by: Bjorn Andersson
> ---
> Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt | 1 +
> drivers/soc/qcom/qcom_aoss.c |
On Tue, Apr 28, 2020 at 04:12:21PM +0200, Paul Cercueil wrote:
> This one patch will need a V2, I messed up with the clocks.
Looks fine otherwise.
>
> -Paul
>
>
> Le dim. 26 avril 2020 à 20:58, Paul Cercueil a écrit
> :
> > Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
> >
> >
On Sun, 26 Apr 2020 20:58:55 +0200, Paul Cercueil wrote:
> Convert the ingenic,uart.txt to a new ingenic,uart.yaml file.
>
> A few things were changed in the process:
> - the dmas and dma-names properties are now required.
> - the ingenic,jz4770-uart and ingenic,jz4775-uart compatible strings now
On Mon, May 11, 2020 at 04:36:21PM +0800, WeiXiong Liao wrote:
> On 2020/5/11 AM 4:24, Kees Cook wrote:
> > [...]
> > + * @time: oops/panic trigger time
>
> The above comment should be corrected since it is not only oops/panic
> any more.
Ah yes, thanks! I'll clean these all up.
> > [...]
> > +
a6f0b26d6a5dcf27980e65f965779a929039f11d
config: xtensa-randconfig-r021-20200511 (attached as .config)
compiler: xtensa-linux-gcc (GCC) 9.3.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
On Sun, 26 Apr 2020 20:58:54 +0200, Paul Cercueil wrote:
> Convert the i2c-jz4780.txt file to ingenic,i2c.yaml.
>
> Two things were changed in the process:
> - the clock-frequency property can now only be set to the two values
> that can be set by the hardware;
> - the dmas and dma-names
On 5/11/2020 6:53 AM, Vladimir Oltean wrote:
> From: Vladimir Oltean
>
> This function returns a boolean denoting whether the VLAN passed as
> argument is part of the 1024-3071 range that the dsa_8021q tagging
> scheme uses.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Florian Fainelli
On 5/11/2020 6:53 AM, Vladimir Oltean wrote:
> From: Russell King
>
> DSA assumes that a bridge which has vlan filtering disabled is not
> vlan aware, and ignores all vlan configuration. However, the kernel
> software bridge code allows configuration in this state.
>
> This causes the
Mike Lothian reports that after commit
964124a97b97 ("efi/x86: Remove extra headroom for setup block")
gcc 10.1.0 fails with
HOSTCC arch/x86/boot/tools/build
/usr/lib/gcc/x86_64-pc-linux-gnu/10.1.0/../../../../x86_64-pc-linux-gnu/bin/ld:
error: linker defined: multiple definition of
On Sun, Apr 26, 2020 at 08:58:53PM +0200, Paul Cercueil wrote:
> Convert the ingenic,jz4780-nand.txt doc file to ingenic,nand.yaml.
>
> Signed-off-by: Paul Cercueil
> ---
> .../bindings/mtd/ingenic,jz4780-nand.txt | 92
> .../devicetree/bindings/mtd/ingenic,nand.yaml | 133
On Mon, May 11, 2020 at 3:34 PM Brian Gerst wrote:
>
> On Mon, May 11, 2020 at 2:46 PM Nick Desaulniers
> wrote:
> >
> > On Mon, May 11, 2020 at 11:09 AM Brian Gerst wrote:
> > > This looks like the same issue that we just discussed for bitops.h.
> > > Add the "b" operand size modifier to force
On Sun, Apr 26, 2020 at 08:58:52PM +0200, Paul Cercueil wrote:
> Convert the ingenic,jz4780-nemc.txt doc file to ingenic,nemc.yaml.
>
> The ingenic,jz4725b-nemc compatible string was added in the process,
> with a fallback to ingenic,jz4740-nemc.
>
> Signed-off-by: Paul Cercueil
> ---
>
On Mon, May 11, 2020 at 11:13:00PM +0200, Ard Biesheuvel wrote:
> On Mon, 11 May 2020 at 20:36, Arvind Sankar wrote:
> >
> > On Mon, May 11, 2020 at 06:01:49PM +0100, Mike Lothian wrote:
> > > Hi
> > >
> > > This patch has been causing issues for me since switching to GCC 10.1:
> > >
> > > CALL
Hi,
On Mon, May 11, 2020 at 7:59 AM Will Deacon wrote:
>
> Hi Doug,
>
> On Tue, Apr 28, 2020 at 02:13:45PM -0700, Douglas Anderson wrote:
> > diff --git a/arch/arm64/kernel/debug-monitors.c
> > b/arch/arm64/kernel/debug-monitors.c
> > index 48222a4760c2..59c353dfc8e9 100644
> > ---
On Thu, May 07, 2020 at 10:56:07PM -0700, Jiada Wang wrote:
> From: Nick Dyer
>
> The atmel touch messages contain orientation information as a byte in a
> packed format which can be passed straight on to Android if the input
> device configuration is correct.
No, unfortunately I can not accept
On Sun, Apr 26, 2020 at 08:58:51PM +0200, Paul Cercueil wrote:
> Convert the ingenic,pinctrl.txt doc file to ingenic,pinctrl.yaml.
>
> In the process, some compatible strings now require a fallback, as the
> corresponding SoCs are pin-compatible with their fallback variant.
>
> Signed-off-by:
The mm-of-the-moment snapshot 2020-05-11-15-43 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You
My Dear in the lord
My name is Mrs. Mina A. Brunel I am a Norway Citizen who is living in
Burkina Faso, I am married to Mr. Brunel Patrice, a politician who
owns a small gold company in Burkina Faso; He died of Leprosy and
Radesyge, in the year February 2010, During his lifetime he deposited
the
Right now, we make the mistake of allowing interlacing on all
connectors. Nvidia hardware does not always support interlacing with DP
though, so we need to make sure that we don't allow interlaced modes to
be set in such situations as otherwise we'll end up accidentally hanging
the display HW.
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So,
We'll need the core channel initialized and ready by the time that we
start creating modesetting objects, so that we can call the
NV507D_GET_CAPABILITIES method to make the hardware expose it's
modesetting capabilities for later probing.
So, when loading the driver prepare the core channel from
We advertise being able to set interlaced modes, so let's actually make
sure to do that. Otherwise, we'll end up hanging the display engine due
to trying to set a mode with timings adjusted for interlacing without
telling the hardware it's actually an interlaced mode.
Signed-off-by: Lyude Paul
Currently, the nv50_mstc_mode_valid() function is happy to take any and
all modes, even the ones we can't actually support sometimes like
interlaced modes.
Luckily, the only difference between the mode validation that needs to
be performed for MST vs. SST is that eventually we'll need to check
This just limits the BPC for MST connectors to a maximum of 8 from
nv50_mstc_get_modes(), instead of doing so during
nv50_msto_atomic_check(). This doesn't introduce any functional changes
yet (other then userspace now lying about the max bpc, but we can't
support that yet anyway so meh). But,
On Sun, May 10, 2020 at 01:24:18PM -0700, Kees Cook wrote:
> pstore/ram: Move dump_oops to end of module_param list
> pstore/platform: Switch pstore_info::name to const
> pstore/platform: Move module params after declarations
> pstore/platform: Use backend name for console registration
>
On Fri, May 08 2020, David Howells wrote:
> Hi Linus, Trond, Anna,
>
> Can you pull these fixes for cachefiles and NFS's use of fscache? Should
> they go through the NFS tree or directly upstream? The things fixed are:
hi David,
thanks for these fscache fixes. Here is another for your
Remove unused event code and other cleanup for HUB RTC.
Signed-off-by: Dimitri Sivanich
---
arch/x86/platform/uv/uv_time.c | 362 +
1 file changed, 8 insertions(+), 354 deletions(-)
diff --git a/arch/x86/platform/uv/uv_time.c
On Mon, 11 May 2020 13:43:32 +0800 Xiaoliang Yang wrote:
> +int vsc9959_qos_port_cbs_set(struct dsa_switch *ds, int port,
> + struct tc_cbs_qopt_offload *cbs_qopt)
static
On Sun, 26 Apr 2020 20:58:50 +0200, Paul Cercueil wrote:
> Convert the ingenic,intc.txt doc file to ingenic,intc.yaml.
>
> Some compatible strings now require a fallback, as the controller
> generally works the same across the SoCs families.
>
> Signed-off-by: Paul Cercueil
> ---
>
On Sun, 26 Apr 2020 20:58:49 +0200, Paul Cercueil wrote:
> Convert the ingenic,cgu.txt doc file to ingenic,cgu.yaml.
>
> The binding documentation has been updated as well. The node can have a
> child node that corresponds to the USB PHY, which happens to be present
> in the middle of the CGU
Am 2020-05-11 23:44, schrieb Michael Walle:
Am 2020-05-11 23:13, schrieb Rob Herring:
On Thu, Apr 23, 2020 at 07:45:32PM +0200, Michael Walle wrote:
This patch adds core support for the board management controller
found
on the SMARC-sAL28 board. It consists of the following functions:
-
On Sun, 26 Apr 2020 11:20:32 -0500, Samuel Holland wrote:
> This arch_timer property was added in commit c950ca8c35ee
> ("clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer
> instability")
> but I omitted the device tree binding documentation. Now
> `make dtbs_check` prints the
On Sun, 26 Apr 2020 12:41:10 +0200, Clément Péron wrote:
> From: Jernej Skrabec
>
> H6 I2S is very similar to H3, except that it supports up to 16 channels
> and thus few registers have fields on different position.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Marcus Cooper
>
On Sat, 25 Apr 2020 17:40:37 +0200, Johan Jonker wrote:
> A test with the command below gives this error:
>
> arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: gpu@ff40:
> '#cooling-cells', 'power-domains'
> do not match any of the regexes: 'pinctrl-[0-9]+'
>
> With the conversion to yaml it
On Sat, 25 Apr 2020 19:08:33 +0200, Johan Jonker wrote:
> A test with the command below gives this error:
>
> arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: usb@ff30:
> 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> With the conversion to yaml it also filters things
On Sat, May 09, 2020 at 02:42:52PM -0500, Eric W. Biederman wrote:
>
> The code in prepare_binary_handler needs to be run every time
> search_binary_handler is called so move the call into search_binary_handler
> itself to make the code simpler and easier to understand.
>
> Signed-off-by: "Eric
On Thu, May 07, 2020 at 10:56:05PM -0700, Jiada Wang wrote:
> From: Nick Dyer
>
> This patch outputs status from T48 Noise Supression
>
> Signed-off-by: Nick Dyer
> Acked-by: Benson Leung
> Acked-by: Yufeng Shen
> (cherry picked from ndyer/linux/for-upstream commit
>
On Sat, 25 Apr 2020 00:11:22 +0200, Lubomir Rintel wrote:
> Add binding document for the ENE KB3930 Embedded Controller.
>
> Signed-off-by: Lubomir Rintel
>
> ---
> Changes since v1:
> - Addressed binding validation failure
>
> .../devicetree/bindings/mfd/ene-kb3930.yaml | 55
Hi Jiada, Nick,
On Thu, May 07, 2020 at 10:56:04PM -0700, Jiada Wang wrote:
> From: Nick Dyer
>
> On some firmware variants, the size of the info block exceeds what can
> be read in a single transfer.
Is this limitation of the mXT controller or maybe it is issue with
implementation of the
On Fri, Apr 24, 2020 at 10:36:09AM -0700, Ben Levinsky wrote:
> Add binding for ZynqMP R5 OpenAMP.
>
> Represent the RPU domain resources in one device node. Each RPU
> processor is a subnode of the top RPU domain node.
This needs to be sorted out as part of the system DT effort that Xilinx
is
On 05/11, Chao Yu wrote:
> On 2020/5/10 3:03, Jaegeuk Kim wrote:
> > On 05/09, Chao Yu wrote:
> >> On 2020/5/9 0:10, Jaegeuk Kim wrote:
> >>> Hi Sayali,
> >>>
> >>> In order to address the perf regression, how about this?
> >>>
> >>> >From 48418af635884803ffb35972df7958a2e6649322 Mon Sep 17
On Sat, May 09, 2020 at 02:42:23PM -0500, Eric W. Biederman wrote:
>
> Add a flag preserve_creds that binfmt_misc can set to prevent
> credentials from being updated. This allows binfmrt_misc to always
> call prepare_binfmt. Allowing the credential computation logic to be
> consolidated.
>
>
Hi all,
Commit
be904b855200 ("sfc: make capability checking a nic_type function")
is missing a Signed-off-by from its author.
--
Cheers,
Stephen Rothwell
pgp4jUme3tRDf.pgp
Description: OpenPGP digital signature
Use an enum for passing around the failure code for a failed VM-Enter
that results in VM-Exit to provide a level of indirection from the final
resting place of the failure code, vmcs.EXIT_QUALIFICATION. The exit
qualification field is an unsigned long, e.g. passing around
'u32 exit_qual' throws
On Mon, May 11, 2020 at 2:58 PM Andrew Morton wrote:
>
> On Mon, 11 May 2020 14:38:23 -0700 Shakeel Butt wrote:
>
> > On Mon, May 11, 2020 at 2:11 PM Andrew Morton
> > wrote:
> > >
> > > On Sat, 9 May 2020 07:19:46 -0700 Shakeel Butt
> > > wrote:
> > >
> > > > Currently, THP are counted as
Hi Dave
thanks for the review first of all.
On Wed, May 06, 2020 at 04:25:50PM +0100, Dave Martin wrote:
> On Mon, May 04, 2020 at 05:38:47PM +0100, Cristian Marussi wrote:
> > Add core SCMI Notifications protocol-registration support: allow protocols
> > to register their own set of supported
On Mon, 11 May 2020 12:04:09 PDT (-0700), Linus Torvalds wrote:
On Mon, May 11, 2020 at 1:13 AM Andreas Schwab wrote:
On Mai 09 2020, Linus Torvalds wrote:
> glibc depending on kernel version is WRONG. It's bogus. You can't do
> feature detection based on kernel version, it's fundamentally
The sysctl knob allows any user with SYS_ADMIN capability to
taint the kernel with any arbitrary value, but this might
produce an invalid flags bitset being committed to tainted_mask.
This patch introduces a simple way for proc_taint() to ignore
any eventual invalid bit coming from the user input
Hi Jerome,
I love your patch! Perhaps something to improve:
[auto build test WARNING on staging/staging-testing]
[also build test WARNING on next-20200511]
[cannot apply to v5.7-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also
Hi Charles,
I love your patch! Perhaps something to improve:
[auto build test WARNING on ljones-mfd/for-mfd-next]
[also build test WARNING on v5.7-rc5 next-20200511]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use
On Mon, 11 May 2020 14:38:23 -0700 Shakeel Butt wrote:
> On Mon, May 11, 2020 at 2:11 PM Andrew Morton
> wrote:
> >
> > On Sat, 9 May 2020 07:19:46 -0700 Shakeel Butt wrote:
> >
> > > Currently, THP are counted as single pages until they are split right
> > > before being swapped out.
GCC 10 appears to have changed -O2 in order to make compilation time
faster when using -flto, seemingly at the expense of performance, in
particular with regards to how the inliner works. Since -O3 these days
shouldn't have the same set of bugs as 10 years ago, this commit
defaults new kernel
On Mon, May 11, 2020 at 09:33:21AM -0500, Eric W. Biederman wrote:
> Linus Torvalds writes:
>
> > On Sat, May 9, 2020 at 9:30 PM Tetsuo Handa
> > wrote:
> >>
> >> Wouldn't this change cause
> >>
> >> if (fd_binary > 0)
> >> ksys_close(fd_binary);
> >>
On 11/05/2020 21:21, Mickaël Salaün wrote:
> Hi,
>
> This new patch series brings some improvements and add new tests:
>
> Use smaller userspace structures (attributes) to save space, and check
> at built time that every attribute don't contain hole and are 8-bits
> aligned.
8-bytes aligned,
On Mon, May 11, 2020 at 03:37:09PM -0500, Rob Herring wrote:
> On Thu, 23 Apr 2020 19:32:53 +0200, David Heidelberg wrote:
> > Convert elants_i2c.txt DT binding to YAML and put into correct directory.
> >
> > Reviewed-by: Dmitry Osipenko
> > Signed-off-by: David Heidelberg
> > ---
> >
A while back, I noticed that the crypto and crypto API usage in big_keys
were entirely broken in multiple ways, so I rewrote it. Now, I'm
rewriting it again, but this time using the simpler ChaCha20Poly1305
library function. This makes the file considerably more simple; the
diffstat alone should
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