Hello,
syzbot found the following issue on:
HEAD commit:1996cf46 net: bcmgenet: fix mask check in bcmgenet_validat..
git tree: net
console output: https://syzkaller.appspot.com/x/log.txt?x=17233f4d90
kernel config: https://syzkaller.appspot.com/x/.config?x=a0437fdd630bee11
dashboar
On Thu, Sep 03, 2020 at 09:42:32AM +0200, pet...@infradead.org wrote:
> > Maybe I need to explain the reason that why I add two trace point.
> > when using perf tool or Ftrace sysfs to capture the task wake-up latency
> > and the task leaving running queue time, usually the trace data is too
> >
在 2020/9/3 下午3:29, Max Filippov 写道:
>> diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
>> index e997e0119c02..862b008ab09e 100644
>> --- a/arch/xtensa/Kconfig
>> +++ b/arch/xtensa/Kconfig
>> @@ -42,6 +42,7 @@ config XTENSA
>> select MODULES_USE_ELF_RELA
>> select PERF_USE_
On Thu, Sep 03, 2020 at 08:37:38AM +, Xu Wang wrote:
> Because clk_disable_unprepare already checked NULL clock
> parameter, so the additional checks are unnecessary, just remove them.
>
> Signed-off-by: Xu Wang
> ---
> drivers/crypto/s5p-sss.c | 6 ++
> 1 file changed, 2 insertions(+),
Le 03/09/2020 à 09:11, Christoph Hellwig a écrit :
Except that we do not actually have such a patch. For normal user
writes we only use ->write_iter if ->write is not present. But what
shows up in the profile is that /dev/zero only has a read_iter op and
not a normal read. I've added a pat
Hi Jacob,
On 8/31/20 8:25 PM, Jacob Pan wrote:
> IOMMU generic layer already does sanity checks on UAPI data for version
> match and argsz range based on generic information.
>
> This patch adjusts the following data checking responsibilities:
> - removes the redundant version check from VT-d driv
Looks good,
Reviewed-by: Johannes Thumshirn
On 02/09/2020 10.55, Leon Romanovsky wrote:
> From: Leon Romanovsky
>
> The filename is a const pointer, so use the proper string duplication
> routine that takes into account const identifier.
This commit log makes no sense at all.
kstrdup_const is merely an optimization that can be used when
On 9/3/20 10:40 AM, Alex Shi wrote:
>
>
> 在 2020/9/3 下午4:32, Alex Shi 写道:
>>>
>> I have run thpscale with 'always' defrag setting of THP. The Amean stddev is
>> much
>> larger than a very little average run time reducing.
>>
>> But the left patch 4 could show the cmpxchg retry reduce from thous
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: aef0148f3606117352053c015cb33734e9ee7397
Gitweb:
https://git.kernel.org/tip/aef0148f3606117352053c015cb33734e9ee7397
Author:Arvind Sankar
AuthorDate:Wed, 02 Sep 2020 22:30:56 -04:00
Committe
On 9/3/20 10:37 AM, Xu Wang wrote:
> Because clk_disable_unprepare already checked NULL clock
> parameter, so the additional checks are unnecessary, just remove them.
>
> Signed-off-by: Xu Wang
> ---
> drivers/crypto/s5p-sss.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
>
Em Wed, 2 Sep 2020 21:15:31 +0300
Andy Shevchenko escreveu:
> On Wed, Sep 2, 2020 at 8:02 PM Colin King wrote:
> >
> > From: Colin Ian King
> >
> > In the case where the call to lm3554_platform_data_func returns an
> > error there is a memory leak on the error return path of object
> > flash.
Hi Jacob,
On 8/31/20 8:24 PM, Jacob Pan wrote:
> IOMMU user APIs are responsible for processing user data. This patch
> changes the interface such that user pointers can be passed into IOMMU
> code directly. Separate kernel APIs without user pointers are introduced
> for in-kernel users of the UAP
Hi James,
On Tue, Sep 01, 2020 at 04:52:54PM +0100, James Clark wrote:
> Hi Leo,
>
> >
> > +static int process_attr(struct perf_tool *tool __maybe_unused,
> > + union perf_event *event,
> > + struct evlist **pevlist)
> > +{
> > + int err;
> > +
> > + err
There are multiple gic_data symbol between irq_gic.c and irq_gic_v3.c,
we can see the same symbol name:
cat /proc/kallsyms | grep gic_data
-->
80001138f1d0 d gic_data
80001138f940 d gic_data
Normally CONFIG_ARM_GIC and CONFIG_ARM_GIC_V3 are all enabled, move
th
Use PTR_ERR_OR_ZERO to make the code a little bit simpler.
This code was detected with the help of Coccinelle.
Signed-off-by: Wei Xu
---
drivers/pci/controller/dwc/pci-exynos.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-exynos.c
b/driv
On Thu, 3 Sep 2020 at 09:19, Jie Deng wrote:
>
>
> On 2020/9/3 14:12, Jason Wang wrote:
> >
> > On 2020/9/3 下午1:34, Jie Deng wrote:
> >> Add an I2C bus driver for virtio para-virtualization.
> >>
> >> The controller can be emulated by the backend driver in
> >> any device model software by followi
On Thu, Sep 03, 2020 at 02:28:37PM +0800, kernel test robot wrote:
> Greeting,
>
> FYI, we noticed the following commit (built with gcc-9):
>
> commit: c0aaf9b7a114f6b75e0da97be7d99c102347a751 ("btrfs: switch to
> iomap_dio_rw() for dio")
> https://git.kernel.org/cgit/linux/kernel/git/next/linux
On Tue, Sep 01, 2020 at 05:36:50PM +0100, James Clark wrote:
> On 06/08/2020 04:07, Leo Yan wrote:
> > This patch set is to support AUX trace and Arm SPE as the first enabled
> > hardware tracing for Perf memory tool.
> >
>
> Hi Leo,
>
> I've tested this patchset with "./perf mem record -e spe-s
在 2020/9/3 下午4:19, David Hildenbrand 写道:
> On 03.09.20 09:01, Alex Shi wrote:
>> pageblock_flags is used as long, since every pageblock_flags is just 4
>> bits, 'long' size will include 8(32bit machine) or 16 pageblocks' flags,
>> that flag setting has to sync in cmpxchg with 7 or 15 other pageb
Modify generic linker script macros to generate section/symbol names for
percpu area using overridable macros. No functional changes.
This will allow arm64 linker script to define a second KVM-specific percpu
data section using the generic PERCPU_SECTION macro.
Signed-off-by: David Brazdil
---
Previous series introduced custom build rules for nVHE hyp code, using
objcopy to prefix ELF section and symbol names to separate nVHE code
into its own "namespace". This approach was limited by the expressiveness
of objcopy's command line interface, eg. missing support for wildcards.
Improve the
this_cpu_ptr is meant for use in kernel proper because it selects between
TPIDR_EL1/2 based on nVHE/VHE. __hyp_this_cpu_ptr was used in hyp to always
select TPIDR_EL2. Unify all users behind this_cpu_ptr and friends by
selecting _EL2 register under __KVM_NVHE_HYPERVISOR__.
Under CONFIG_DEBUG_PREEM
Introduce '.hyp.data..percpu' as part of ongoing effort to make nVHE
hyp code self-contained and independent of the rest of the kernel.
The series builds on top of the "Split off nVHE hyp code" series which
used objcopy to rename '.text' to '.hyp.text' and prefix all ELF
symbols with '__kvm_nvhe'
Add hyp percpu section to linker script and rename the corresponding ELF
sections of hyp/nvhe object files. This moves all nVHE-specific percpu
variables to the new hyp percpu section.
Allocate sufficient amount of memory for all percpu hyp regions at global KVM
init time and create corresponding
In preparation for unmapping hyp pages from host stage-2, allocate/free hyp
stack using new helpers which automatically mark the pages reserved.
Signed-off-by: David Brazdil
---
arch/arm64/kvm/arm.c | 49 ++--
1 file changed, 47 insertions(+), 2 deletions(
Host CPU context is stored in a global per-cpu variable `kvm_host_data`.
In preparation for introducing independent per-CPU region for nVHE hyp,
create two separate instances of `kvm_host_data`, one for VHE and one
for nVHE.
Signed-off-by: David Brazdil
---
arch/arm64/include/asm/kvm_host.h | 2
Defining a per-CPU variable in hyp/nvhe will result in its name being
prefixed with __kvm_nvhe_. Add helpers for declaring these variables
in kernel proper and accessing them with this_cpu_ptr and per_cpu_ptr.
Signed-off-by: David Brazdil
---
arch/arm64/include/asm/kvm_asm.h | 25 +++
The hyp_adr/ldr_this_cpu helpers were introduced for use in hyp code
because they always needed to use TPIDR_EL2 for base, while
adr/ldr_this_cpu from kernel proper would select between TPIDR_EL2 and
_EL1 based on VHE/nVHE.
Simplify this now that the nVHE hyp mode case can be handled using the
__K
With all nVHE per-CPU variables being part of the hyp per-CPU region,
mapping them individual is not necessary any longer. They are mapped to hyp
as part of the overall per-CPU region.
Signed-off-by: David Brazdil
---
arch/arm64/include/asm/kvm_mmu.h | 25 +++--
arch/arm64/kv
Hyp keeps track of which cores require SSBD callback by accessing a
kernel-proper global variable. Create an nVHE symbol of the same name
and copy the value from kernel proper to nVHE at KVM init time.
Done in preparation for separating percpu memory owned by kernel
proper and nVHE.
Signed-off-by
On Wed, Sep 02, 2020 at 11:47:56PM -0400, Samuel Dionne-Riel wrote:
> On Wed, 2 Sep 2020 17:01:19 +0100
> Lorenzo Pieralisi wrote:
>
> > On Tue, Sep 01, 2020 at 02:33:56PM -0400, Samuel Dionne-Riel wrote:
> >
> > Please print a pointer as a pointer and print both bus and
> > bus->parent.
>
> Ho
On Wed, Sep 02, 2020 at 12:06:21PM +0200, Pavel Machek wrote:
> Hi!
>
> > This is the start of the stable review cycle for the 4.19.143 release.
> > There are 125 patches in this series, all will be posted as a response
> > to this one. If anyone has any issues with these being applied, please
>
Hi,
I've recently had a discussion about the correct way for an SPI driver
to handle the num-cs property: https://lkml.org/lkml/2020/8/25/184
Since 8cdcd8aeee281 ("spi: imx/fsl-lpspi: Convert to GPIO
descriptors"), the logic of the spi-imx driver is somewhat confusing:
If fewer than 3 cs-gpios ar
Thanks Stephen, for your time for review!!!
On 9/1/2020 1:02 PM, Stephen Boyd wrote:
Quoting Srinivasa Rao Mandadapu (2020-08-30 23:39:23)
diff --git a/sound/soc/qcom/lpass-sc7180.c b/sound/soc/qcom/lpass-sc7180.c
index 167bf2c..cea7ae7 100644
--- a/sound/soc/qcom/lpass-sc7180.c
+++ b/sound/soc
On Wed, Aug 26, 2020 at 02:06:28PM -0700, Guenter Roeck wrote:
> Hi,
>
> On Wed, Oct 16, 2019 at 02:51:17PM -0700, Greg Kroah-Hartman wrote:
> > From: Paul Burton
> >
> > commit 2f2b4fd674cadd8c6b40eb629e140a14db4068fd upstream.
> >
> > GCC 9.x automatically enables support for Loongson MMI ins
On Tue, Sep 01, 2020 at 04:19:59PM -0600, Shuah Khan wrote:
> On 9/1/20 9:07 AM, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.8.6 release.
> > There are 255 patches in this series, all will be posted as a response
> > to this one. If anyone has any issues wi
On Wed, Sep 02, 2020 at 09:51:51AM -0700, Guenter Roeck wrote:
> On Wed, Sep 02, 2020 at 09:49:11AM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.8.6 release.
> > There are 253 patches in this series, all will be posted as a response
> > to this one. I
On Wed, Sep 02, 2020 at 09:58:45PM +0530, Naresh Kamboju wrote:
> On Wed, 2 Sep 2020 at 13:18, Greg Kroah-Hartman
> wrote:
> >
> > This is the start of the stable review cycle for the 5.8.6 release.
> > There are 253 patches in this series, all will be posted as a response
> > to this one. If any
Thanks Stephen for your time for review!!!
On 9/1/2020 1:06 PM, Stephen Boyd wrote:
Quoting Srinivasa Rao Mandadapu (2020-08-30 23:39:22)
diff --git a/sound/soc/qcom/lpass-hdmi.c b/sound/soc/qcom/lpass-hdmi.c
new file mode 100644
index 000..7e18113
--- /dev/null
+++ b/sound/soc/qcom/lpass-h
On Thu, Sep 03, 2020 at 09:59:17AM +0200, Bartosz Golaszewski wrote:
> On Mon, Aug 31, 2020 at 5:23 AM Kent Gibson wrote:
> >
> > Add support for the GPIO_V2_LINE_SET_VALUES_IOCTL.
> >
> > Signed-off-by: Kent Gibson
> > ---
> > drivers/gpio/gpiolib-cdev.c | 59 +++
I am Cynthia Matanga,
My Father was Top Politician Before he died in auto Motor Accident
Last years 2019,
Before his death he told me that he deposited $4.500.000.00, in one of
The Bank Here,
Please i Will Need your Assistance for investing the money in hotel
Business or estate management in your
On Tue, Sep 01, 2020 at 04:39:22PM +0200, Vitaly Kuznetsov wrote:
> Sean Christopherson writes:
>
> > On Fri, Aug 07, 2020 at 04:12:31PM +0200, Vitaly Kuznetsov wrote:
> >> PCIe config space can (depending on the configuration) be quite big but
> >> usually is sparsely populated. Guest may scan i
From: "Gautham R. Shenoy"
commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for
CEDE(0)") sets the exit latency of CEDE(0) based on the latency values
of the Extended CEDE states advertised by the platform. The values
advertised by the platform are in timebase ticks. However the cpuidle
On Wed, Sep 02, 2020 at 07:34:26PM -0500, Gustavo A. R. Silva wrote:
> Hi Alex,
>
> On 9/2/20 11:24, Alex Dewar wrote:
> > In ucma_process_join(), if the call to xa_alloc() fails, the function
> > will return without freeing mc. Fix this by jumping to the correct line.
> >
> > In the process I re
When using 128-bit interrupt-remapping table entry (IRTE) (a.k.a GA mode),
current driver disables interrupt remapping when it updates the IRTE
so that the upper and lower 64-bit values can be updated safely.
However, this creates a small window, where the interrupt could
arrive and result in IO_P
Interrupt remapping IO_PAGE_FAULT has been observed under system w/
large number of VMs w/ pass-through devices. This can be reproduced with
64 VMs + 64 pass-through VFs of Mellanox MT28800 Family [ConnectX-5 Ex],
where each VM runs small-packet netperf test via the pass-through device
to the netse
Currently, the RemapEn (valid) bit is accidentally cleared when
programming IRTE w/ guestMode=0. It should be restored to
the prior state.
Reviewed-by: Joao Martins
Signed-off-by: Suravee Suthikulpanit
Fixes: b9fc6b56f478 ("iommu/amd: Implements irq_set_vcpu_affinity() hook to
setup vapic mode
On Thu, Sep 03, 2020 at 04:32:54PM +0800, Alex Shi wrote:
>
>
> ??? 2020/9/3 ??3:24, Mel Gorman ??:
> > On Thu, Sep 03, 2020 at 03:01:20PM +0800, Alex Shi wrote:
> >> pageblock_flags is used as long, since every pageblock_flags is just 4
> >> bits, 'long' size will include 8(32bit machine
This adds support for the iTE IT6505.
This device can convert DPI signal to DP output.
From: Allen Chen
Signed-off-by: Jitao Shi
Signed-off-by: Pi-Hsun Shih
Signed-off-by: Yilun Lin
Signed-off-by: Hermes Wu
Signed-off-by: Allen Chen
---
drivers/gpu/drm/bridge/Kconfig |7 +
drivers
On 02/09/2020 17:48, Dave Martin wrote:
> On Fri, Aug 28, 2020 at 02:16:02PM +0100, Boyan Karatotev wrote:
>> Pointer Authentication (PAuth) is a security feature introduced in ARMv8.3.
>> It introduces instructions to sign addresses and later check for potential
>> corruption using a second modifi
On 9/3/20 1:48 AM, syzbot wrote:
> Hello,
>
> syzbot found the following issue on:
>
> HEAD commit:1996cf46 net: bcmgenet: fix mask check in bcmgenet_validat..
> git tree: net
> console output: https://syzkaller.appspot.com/x/log.txt?x=17233f4d90
> kernel config: https://syzkall
On Thu 2020-09-03 06:55:47, Stephen Rothwell wrote:
> Hi Petr,
>
> On Wed, 2 Sep 2020 09:26:11 +0200 Petr Mladek wrote:
> >
> > The problem is that this commit is not in mainline. It is living
> > only in printk/linux.git.
> >
> > Could we use the SHA1 from the maintainer tree when it would not
This adds support for the iTE IT6505.
This device can convert DPI signal to DP output.
From: Allen Chen
Signed-off-by: Jitao Shi
Signed-off-by: Pi-Hsun Shih
Signed-off-by: Yilun Lin
Signed-off-by: Hermes Wu
Signed-off-by: Allen Chen
---
drivers/gpu/drm/bridge/Kconfig |7 +
drivers/
The following commit has been merged into the locking/urgent branch of tip:
Commit-ID: 23870f1227680d2aacff6f79c3abbd04e86e
Gitweb:
https://git.kernel.org/tip/23870f1227680d2aacff6f79c3abbd04e86e
Author:pet...@infradead.org
AuthorDate:Wed, 02 Sep 2020 18:03:23 +02:
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 4819e15f740ec884a50bdc431d7f1e7638b6f7d9
Gitweb:
https://git.kernel.org/tip/4819e15f740ec884a50bdc431d7f1e7638b6f7d9
Author:Joerg Roedel
AuthorDate:Wed, 02 Sep 2020 17:59:04 +02:00
Committer
Since all the other call-sites of cros_ec_cmd_xfer() have been converted
to use cros_ec_cmd_xfer_status() instead, update the remaining
call-sites to prepare for the merge of cros_ec_cmd_xfer() into
cros_ec_cmd_xfer_status().
As part of this update, change the error handling inside
cros_ec_get_sen
Since cros_ec_cmd_xfer_status() now returns Linux error codes and all
other files use that command, remove the now-unused function
cros_ec_cmd_xfer().
Signed-off-by: Prashant Malani
---
drivers/platform/chrome/cros_ec_proto.c | 44 +++--
1 file changed, 11 insertions(+), 33 d
On Tue, Aug 25, 2020 at 4:19 PM Lad Prabhakar
wrote:
> Document RZ/G1H (R8A7742) SoC bindings.
>
> No driver change is needed due to the fallback compatible value
> "renesas,ipmmu-vmsa".
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,ee
On 2020-09-03 10:08, Zou Cao wrote:
There are multiple gic_data symbol between irq_gic.c and irq_gic_v3.c,
we can see the same symbol name:
cat /proc/kallsyms | grep gic_data
-->
80001138f1d0 d gic_data
80001138f940 d gic_data
Normally CONFIG_ARM_GIC and CONF
Hi,
On 2020-08-18 21:07, Sai Prakash Ranjan wrote:
Hi Doug,
I guess to start, it wasn't obvious (to me) that there were two
choices and we were picking one. Mentioning that the other
alternative was way-based allocation would help a lot. Even if you
can't fully explain the differences betwe
On Thu, Sep 03, 2020 at 01:34:45PM +0800, Jie Deng wrote:
> Add an I2C bus driver for virtio para-virtualization.
>
> The controller can be emulated by the backend driver in
> any device model software by following the virtio protocol.
>
> This driver communicates with the backend driver through
On Tue, Aug 25, 2020 at 4:19 PM Lad Prabhakar
wrote:
> Add the five IPMMU instances found in the r8a7742 to DT with a disabled
> status.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr{oetje,eeting}s
In rpoc_handle_vdev(), rvdev is not freed properly on the error path and
one of the labels is misnamed. Fix this up.
Fixes: 086d08725d34 ("remoteproc: create vdev subdevice with specific dma
memory pool")
Signed-off-by: Alex Dewar
---
drivers/remoteproc/remoteproc_core.c | 10 ++
1 file
On Tue 2020-09-01 12:24:51, Josh Poimboeuf wrote:
> On Thu, Aug 06, 2020 at 11:24:26AM +0200, Petr Mladek wrote:
> > On Tue 2020-07-21 13:17:00, Miroslav Benes wrote:
> > > On Fri, 17 Jul 2020, Josh Poimboeuf wrote:
> > >
> > > > Use of the new -flive-patching flag was introduced with the followin
Add a USB_QUIRK_IGNORE_REMOTE_WAKEUP quirk for the BYD zhaoxin notebook.
This notebook come with usb touchpad. And we would like to disable touchpad
wakeup on this notebook by default.
Signed-off-by: Penghao
---
drivers/usb/core/quirks.c | 4
1 file changed, 4 insertions(+)
diff --git a/dr
thank for you reply.
of course it won't, i just think it is better to splite the global
data between irq-gic and irq-gic-v3.
I wrote some hook module for gic, kallsyms_lookup_name can't support
for mutlipte symbol,
i need to call kallsyms scan to get the addr.
If you think it
On Thu, Sep 03, 2020 at 11:01:42AM +0100, Alex Dewar wrote:
> In rpoc_handle_vdev(), rvdev is not freed properly on the error path and
> one of the labels is misnamed. Fix this up.
Actually, don't apply this. I didn't realise that device_unregister
already frees memory. Sorry for the noise!
>
>
Hi Elaine,
On 2020/9/3 下午2:31, Elaine Zhang wrote:
clk_hw_register_composite it's already exported.
Preparation for compilation of rK common clock drivers into modules.
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk-half-divider.c | 18
drivers/clk/rockchip/clk.c
On 2020/9/3 下午2:31, Elaine Zhang wrote:
This is used by the Rockchip clk driver, export it to allow that
driver to be compiled as a module.
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk.c | 52 ++
1 file changed, 30 insertions(+), 22 deletions
On 2020/9/3 下午2:32, Elaine Zhang wrote:
use CONFIG_COMMON_CLK_ROCKCHIP for Rk common clk drivers.
use CONFIG_CLK_RKXX for Rk soc clk driver.
Mark configuration to "tristate",
to support building Rk SoCs clock driver as module.
Signed-off-by: Elaine Zhang
---
drivers/clk/Kconfig |
On 2020/9/3 下午2:32, Elaine Zhang wrote:
support CLK_OF_DECLARE and builtin_platform_driver_probe
double clk init method.
add module author, description and license to support building
Soc Rk3399 clock driver as module.
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk-rk3399.c | 55 +
On 2020/9/3 下午2:31, Elaine Zhang wrote:
This is used by the Rockchip clk driver, export it to allow that
driver to be compiled as a module..
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk-ddr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/rockchip/clk-ddr.c b/d
On 2020/9/3 下午2:31, Elaine Zhang wrote:
This is used by the Rockchip clk driver, export it to allow that
driver to be compiled as a module..
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/softrst.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/clk
On 02/09/2020 17:49, Dave Martin wrote:
> On Fri, Aug 28, 2020 at 02:16:03PM +0100, Boyan Karatotev wrote:
>> PAuth signs and verifies return addresses on the stack. It does so by
>> inserting a Pointer Authentication code (PAC) into some of the unused top
>> bits of an address. This is achieved by
On 2020-09-03 11:05, zc wrote:
thank for you reply.
of course it won't, i just think it is better to splite the
global data between irq-gic and irq-gic-v3.
I wrote some hook module for gic, kallsyms_lookup_name can't support
for mutlipte symbol,
i need to call kallsyms scan to get the
Hi Rich!
On 9/3/20 7:48 AM, Rich Felker wrote:
> Addition of SECCOMP_FILTER exposed a longstanding bug in
> do_syscall_trace_enter, whereby r0 (the 5th argument register) was
> mistakenly used where r3 (syscall_nr) was intended. By overwriting r0
> rather than r3 with -1 when attempting to block a
From: Fugang Duan
The pad QSPI1B_SCLK mux mode 0x1 is for function UART3_DTE_TX,
correct the mux mode.
Fixes: 743636f25f1d ("ARM: dts: imx: add pin function header for imx6sx")
Signed-off-by: Fugang Duan
---
arch/arm/boot/dts/imx6sx-pinfunc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
On Wed, 2020-09-02 at 15:19 +0200, Christophe Leroy wrote:
> Isn't it the default expected behaviour for a watchdog ?
It depends on hardware and system requirements. You may have not just one
watchdog device.
> "stop watchdog on restart" is there to keep things under control during
> a wanted
Change H2+/H3 clocks to 8 steps from 528 MHz up to 1200 MHz to support a
more fine-grained powersave setup. The SoCs are made for 1296 MHz, so
these clocks are still in a safe range. Tested on a NanoPi Duo and
OrangePi Zero.
Signed-off-by: Wilken Gottwalt
---
arch/arm/boot/dts/sun8i-h3.dtsi | 34
Hi Prabhakar,
On Tue, Aug 25, 2020 at 6:28 PM Lad Prabhakar
wrote:
> Enable PCIe Controller and set PCIe bus clock frequency.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
One thing to double-check b
On Wed, 2020-09-02 at 06:36 -0700, Guenter Roeck wrote:
> On 9/2/20 6:02 AM, Ivan Mikhaylov wrote:
> > Hello everyone. Currently, the watchdog interface only has "stop watchdog on
> > restart" but lacks a "start watchdog on restart" one. Is there a way to
> > achieve
> > such functionality?
> >
>
On 02/09/2020 18:00, Dave Martin wrote:
> On Fri, Aug 28, 2020 at 02:16:05PM +0100, Boyan Karatotev wrote:
>> Kernel documentation states that it will change PAuth keys on exec() calls.
>>
>> Verify that all keys are correctly switched to new ones.
>>
>> Cc: Shuah Khan
>> Cc: Catalin Marinas
>> C
On Thu, Sep 03, 2020 at 01:34:45PM +0800, Jie Deng wrote:
> Add an I2C bus driver for virtio para-virtualization.
>
> The controller can be emulated by the backend driver in
> any device model software by following the virtio protocol.
>
> This driver communicates with the backend driver through
Hi Roman,
Sorry that I am a software guy and can only speak for software. In general
there are various approaches to support graphics virtualization. GVT-g as a
pure software approach, does not rely on any hardware I/O virtualization
features, meanwhile, hypervisors need specific implementation
On 31-08-20, 21:43, Bard Liao wrote:
> The existing code allocates memory for the total number of ports.
> This only works if the ports are contiguous, but will break if e.g. a
> Devices uses port0, 1, and 14. The port_ready[] array would contain 3
> elements, which would lead to an out-of-bounds a
Hi,
On 9/3/20 12:03 PM, Penghao wrote:
Add a USB_QUIRK_IGNORE_REMOTE_WAKEUP quirk for the BYD zhaoxin notebook.
This notebook come with usb touchpad. And we would like to disable touchpad
wakeup on this notebook by default.
2 questions:
1. Why do you want to enable remote wakeup by default ?
Hi Jason,
We ever supported both XenGT and KVMGT for data center usages. Right now KVMGT
is still used in client side for GPU sharing. That's why we are supporting
KVMGT. Thanks!
Regards,
-Zhiyuan
-Original Message-
From: Jason Long
Date: Wednesday, September 2, 2020 at 9:38 PM
To: M
Hi Ben,
Noticed some issues while going through the code. A couple of queries
below.
Ben Levinsky writes:
> This patch adds APIs to access to configure RPU and its
> processor-specific memory.
>
> That is query the run-time mode of RPU as either split or lockstep as well
> as API to set this mo
On Thu, Sep 03, 2020 at 10:56:38AM +0200, Rasmus Villemoes wrote:
> On 02/09/2020 10.55, Leon Romanovsky wrote:
> > From: Leon Romanovsky
> >
> > The filename is a const pointer, so use the proper string duplication
> > routine that takes into account const identifier.
>
> This commit log makes no
On 2/09/20 8:03 pm, Alexey Budankov wrote:
>
> On 02.09.2020 13:57, Adrian Hunter wrote:
>> Enable the --control option to accept file names as an alternative to
>> file descriptors.
>>
>> Example:
>>
>> $ mkfifo perf.control
>> $ mkfifo perf.ack
>> $ cat perf.ack &
>> [1] 6808
>> $ perf reco
Hi Andy,
>-Original Message-
>From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com]
>Sent: 01 September 2020 09:26
>To: Shiju Jose
>Cc: linux-a...@vger.kernel.org; linux-...@vger.kernel.org; linux-
>ker...@vger.kernel.org; r...@rjwysocki.net; helg...@kernel.org;
>b...@alien8.de
Haiwei Li writes:
> From: Haiwei Li
>
> check the allocation of per-cpu __pv_cpu_mask. Initialize ops only when
> successful.
>
> Signed-off-by: Haiwei Li
> ---
> arch/x86/kernel/kvm.c | 24
> 1 file changed, 20 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86
On Thu, Sep 3, 2020 at 10:37 AM AceLan Kao wrote:
>
> Hi Andy,
>
> I spent some time studying/reading what you wrote, but I still don't
> understand how to leverage meta-acpi.
meta-acpi is a Yocto layer to support provided ACPI tables for the
build. My point here is to have it as a collection of
On 01-09-20, 23:02, Bard Liao wrote:
> sdw stream operation APIs can be called once per stream. dailink
> callbacks are good places to call these APIs.
Again, please mention here if this is to be merged thru sdw tree or ASoC
tree
>
> Pierre-Louis Bossart (7):
> ASoC: soc-dai: clarify return va
On Mon, Aug 31, 2020 at 11:42 AM Alain Volmat wrote:
>
> This serie enables cpufreq for the STi stih418 SoC.
Please cc the maintainers directly for patches. I almost missed these,
just found during
random screening of the list.
Applied all.
--
viresh
Ben Levinsky writes:
> R5 is included in Xilinx Zynq UltraScale MPSoC so by adding this
> remotproc driver, we can boot the R5 sub-system in different 2
> configurations: split or lock-step.
>
> The Xilinx R5 Remoteproc Driver boots the R5's via calls to the Xilinx
> Platform Management Unit that
On 2/09/20 8:03 pm, Alexey Budankov wrote:
>
> On 01.09.2020 12:37, Adrian Hunter wrote:
>> Add 'snapshot' control command to create an AUX area tracing snapshot the
>> same as if sending SIGUSR2. The advantage of the FIFO is that access is
>> governed by access to the FIFO.
>>
>> Example:
>>
>>
On Thu, Sep 03, 2020 at 06:42:59PM +1000, Stephen Rothwell wrote:
> Hi all,
>
> In commit
>
> f8a005e1632c ("MIPS: add missing MSACSR and upper MSA initialization")
>
> Fixes tag
>
> Fixes: cc97ab235f ("MIPS: Simplify FP context initialization")
>
> has these problem(s):
>
> - SHA1 shou
On 01-09-20, 23:05, Bard Liao wrote:
> This series enables multi-link support for Intel platforms.
Applied all, thanks
>
> Changes in v2:
> - Remove the "soundwire: intel: Only call sdw stream APIs for the first
> cpu_dai" patch form this series. We will move the sounwdire stream
> operation
201 - 300 of 1304 matches
Mail list logo
