[PATCH 5/5] arm64: allwinner: a64: add SRAM controller device tree node

to acquire its EMAC clock regmap. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23 +++ 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/bo

[PATCH 3/5] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device

i <w...@csie.org> [Icenowy: change to use regmaps with single register, change commit message] Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 48 ++- 1 file changed, 46 insertions(+), 2 deletions(-) diff --git

[PATCH 2/5] net: stmmac: dwmac-sun8i: Use regmap_field for syscon register access

de reg_field based on regmap type, change commit message] Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 41 --- 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-

[PATCH 0/5] Add support in dwmac-sun8i for accessing EMAC clock

-sun8i: Use regmap_field for syscon register access net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device Icenowy Zheng (3): dt-bindings: allow dwmac-sun8i to use other devices' exported regmap drivers: soc: sunxi: export a regmap for EMAC clock reg on A64 arm64: allwinner: a64: add

[PATCH 1/5] dt-bindings: allow dwmac-sun8i to use other devices' exported regmap

. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt

Re: [PATCH 3/5] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device

于 2018年4月12日 GMT+08:00 下午10:56:28, Maxime Ripard <maxime.rip...@bootlin.com> 写到: >On Wed, Apr 11, 2018 at 10:16:39PM +0800, Icenowy Zheng wrote: >> From: Chen-Yu Tsai <w...@csie.org> >> >> On the Allwinner R40 SoC, the "GMAC clock" register is

[PATCH v3] ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry

Banana Pi M2 Berry has an on-board USB Hub that provides 4 USB Type-A ports, and it's connected to the USB1 port of the SoC. Enable it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v3: - Dropped OHCI node and added hub model comment in EHCI. arch/arm/boot/dts/sun

Re: [linux-sunxi] Re: [PATCH 3/5] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device

PM, Maxime Ripard >>> <maxime.rip...@bootlin.com> wrote: >>> > On Thu, Apr 12, 2018 at 11:23:30PM +0800, Chen-Yu Tsai wrote: >>> >> On Thu, Apr 12, 2018 at 11:11 PM, Icenowy Zheng <icen...@aosc.io> >wrote: >>> >> > 于 2018年4月12日 GMT+08:00 下午10:5

Re: [linux-sunxi] Re: [PATCH 3/5] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device

于 2018年4月16日 GMT+08:00 下午10:31:30, Maxime Ripard <maxime.rip...@bootlin.com> 写到: >On Thu, Apr 12, 2018 at 11:23:30PM +0800, Chen-Yu Tsai wrote: >> On Thu, Apr 12, 2018 at 11:11 PM, Icenowy Zheng <icen...@aosc.io> >wrote: >> > 于 2018年4月12日 GMT+08:00 下午10:

Re: [linux-sunxi] Re: [PATCH v2 14/16] arm: dts: sun8i: h3: enable H3 sid controller

于 2018年4月19日 GMT+08:00 下午11:11:22, Kyle Evans 写到: >On Mon, Jan 29, 2018 at 6:03 AM, Philipp Rossak >wrote: >> >> >> On 29.01.2018 10:52, Maxime Ripard wrote: >>> >>> On Mon, Jan 29, 2018 at 12:29:17AM +0100, Philipp Rossak wrote: This patch

Re: [PATCH v3 2/3] regulator: add support for SY8106A regulator

于 2018年4月25日 GMT+08:00 上午1:07:33, Mark Brown <broo...@kernel.org> 写到: >On Mon, Apr 23, 2018 at 10:46:56PM +0800, Icenowy Zheng wrote: > >> --- /dev/null >> +++ b/drivers/regulator/sy8106a-regulator.c >> @@ -0,0 +1,176 @@ >> +// SPDX-License-Identifier: GPL-2.

Re: [PATCH v3 2/3] regulator: add support for SY8106A regulator

于 2018年4月25日 GMT+08:00 下午6:53:09, Mark Brown <broo...@kernel.org> 写到: >On Wed, Apr 25, 2018 at 07:41:35AM +0800, Icenowy Zheng wrote: >> 于 2018年4月25日 GMT+08:00 上午1:07:33, Mark Brown <broo...@kernel.org> 写到: >> >On Mon, Apr 23, 2018 at 10:46:56PM +0800, Icenowy Zhen

Re: [PATCH] arm64: allwinner: h6: restore the usage of CCU slice macros

在 2018-04-03二的 21:40 +0800，Icenowy Zheng写道： > As the definition of CCU slice macros are already merged into the > source > tree, restore the usage of the macros now. Maxime, could you check this patch and pick it? Thanks! > > Signed-off-by: Icenowy Zheng <icen...@aosc.io>

Re: [PATCH v3 3/3] ARM: dts: sun8i: h3: Add SY8106A regulator to Orange Pi PC

于 2018年4月23日 GMT+08:00 下午11:03:09, Maxime Ripard <maxime.rip...@bootlin.com> 写到: >On Mon, Apr 23, 2018 at 10:46:57PM +0800, Icenowy Zheng wrote: >> From: Ondrej Jirman <meg...@megous.com> >> >> Add SY8106A regulator to r_i2c bus and enable the r_i2c bus on &g

[PATCH v3 3/3] ARM: dts: sun8i: h3: Add SY8106A regulator to Orange Pi PC

atch, slight changes and change commit message] Signed-off-by: Icenowy Zheng <icen...@aosc.io> Reviewed-by: Chen-Yu Tsai <w...@csie.org> [w...@csie.org: Rename regulator label] Signed-off-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v3: - Renamed regulator label (by Chen-Yu

[PATCH v3 1/3] dt-bindings: add binding for the SY8106A voltage regulator

From: Ondrej Jirman <meg...@megous.com> SY8106A is an I2C-controlled adjustable voltage regulator made by Silergy Corp. Add its device tree binding. Signed-off-by: Ondrej Jirman <meg...@megous.com> [Icenowy: Change commit message and slight fixes] Signed-off-by: Icenowy Zheng <

[PATCH v3 0/3] SY8106 regulator support and enable it on Orange Pi PC

This patchset adds dt-bindings and driver for Silergy SY8106A, and then utilize it on the Orange Pi PC board, which uses SY8016A as its CPUX (main ARM CPU cluster in an Allwinner SoC) power supply. The driver's functionality is restricted now, mainly {en,dis}able function is not yet implemented,

[PATCH v3 2/3] regulator: add support for SY8106A regulator

nowy: Change commit message, remove enable/disable code, add default ramp_delay, add comment for go bit, add code for fixed mode voltage] Signed-off-by: Icenowy Zheng <icen...@aosc.io> Reviewed-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v3: - Return the fixed voltage defined in device

Re: [PATCH 1/5] dt-bindings: allow dwmac-sun8i to use other devices' exported regmap

于 2018年4月17日 GMT+08:00 上午2:47:45, Rob Herring <r...@kernel.org> 写到: >On Wed, Apr 11, 2018 at 10:16:37PM +0800, Icenowy Zheng wrote: >> On some Allwinner SoCs the EMAC clock register needed by dwmac-sun8i >is >> in another device's memory space. In this situation dwmac-su

[PATCH] arm64: allwinner: h6: restore the usage of CCU slice macros

As the definition of CCU slice macros are already merged into the source tree, restore the usage of the macros now. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 +++- 1 file changed, 11 insertions(+), 9 deletions(-)

Re: [linux-sunxi] Re: [PATCH 2/7] dt-bindings: add binding for the Allwinner A64 DE2 bus

于 2018年3月27日 GMT+08:00 上午6:22:58, Rob Herring <r...@kernel.org> 写到: >On Thu, Mar 22, 2018 at 02:08:43PM +0800, Icenowy Zheng wrote: >> >> >> 于 2018年3月22日 GMT+08:00 上午1:13:42, "Jernej Škrabec" ><jernej.skra...@siol.net> 写到: >> >Hi all

[PATCH v4 0/9] Initial Allwinner H6 support

controller is broken), and the second one with USB 3.0 (the first one is A80). This patchset adds the most basical support for it, including the main pin controller, the main CCU and the basical device tree. Icenowy Zheng (9): pinctrl: sunxi: refactor irq related register function to have desc

[PATCH v4 3/9] pinctrl: sunxi: change irq_bank_base to irq_bank_map

The Allwinner H6 SoC have its pin controllers with the first IRQ-capable GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. Change the current code that uses IRQ bank base to a IRQ bank map, in order to support the case that holes exist among IRQ banks. Signed-off-by: Icenowy Zheng <i

[PATCH v4 2/9] pinctrl: sunxi: introduce IRQ bank conversion function

ode in IRQ register access. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Extracted in v4. drivers/pinctrl/sunxi/pinctrl-sunxi.h | 23 --- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi

[PATCH v4 6/9] dt-bindings: add device tree binding for Allwinner H6 main CCU

The Allwinner H6 main CCU uses the internal oscillator of the SoC, which is different with old SoCs' main CCU. Add device tree binding for the Allwinner H6 main CCU. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Extracted in v4. Documentation/devicetree/bindings/clock/sunxi-ccu.t

[PATCH v4 1/9] pinctrl: sunxi: refactor irq related register function to have desc

As the new H6 SoC has holes in the IRQ registers, refactor the IRQ related register function for getting the full pinctrl desc structure. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v4: - Adjusted parameter sequence. Patch introduced in v3. drivers/pinctrl/sunxi/p

[PATCH 7/7] arm64: allwinner: a64: add HDMI regulator to all DTs' simplefb_hdmi

device node. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 4 arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 4 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts| 4 arch/arm64/bo

[PATCH 6/7] arm64: allwinner: a64: add simplefb for A64 SoC

The A64 SoC features two display pipelines, one has a LCD output, the other has a HDMI output. Add support for simplefb for these pipelines on A64 SoC. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 26 ++

[PATCH 5/7] arm64: allwinner: a64: add DE2 CCU related device tree nodes

As we have all necessary parts to enable the DE2 CCU on the Allwinner A64 SoC, add the needed device tree nodes, including the SRAM controller node, SRAM C node, DE2 bus node and DE2 CCU node. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dts

[PATCH 2/7] dt-bindings: add binding for the Allwinner A64 DE2 bus

All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64 SoC to be claimed, otherwise the whole DE2 space is inaccessible. Add a device tree binding of the DE2 part as a sub-bus. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- .../devicetree/bindings/bus/sun50i-de2-bus.txt

[PATCH 4/7] clk: sunxi-ng: add A64 compatible string

requirments, as they're processed by the parent bus driver. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i

[PATCH 3/7] bus: add bus driver for accessing Allwinner A64 DE2

egion when probing. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/bus/Kconfig | 10 ++ drivers/bus/Makefile | 1 + drivers/bus/sun50i-de2.c | 49 3 files changed, 60 insertions(+) create mode 100644 drivers/bus/su

[PATCH 1/7] dt-bindings: add compatible string for the A64 DE2 CCU

The Allwinner A64 SoC has a DE2 CCU like the one in the DE2 of Allwinner H5 SoC. Add a compatible string for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Documentation/devicetree/bindings/clock/sun8i-de2.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devi

[PATCH 0/7] Allwinner A64 DE2 CCU support with dedicated DE2 bus driver

the bus driver. PATCH 5 is a modified version of A64 DE2 CCU patch, which uses the A64 DE2 bus. PATCH 6 and 7 are just the simplefb patches for A64. Icenowy Zheng (7): dt-bindings: add compatible string for the A64 DE2 CCU dt-bindings: add binding for the Allwinner A64 DE2 bus bus: add bus

[PATCH v2] clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU

The Allwinner H6 CCU has a "HDMI Slow Clock", which is currently missing in the ccu-sun50i-h6 driver. Add this missing clock to the driver. Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU") Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Change

Re: [PATCH 2/7] dt-bindings: add binding for the Allwinner A64 DE2 bus

于 2018年3月21日 GMT+08:00 上午2:46:46, Maxime Ripard <maxime.rip...@bootlin.com> 写到: >On Sat, Mar 17, 2018 at 01:53:49AM +0800, Icenowy Zheng wrote: >> All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64 SoC >to >> be claimed, otherwise the whole DE2 space is

Re: [linux-sunxi] Re: [PATCH 2/7] dt-bindings: add binding for the Allwinner A64 DE2 bus

于 2018年3月22日 GMT+08:00 上午1:13:42, "Jernej Škrabec" <jernej.skra...@siol.net> 写到: >Hi all, > >Dne sreda, 21. marec 2018 ob 03:18:13 CET je Icenowy Zheng napisal(a): >> 于 2018年3月21日 GMT+08:00 上午2:46:46, Maxime Ripard ><maxime.rip...@bootlin.com> >写到: &

[PATCH 2/2] arm64: allwinner: h6: temporarily drop the usage of CCU headers in DTSI

-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 +--- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 4debc3962830..56563150d61a

[PATCH 1/2] clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU

The Allwinner H6 CCU has a "HDMI Slow Clock", which is currently missing in the ccu-sun50i-h6 driver. Add this missing clock to the driver. Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU") Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drive

[PATCH v4 5/9] clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks

On the new Allwinner H6 SoC, multiple PLL's are NMP style clocks (modelled as NKMP with no K) and have fixed post-dividers. Add fixed post divider support to the NKMP style clocks. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- No changes in v4. Changes in v3: - Rebased on newest linu

[PATCH v4 4/9] pinctrl: sunxi: add support for the Allwinner H6 main pin controller

. The GPIO functions are dropped, as they're impossible to use -- except a GPIO only pin (PB20) which might be the IRQ of ATE. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Rob Herring <r...@kernel.org> --- No changes in v4. Changes in v3: - SPDX license identifier fi

[PATCH v4 7/9] clk: sunxi-ng: add support for the Allwinner H6 CCU

The Allwinner H6 SoC has a CCU which has been largely rearranged. Add support for it in the sunxi-ng CCU framework. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Maxime Ripard <maxime.rip...@bootlin.com> --- Changes in v4: - Extract the device tree binding document to a

[PATCH v4 8/9] arm64: allwinner: h6: add the basical Allwinner H6 DTSI file

Allwinner H6 is a new SoC with Cortex-A53 cores from Allwinner, with its memory map fully reworked and some high-speed peripherals (PCIe, USB 3.0) introduced. This commit adds the basical DTSI file of it, including the clock support and UART support. Signed-off-by: Icenowy Zheng <icen...@aosc

[PATCH v4 9/9] arm64: allwinner: h6: add support for Pine H64 board

and "Expansion" pin header - 2 USB 2.0 ports and 1 USB 3.0 ports - Audio jack - MicroSD slot and eMMC module slot - on-board SPI NOR flash - 1Gbps Ethernet port (via RTL8211E PHY) - HDMI port Adds initial support for it, including the UART on the Expansion pin header. Signed-off-by:

Re: [PATCH v4 0/9] Initial Allwinner H6 support

于 2018年3月19日 GMT+08:00 上午4:17:44, Maxime Ripard <maxime.rip...@bootlin.com> 写到: >On Fri, Mar 16, 2018 at 10:02:06PM +0800, Icenowy Zheng wrote: >> This patchset adds initial support for the Allwinner H6 SoC. >> >> It's quite different from earlier Allwinner SoCs. For

Re: [linux-sunxi] [PATCH 14/15] ARM: dts: sun8i: h3: Enable HDMI output on H3 boards

于 2018年2月27日 GMT+08:00 上午12:16:44, "Jernej Škrabec" 写到: >Hi Julian, > >Dne nedelja, 25. februar 2018 ob 09:11:34 CET je Julian Calaby >napisal(a): >> Hi Jernej, >> >> On Sun, Feb 25, 2018 at 8:45 AM, Jernej Skrabec > >wrote: >> > Enable HDMI

[PATCH 3/3] arm64: allwinner: h6: enable MMC0/2 on Pine H64

The Pine H64 board have a MicroSD slot connected to MMC0 controller of the H6 SoC and a eMMC slot connected to MMC2. Enable them in the device tree. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 32 ++ 1 file c

[PATCH v2 6/7] arm64: allwinner: a64: add device tree node for HDMI simplefb

As the U-Boot bootloader now is also capable of initialize the HDMI on A64 boards, add a simplefb device tree node for accessing the HDMI framebuffer initialized by the bootloader. Signed-off-by: Icenowy Zheng --- Changes in v2: - Dropped LCD SimpleFB as it's already added. LCD SimpleFB needs

Re: [PATCH AUTOSEL 4.18 31/39] clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks

于 2018年11月13日 GMT+08:00 下午1:50:45, Sasha Levin 写到: >From: Icenowy Zheng > >[ Upstream commit c2ff8383cc33c2d9c169e4daf1e37a434c3bb420 ] > >On the H6, the MMC module clocks are fixed in the new timing mode, >i.e. they do not have a bit to select the mode. These clocks

[PATCH] arm64: dts: allwinner: h6: fix EMAC compatible string sequence

nodes") Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 45bbb5116446..d1ed451f4d9e 100644

[PATCH v4 00/11] arm64: allwinner: Add A64 DE2 HDMI support

two display pipelines, and enables the HDMI output on several boards. The first pipeline is not enabled in this patchset yet, although it's added. Icenowy Zheng (2): clk: sunxi-ng: a64: Add max. rate constraint to video PLLs dt-bindings: sun4i-drm: add HDMI VCC supply property for sun8i-dw

[PATCH v4 01/11] clk: sunxi-ng: a64: Add minimal rate for video PLLs

From: Jagan Teki According to documentation and experience with other similar SoCs, video PLLs don't work stable if their output frequency is set below 192 MHz. Because of that, set minimal rate to both A64 video PLLs to 192 MHz. Signed-off-by: Jagan Teki Signed-off-by: Icenowy Zheng

[PATCH v4 03/11] dt-bindings: display: Add compatible for A64 DE2 display pipeline

: Refactor and also cover TCON1] Signed-off-by: Icenowy Zheng --- Changes for v4: - none Changes for v3.1: - added mixer0 and TCON0 Changes for v3: - collect Rob r-w-b tag Changes for v2: - Add fallback compatible for tcon1 - Add separate compatible for mixer1 .../devicetree/bindings/display/sunxi

[PATCH v4 02/11] clk: sunxi-ng: a64: Add max. rate constraint to video PLLs

for other SoCs, so more faith is put in BSP clock driver. Signed-off-by: Icenowy Zheng --- New patch in v4. drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 50 ++- 1 file changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk

[PATCH v4 05/11] drm/sun4i: Add support for A64 display engine

From: Jagan Teki Display Engine(DE2) in Allwinner A64 has two mixers and tcons. The routing for mixer0 is through tcon0 and connected to LVDS/RGB/MIPI-DSI controller. The routing for mixer1 is through tcon1 and connected to HDMI. Signed-off-by: Jagan Teki Signed-off-by: Icenowy Zheng

[PATCH v4 04/11] drm/sun4i: Add support for A64 mixers

From: Jagan Teki Mixers in Allwinner have similar capabilities as others SoCs with DE2. Add support for them. Signed-off-by: Jagan Teki [Icenowy: Add mixer1] Signed-off-by: Icenowy Zheng Reviewed-by: Jernej Skrabec --- Changes for v4: - none Changes for v3.1: - Add mixer0 Changes for v3

[PATCH v4 07/11] dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro

From: Jagan Teki Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent. Include the macro on dt-bindings so-that the same can be used while defining CCU clock phandles. Signed-off-by: Jagan Teki Reviewed-by: Rob Herring Signed-off-by: Icenowy Zheng --- Changes for v4: - Dropped PLL_VIDEO1

[PATCH v4 08/11] arm64: dts: allwinner: a64: Add display pipeline

and the TCON1 HDMI one. Signed-off-by: Jagan Teki [Icenowy: refactor commit message and add 1st pipeline] Signed-off-by: Icenowy Zheng --- Changes for v4: - Misc fixes - Dropped second PLL from HDMI PHY clock Changes for v3.1: - Refactor commit message to make it more clear. - Added first pipeline

[PATCH v4 10/11] drm/sun4i: Add support for HDMI voltage regulator

Signed-off-by: Icenowy Zheng --- Changes in v4: - Rename the supply name to "hvcc". Changes in v3.1: - New patch. (Replaced "drm: sun4i: add support for HVCC regulator for DWC HDMI glue" by Icenowy.) drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 17 - drivers/gpu/drm/su

[PATCH v4 11/11] arm64: dts: allwinner: a64: Enable HDMI output on A64 boards w/ HDMI

From: Jagan Teki Enable all necessary device tree nodes and add connector node to device trees for all supported A64 boards with HDMI. Signed-off-by: Jagan Teki [Icenowy: squash all board patches altogether and change supply name] Signed-off-by: Icenowy Zheng --- Changes in v4: - Rebase some

[PATCH v4 09/11] dt-bindings: sun4i-drm: add HDMI VCC supply property for sun8i-dw-hdmi

Allwiner SoCs with DesignWare HDMI controller all come with a "HVCC" pin, which is the VCC of HDMI part. Add a supply property to specify HVCC's regulator in the device tree. Signed-off-by: Icenowy Zheng --- Changes in v4: - Rename the supply name to "hvcc". Changes

[PATCH v4 06/11] dt-bindings: display: Add compatible for A64 HDMI

-by: Icenowy Zheng --- Changes for v4: - none Changes for v3.1: - Refactor commit log to make it more clear. Changes for v3: - collect Rob r-w-b tag Changes for v2: - Add fallback compatible Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [linux-sunxi] Re: [PATCH 2/7] dt-bindings: add binding for the Allwinner A64 DE2 bus

于 2018年3月27日 GMT+08:00 上午6:22:58, Rob Herring 写到: >On Thu, Mar 22, 2018 at 02:08:43PM +0800, Icenowy Zheng wrote: >> >> >> 于 2018年3月22日 GMT+08:00 上午1:13:42, "Jernej Škrabec" > 写到: >> >Hi all, >> > >> >Dne sreda, 21. marec 2018 ob

Re: [linux-sunxi] Re: [PATCH 2/7] dt-bindings: add binding for the Allwinner A64 DE2 bus

于 2018年3月22日 GMT+08:00 上午1:13:42, "Jernej Škrabec" 写到: >Hi all, > >Dne sreda, 21. marec 2018 ob 03:18:13 CET je Icenowy Zheng napisal(a): >> 于 2018年3月21日 GMT+08:00 上午2:46:46, Maxime Ripard > >写到: >> >On Sat, Mar 17, 2018 at 01:53:49AM +0800, Iceno

Re: [PATCH 2/7] dt-bindings: add binding for the Allwinner A64 DE2 bus

于 2018年3月21日 GMT+08:00 上午2:46:46, Maxime Ripard 写到: >On Sat, Mar 17, 2018 at 01:53:49AM +0800, Icenowy Zheng wrote: >> All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64 SoC >to >> be claimed, otherwise the whole DE2 space is inaccessible. >> >

[PATCH v2] clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU

The Allwinner H6 CCU has a "HDMI Slow Clock", which is currently missing in the ccu-sun50i-h6 driver. Add this missing clock to the driver. Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU") Signed-off-by: Icenowy Zheng --- Changes in v2: - Rearrange

[PATCH v4 0/9] Initial Allwinner H6 support

controller is broken), and the second one with USB 3.0 (the first one is A80). This patchset adds the most basical support for it, including the main pin controller, the main CCU and the basical device tree. Icenowy Zheng (9): pinctrl: sunxi: refactor irq related register function to have desc

[PATCH v4 3/9] pinctrl: sunxi: change irq_bank_base to irq_bank_map

The Allwinner H6 SoC have its pin controllers with the first IRQ-capable GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. Change the current code that uses IRQ bank base to a IRQ bank map, in order to support the case that holes exist among IRQ banks. Signed-off-by: Icenowy Zheng

[PATCH v4 2/9] pinctrl: sunxi: introduce IRQ bank conversion function

ode in IRQ register access. Signed-off-by: Icenowy Zheng --- Extracted in v4. drivers/pinctrl/sunxi/pinctrl-sunxi.h | 23 --- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index a1

[PATCH v4 1/9] pinctrl: sunxi: refactor irq related register function to have desc

As the new H6 SoC has holes in the IRQ registers, refactor the IRQ related register function for getting the full pinctrl desc structure. Signed-off-by: Icenowy Zheng --- Changes in v4: - Adjusted parameter sequence. Patch introduced in v3. drivers/pinctrl/sunxi/pinctrl-sunxi.c | 22

[PATCH v4 6/9] dt-bindings: add device tree binding for Allwinner H6 main CCU

The Allwinner H6 main CCU uses the internal oscillator of the SoC, which is different with old SoCs' main CCU. Add device tree binding for the Allwinner H6 main CCU. Signed-off-by: Icenowy Zheng --- Extracted in v4. Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 4 1 file

[PATCH v4 5/9] clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks

On the new Allwinner H6 SoC, multiple PLL's are NMP style clocks (modelled as NKMP with no K) and have fixed post-dividers. Add fixed post divider support to the NKMP style clocks. Signed-off-by: Icenowy Zheng --- No changes in v4. Changes in v3: - Rebased on newest linux-next/master

[PATCH v4 4/9] pinctrl: sunxi: add support for the Allwinner H6 main pin controller

. The GPIO functions are dropped, as they're impossible to use -- except a GPIO only pin (PB20) which might be the IRQ of ATE. Signed-off-by: Icenowy Zheng Acked-by: Rob Herring --- No changes in v4. Changes in v3: - SPDX license identifier fix. - Dropped most GPIO functionality at PA/PB. Cha

[PATCH v4 7/9] clk: sunxi-ng: add support for the Allwinner H6 CCU

The Allwinner H6 SoC has a CCU which has been largely rearranged. Add support for it in the sunxi-ng CCU framework. Signed-off-by: Icenowy Zheng Acked-by: Maxime Ripard --- Changes in v4: - Extract the device tree binding document to another patch. Changes in v3: - SPDX license idetifier fix

[PATCH v4 8/9] arm64: allwinner: h6: add the basical Allwinner H6 DTSI file

Allwinner H6 is a new SoC with Cortex-A53 cores from Allwinner, with its memory map fully reworked and some high-speed peripherals (PCIe, USB 3.0) introduced. This commit adds the basical DTSI file of it, including the clock support and UART support. Signed-off-by: Icenowy Zheng Reviewed

[PATCH v4 9/9] arm64: allwinner: h6: add support for Pine H64 board

and "Expansion" pin header - 2 USB 2.0 ports and 1 USB 3.0 ports - Audio jack - MicroSD slot and eMMC module slot - on-board SPI NOR flash - 1Gbps Ethernet port (via RTL8211E PHY) - HDMI port Adds initial support for it, including the UART on the Expansion pin header. Signed-off-by: Ice

[PATCH 1/7] dt-bindings: add compatible string for the A64 DE2 CCU

The Allwinner A64 SoC has a DE2 CCU like the one in the DE2 of Allwinner H5 SoC. Add a compatible string for it. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/clock/sun8i-de2.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock

[PATCH 0/7] Allwinner A64 DE2 CCU support with dedicated DE2 bus driver

the bus driver. PATCH 5 is a modified version of A64 DE2 CCU patch, which uses the A64 DE2 bus. PATCH 6 and 7 are just the simplefb patches for A64. Icenowy Zheng (7): dt-bindings: add compatible string for the A64 DE2 CCU dt-bindings: add binding for the Allwinner A64 DE2 bus bus: add bus

[PATCH 2/7] dt-bindings: add binding for the Allwinner A64 DE2 bus

All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64 SoC to be claimed, otherwise the whole DE2 space is inaccessible. Add a device tree binding of the DE2 part as a sub-bus. Signed-off-by: Icenowy Zheng --- .../devicetree/bindings/bus/sun50i-de2-bus.txt | 37

[PATCH 4/7] clk: sunxi-ng: add A64 compatible string

requirments, as they're processed by the parent bus driver. Signed-off-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index 468d1abaf0ee

[PATCH 3/7] bus: add bus driver for accessing Allwinner A64 DE2

egion when probing. Signed-off-by: Icenowy Zheng --- drivers/bus/Kconfig | 10 ++ drivers/bus/Makefile | 1 + drivers/bus/sun50i-de2.c | 49 3 files changed, 60 insertions(+) create mode 100644 drivers/bus/sun50i-de2.c diff --git

[PATCH 7/7] arm64: allwinner: a64: add HDMI regulator to all DTs' simplefb_hdmi

device node. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 4 arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 4 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts| 4 arch/arm64/boot/dts/allwinner/sun50i-a64

[PATCH 6/7] arm64: allwinner: a64: add simplefb for A64 SoC

The A64 SoC features two display pipelines, one has a LCD output, the other has a HDMI output. Add support for simplefb for these pipelines on A64 SoC. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 26 ++ 1 file changed, 26 insertions

[PATCH 5/7] arm64: allwinner: a64: add DE2 CCU related device tree nodes

As we have all necessary parts to enable the DE2 CCU on the Allwinner A64 SoC, add the needed device tree nodes, including the SRAM controller node, SRAM C node, DE2 bus node and DE2 CCU node. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 42

Re: [linux-sunxi] [PATCH 3/3] arm64: allwinner: h6: enable MMC0/2 on Pine H64

于 2018年4月30日 GMT+08:00 下午5:47:35, Andre Przywara 写到: >Hi Icenowy, > >On 27/04/18 08:12, Icenowy Zheng wrote: >> >> >> 于 2018年4月27日 GMT+08:00 上午12:46:26, Andre Przywara > 写到: >>> Hi, >>> >>> On 26/04/18 15:07, Icenowy Zheng wrote: >

[PATCH 0/3] Enable basic MMC support on Allwinner H6

. Higher speed bins are not supported, similar to A64/H5. EMCE is also not supported, and keeps its bypassed status by default. Icenowy Zheng (3): mmc: sunxi: add support for the MMC controller on H6 arm64: allwinner: h6: add device tree nodes for MMC controllers arm64: allwinner: h6: enable MMC0/2

[PATCH 2/3] arm64: allwinner: h6: add device tree nodes for MMC controllers

The Allwinner H6 SoC have 3 MMC controllers. Add device tree nodes for them. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch

[PATCH 1/3] mmc: sunxi: add support for the MMC controller on H6

by defualt, we just duplicate the A64 mmc configurations and change the compatible string. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/mmc/sunxi-mmc.txt | 2 ++ drivers/mmc/host/sunxi-mmc.c| 16 2 files changed, 18 insertions

[PATCH 3/3] arm64: allwinner: h6: enable MMC0/2 on Pine H64

The Pine H64 board have a MicroSD slot connected to MMC0 controller of the H6 SoC and a eMMC slot connected to MMC2. Enable them in the device tree. Signed-off-by: Icenowy Zheng --- .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 32 ++ 1 file changed, 32 insertions

Re: [linux-sunxi] [PATCH 3/3] arm64: allwinner: h6: enable MMC0/2 on Pine H64

于 2018年4月27日 GMT+08:00 上午12:46:26, Andre Przywara 写到: >Hi, > >On 26/04/18 15:07, Icenowy Zheng wrote: >> The Pine H64 board have a MicroSD slot connected to MMC0 controller >of >> the H6 SoC and a eMMC slot connected to MMC2. >> >> Enable them in the device

Re: [linux-sunxi] [PATCH 2/3] arm64: allwinner: h6: add device tree nodes for MMC controllers

于 2018年4月27日 GMT+08:00 上午12:45:38, Andre Przywara 写到: >Hi, > >On 26/04/18 15:07, Icenowy Zheng wrote: >> The Allwinner H6 SoC have 3 MMC controllers. >> >> Add device tree nodes for them. >> >> Signed-off-by: Icenowy Zheng >> --- >>

Re: [linux-sunxi] [PATCH 1/3] mmc: sunxi: add support for the MMC controller on H6

于 2018年4月27日 GMT+08:00 上午12:45:24, Andre Przywara 写到: >Hi, > >On 26/04/18 15:07, Icenowy Zheng wrote: >> The new Allwinner H6 SoC have 3 MMC controllers. The first and second >> ones are similar to the ones on A64, but the third one adds EMCE >> (Embedded Crypto

Re: [linux-sunxi] [PATCH 2/3] arm64: allwinner: h6: add device tree nodes for MMC controllers

于 2018年4月27日 GMT+08:00 下午5:18:23, Andre Przywara 写到: >Hi, > >On 27/04/18 09:36, Icenowy Zheng wrote: >> >> >> 于 2018年4月27日 GMT+08:00 上午12:45:38, Andre Przywara > 写到: >>> Hi, >>> >>> On 26/04/18 15:07, Icenowy Zheng wrote: >>>&

[PATCH v4 0/3] SY8106A regulator support and enable it on Orange Pi PC

This patchset adds dt-bindings and driver for Silergy SY8106A, and then utilize it on the Orange Pi PC board, which uses SY8016A as its CPUX (main ARM CPU cluster in an Allwinner SoC) power supply. The driver's functionality is restricted now, mainly {en,dis}able function is not yet implemented,

[PATCH v4 1/3] dt-bindings: add binding for the SY8106A voltage regulator

From: Ondrej Jirman SY8106A is an I2C-controlled adjustable voltage regulator made by Silergy Corp. Add its device tree binding. Signed-off-by: Ondrej Jirman [Icenowy: Change commit message and slight fixes] Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai Acked-by: Rob Herring

[PATCH v4 2/3] regulator: add support for SY8106A regulator

code, add default ramp_delay, add comment for go bit, add code for fixed mode voltage] Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai --- Changes in v4: - Drop custom {get,set}_voltage_sel function, and force GO_BIT to be set when probing. Changes in v3: - Return the fixed voltage defined

[PATCH v4 3/3] ARM: dts: sun8i: h3: Add SY8106A regulator to Orange Pi PC

] Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai [w...@csie.org: Rename regulator label] Signed-off-by: Chen-Yu Tsai --- No changes in v4. Changes in v3: - Renamed regulator label (by Chen-Yu Tsai). - Added the fixed mode voltage number. Changes in v2: - Reduce maximum voltage to 1.3V

[PATCH 0/5] Allwinner H6 USB3 support

This patchset contains USB3 support for Allwinner H6 SoC (DWC3 with a custom PHY). The first patch adds the PHY driver, and the second/third patch adds compatible to adapt DWC3 platform glue to Allwinner platform. The last two patches are DT changes. Icenowy Zheng (5): phy: allwinner: add phy

[PATCH 1/5] phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC

Allwinner H6 SoC contains a USB3 PHY (with USB2 DP/DM lines also controlled). Add a driver for it. The register operations in this driver is mainly extracted from the BSP USB3 driver. Signed-off-by: Icenowy Zheng --- .../bindings/phy/sun50i-usb3-phy.txt | 24 +++ drivers/phy

[PATCH 2/5] dt-bindings: usb: add binding for the DWC3 controller on Allwinner SoC

The Allwinner H6 SoC uses DWC3 controller for USB3. Add its device tree binding document. Signed-off-by: Icenowy Zheng --- .../bindings/usb/allwinner,dwc3.txt | 39 +++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb

<    3   4   5   6   7   8   9   10   11   12   >