On 10/31/2012 09:54 AM, Srinivas KANDAGATLA wrote:
Hi All,
I have few queries on of_platform_populate and of_platform_bus_probe
functions.
Use-case is, I want to explicitly register platform devices from some nodes
at post-core or late-init level(like child@1).
And I don't want
On 10/31/2012 04:31 PM, Linus Walleij wrote:
This moves the Versatile FPGA interrupt controller driver, used in
the Integrator/AP, Integrator/CP and some Versatile boards, out
of arch/arm/plat-versatile and down to drivers/irqchip where we
have consensus that such drivers belong. The header
On 10/31/2012 08:24 PM, Yangfei (Felix) wrote:
The current WFI opcode definiton causes CPU hot-plug feature fails to work
if the kernel is built with CONFIG_THUMB2_KERNEL/CONFIG_CPU_ENDIAN_BE8 being
defined. An invalid instruction exception will be generated.
Signed-off-by:
On 10/31/2012 10:57 AM, Pantelis Antoniou wrote:
This simple patch enables dynamic changes of the DT tree on runtime
to be visible to the device-tree proc interface.
Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
Acked-by: Rob Herring rob.herr...@calxeda.com
---
arch/arm
On 09/23/2012 08:30 AM, Maxin B. John wrote:
Fixes the wrong filename.
Signed-off-by: Maxin B. John maxin.j...@gmail.com
---
Acked-by: Rob Herring rob.herr...@calxeda.com
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index bffd550..e39c122 100644
On 09/06/2012 09:57 AM, Kishon Vijay Abraham I wrote:
All phy related programming like enabling/disabling the clocks, powering
on/off the phy is taken care of by this driver. It is also used for OTG
related functionality like srp.
This also includes device tree support for usb2 phy driver
On 09/26/2012 12:18 PM, Linus Walleij wrote:
From: Linus Walleij linus.wall...@linaro.org
This allocates the IRQ descriptors for the Nomadik pin controller
dynamically so that we don't have to rely on some other mechanism
doing it, and moving a step closer to a linear IRQ domain.
Cc: Rob
, which
allocates the IRQ descriptors for the Nomadik pin controller
dynamically.
Cc: Lee Jones lee.jo...@linaro.org
Cc: Rob Herring rob.herr...@calxeda.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
drivers/pinctrl/pinctrl-nomadik.c | 16 +---
1 file changed
habit of hogging descriptors at boot
time.
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Thomas Gleixner t...@linutronix.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Russell King li...@arm.linux.org.uk
Cc: Lee Jones lee.jo...@linaro.org
Signed-off-by: Linus Walleij linus.wall
On 09/25/2012 05:06 AM, ABRAHAM, KISHON VIJAY wrote:
Hi,
On Mon, Sep 24, 2012 at 6:45 PM, Rob Herring robherri...@gmail.com wrote:
On 09/06/2012 09:57 AM, Kishon Vijay Abraham I wrote:
All phy related programming like enabling/disabling the clocks, powering
on/off the phy is taken care
field annotation
devicetree: serial: Add documentation for imx serial
John Crispin (1):
DT: export of_irq_to_resource_table()
Olof Johansson (1):
of: i2c: add support for wakeup-source property
Rob Herring (1):
MAINTAINERS: add scripts/dtc under Devicetree maintainers
On 10/04/2012 05:39 AM, Sascha Hauer wrote:
devicetrees may have the linux,stdout-path property to specify the
console. This patch adds support to the i.MX serial driver for this.
Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
I was originally looking for a more generic way to
, etc. rather than duplicating those for every
platform.
Rob
Signed-off-by: Stephen Boyd sb...@codeaurora.org
Cc: David Brown dav...@codeaurora.org
Cc: Kukjin Kim kgene@samsung.com
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Rob Herring rob.herr
On 10/05/2012 11:12 AM, Sascha Hauer wrote:
devicetrees may have a linux,stdout-path property in the chosen
node describing the console device. This adds a helper function
to match a device against this property so a driver can call
add_preferred_console for a matching device.
Consoles can be
in for 3.7.
Rob
Cc: Rob Herring rob.herr...@calxeda.com
Cc: devicetree-disc...@lists.ozlabs.org
Acked-by: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
drivers/of/of_i2c.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/of/of_i2c.c b
On 10/04/2012 02:22 PM, Stephen Boyd wrote:
On 10/04/12 06:05, Rob Herring wrote:
On 10/04/2012 03:50 AM, Stephen Boyd wrote:
The TWD and SCU configs are selected by default as long as
SCORPIONMP is false and/or MCT is false. Implementing the logic
this way certainly saves lines
On 11/02/2012 11:21 AM, Murali Karicheri wrote:
This is a platform driver for asynchronous external memory interface
available on TI SoCs. This driver was previously located inside the
mach-davinci folder. As this DaVinci IP is re-used across multiple
family of devices such as c6x, keystone
On 11/05/2012 05:22 AM, Michal Simek wrote:
2012/10/29 Josh Cartwright josh.cartwri...@ni.com:
Suggested cleanup by Arnd Bergmann. Move the ttc timer.c code to
drivers/clocksource, and out of the mach-zynq directory.
The common.h (which only held the timer declaration) was renamed to
On 11/05/2012 08:34 AM, Grant Likely wrote:
On Mon, Nov 5, 2012 at 1:25 PM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
On Nov 5, 2012, at 1:22 AM, Grant Likely wrote:
On Fri, Nov 2, 2012 at 8:43 AM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
Assuming that we do work
implementation
in arch/sparc/arch/sparc/kernel/of_device_common.c
Signed-off-by: Andreas Larsson andr...@gaisler.com
Otherwise,
Acked-by: Rob Herring rob.herr...@calxeda.com
---
arch/sparc/include/asm/prom.h |5 +
include/linux/of_address.h|2 ++
2 files changed, 7
On 11/02/2012 07:15 AM, Russell King - ARM Linux wrote:
On Thu, Nov 01, 2012 at 11:20:10PM +0100, Thomas Petazzoni wrote:
Linus,
On Thu, 1 Nov 2012 22:28:49 +0100, Linus Walleij wrote:
+void fpga_handle_irq(struct pt_regs *regs);
This function does not need to be exposed in a public
On 10/25/2012 11:20 PM, Viresh Kumar wrote:
This adds following helper routines:
- of_property_read_u8_array()
- of_property_read_u16_array()
- of_property_read_u8()
- of_property_read_u16()
First two actually share most of the code with of_property_read_u32_array(),
so
the common part
On 11/07/2012 12:32 PM, Mark Langsdorf wrote:
Highbank processors depend on the external ECME to perform voltage
management based on a requested frequency. Communication between the
highbank and ECME cores happens over the pl320 IPC channel.
Signed-off-by: Mark Langsdorf
From: Rob Herring rob.herr...@calxeda.com
Add support for core powergating on Calxeda platforms. Initially, this
supports ECX-1000 (highbank), but support will be added for ECX-2000
later.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Len Brown len.br...@intel.com
Cc: Rafael J. Wysocki
On 10/19/2012 02:06 AM, AnilKumar Ch wrote:
Add device tree support to matrix keypad driver and usage details
are added to device tree documentation. Driver was tested on AM335x
EVM.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
.../devicetree/bindings/input/matrix-keypad.txt| 52
Adding Arnd and Olof.
On 10/18/2012 07:04 PM, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Let ARCH_MXC be covered by multi_v7_defconfig.
Allow booting mx6 via NFS.
Now we can start debating what should or shouldn't be in shared
defconfigs. :)
My intent with this
Adding lkml. DT patches should go to both lists.
On 10/23/2012 05:30 AM, Srinivas KANDAGATLA wrote:
From: Srinivas Kandagatla srinivas.kandaga...@st.com
As part of of_platform_populate call, the existing code iterates each
child node and then creates a platform device for each child, however
On 10/23/2012 09:50 AM, Arnd Bergmann wrote:
On Monday 22 October 2012, Josh Cartwright wrote:
Shifting them up into the vmalloc region prevents the following warning,
when booting a zynq qemu target with more than 512mb of RAM:
BUG: mapping for 0xe000 at 0xe000 out of vmalloc space
On 10/23/2012 09:41 AM, Arnd Bergmann wrote:
On Monday 22 October 2012, Josh Cartwright wrote:
Hey all-
Things have been relatively quiet on the Zynq front lately. This
patchset does a bit of cleanup of the Zynq subarchitecture. It was the
necessary set of things I had to do to get a zynq
On 10/10/2012 01:54 AM, Linus Walleij wrote:
On Mon, Oct 1, 2012 at 2:11 PM, Rob Herring robherri...@gmail.com wrote:
On 10/01/2012 02:35 AM, Linus Walleij wrote:
From: Linus Walleij linus.wall...@linaro.org
Currently we rely on all IRQ chip instances to dynamically
allocate their IRQ
On 10/10/2012 10:16 AM, Stephen Warren wrote:
On 10/10/2012 01:24 AM, David Gibson wrote:
On Tue, Oct 09, 2012 at 10:43:50PM -0600, Warner Losh wrote:
On Oct 9, 2012, at 6:04 PM, Scott Wood wrote:
On 10/09/2012 06:20:53 PM, Mitch Bradley wrote:
On 10/9/2012 11:16 AM, Stephen Warren wrote:
On 10/09/2012 04:16 PM, Stephen Warren wrote:
On 10/01/2012 12:39 PM, Jon Loeliger wrote:
What more do you think needs discussion re: dtc+cpp?
How not to abuse the ever-loving shit out of it? :-)
Perhaps we can just handle this through the regular patch review
process; I think it may be
On 10/10/2012 11:19 AM, Stephen Warren wrote:
On 10/10/2012 09:33 AM, Rob Herring wrote:
On 10/10/2012 10:16 AM, Stephen Warren wrote:
On 10/10/2012 01:24 AM, David Gibson wrote:
On Tue, Oct 09, 2012 at 10:43:50PM -0600, Warner Losh wrote:
On Oct 9, 2012, at 6:04 PM, Scott Wood wrote
From: Rob Herring rob.herr...@calxeda.com
Enable the tx dma to start reading the next frame while sending the current
frame.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
---
drivers/net/ethernet/calxeda/xgmac.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Rob Herring rob.herr...@calxeda.com
New received frames will trigger the rx DMA to poll the DMA descriptors,
so there is no need to tell the h/w to poll. We also want to enable
dropping frames from the fifo when there is no buffer.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
From: Rob Herring rob.herr...@calxeda.com
The standard readl/writel accessors involve a spinlock and cache sync
operation on ARM platforms with an outer cache. Only DMA triggering
accesses need this, so use the relaxed variants instead.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
From: Rob Herring rob.herr...@calxeda.com
The interrupts have already been cleared, so we don't need to clear them
again. Also, we could miss interrupts if they are cleared, but we don't
process the packet.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
---
drivers/net/ethernet/calxeda
From: Rob Herring rob.herr...@calxeda.com
On gcc 4.7, we will get alignment traps in the ip stack if we don't align
the ip headers on receive. The h/w can support this, so use ip aligned
allocations.
Cut down the unnecessary padding on the allocation. The buffer can start on
any byte alignment
From: Rob Herring rob.herr...@calxeda.com
Only generate tx interrupts on every ring size / 4 descriptors. Move the
netif_stop_queue call to the end of the xmit function rather than
checking at the beginning.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
---
drivers/net/ethernet/calxeda
From: Rob Herring rob.herr...@calxeda.com
This is a series of performance improvements to the xgmac driver. The most
significant changes are the alignment fixes to avoid alignment traps on
received frames and using relaxed i/o accessors.
Rob
Rob Herring (6):
net: calxedaxgmac: enable operate
On 10/12/2012 11:28 AM, Ben Hutchings wrote:
On Fri, 2012-10-12 at 10:15 -0500, Rob Herring wrote:
From: Rob Herring rob.herr...@calxeda.com
Only generate tx interrupts on every ring size / 4 descriptors. Move the
netif_stop_queue call to the end of the xmit function rather than
checking
From: Rob Herring rob.herr...@calxeda.com
Only generate tx interrupts on every ring size / 4 descriptors. Move the
netif_stop_queue call to the end of the xmit function rather than
checking at the beginning.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
---
v2:
- Add missed enabling
Eric Dumazet eric.duma...@gmail.com wrote:
On Fri, 2012-10-12 at 13:04 -0500, Rob Herring wrote:
From: Rob Herring rob.herr...@calxeda.com
Only generate tx interrupts on every ring size / 4 descriptors. Move
the
netif_stop_queue call to the end of the xmit function rather than
checking
On 10/25/2012 02:03 AM, Viresh Kumar wrote:
On 12 October 2012 23:31, Viresh Kumar viresh.ku...@linaro.org wrote:
This adds following helper routines:
- of_property_read_u8_array()
- of_property_read_u16_array()
- of_property_read_u8()
- of_property_read_u16()
First two actually share most
On 10/25/2012 08:18 AM, Jason Cooper wrote:
On Wed, Oct 24, 2012 at 04:05:45PM +0200, Gregory CLEMENT wrote:
On 10/24/2012 04:01 PM, Thomas Petazzoni wrote:
Hello,
Shouldn't you split into one commit adding the SATA definition in
the .dtsi + doing the defconfig change (the SoC level
On 10/25/2012 08:34 AM, Gregory CLEMENT wrote:
On 10/25/2012 03:21 PM, Thomas Petazzoni wrote:
Jason,
On Thu, 25 Oct 2012 09:18:18 -0400, Jason Cooper wrote:
Jason, Andrew, do you want I split this patch as suggested by
Thomas or are you fine with having one single patch?
Yes, please make
On 10/25/2012 09:11 AM, Gregory CLEMENT wrote:
On 10/25/2012 03:53 PM, Rob Herring wrote:
On 10/25/2012 08:18 AM, Jason Cooper wrote:
On Wed, Oct 24, 2012 at 04:05:45PM +0200, Gregory CLEMENT wrote:
On 10/24/2012 04:01 PM, Thomas Petazzoni wrote:
Hello,
Shouldn't you split into one commit
On 10/23/2012 07:53 PM, Josh Cartwright wrote:
The list of attributes above details the use of the 'filter-ranges'
property, but the example improperly used 'filter-latency'. Make these
consistent by fixing up the example.
Signed-off-by: Josh Cartwright josh.cartwri...@ni.com
Applied for
On 10/26/2012 02:29 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Modify cmd_dtc to run the C pre-processor on the input .dts file before
passing it to dtc for final compilation. This allows the use of #define
and #include within the .dts file.
While this change is small
David,
On 10/12/2012 10:15 AM, Rob Herring wrote:
From: Rob Herring rob.herr...@calxeda.com
This is a series of performance improvements to the xgmac driver. The most
significant changes are the alignment fixes to avoid alignment traps on
received frames and using relaxed i/o accessors
On 11/09/2012 07:07 AM, Thierry Reding wrote:
The used vendor prefix corresponds to the stock symbol (ONNN) for ON
Semiconductor Corp.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
Applied. Thanks.
Rob
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1
On 11/09/2012 06:48 PM, Stepan Moskovchenko wrote:
Use the cell-index property to construct names for platform
devices, falling back on the existing scheme of using the
device register address if cell-index is not specified.
The cell-index property is a more useful device identifier,
On 11/06/2012 10:22 PM, viresh kumar wrote:
On Tue, Nov 6, 2012 at 7:48 PM, Rob Herring robherri...@gmail.com wrote:
+#define of_property_read_array(_np, _pname, _out, _sz)
\
+ while (_sz--) \
+ *_out
On 11/11/2012 11:27 AM, Viresh Kumar wrote:
On 11 November 2012 19:42, Rob Herring robherri...@gmail.com wrote:
On 11/06/2012 10:22 PM, viresh kumar wrote:
cluster0: cluster@0 {
+ data1 = 0x50 0x60 0x70;
+ data2 = 0x5000 0x6000
On 11/13/2012 05:10 AM, Wolfram Sang wrote:
Hi,
On Mon, Nov 12, 2012 at 05:59:50PM +0100, Andreas Larsson wrote:
Add sparc support by using platform_get_irq instead of platform_get_resource.
There are no platform resources of type IORESOURCE_IRQ for sparc, but
platform_get_irq works for
On 11/07/2012 12:32 PM, Mark Langsdorf wrote:
From: Rob Herring rob.herr...@calxeda.com
The pl320 IPC allows for interprocessor communication between the highbank A9
and the EnergyCore Management Engine. The pl320 implements a straightforward
mailbox protocol.
Signed-off-by: Mark
stop doing that and simply use the linear IRQ domain.
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Shawn Guo shawn@linaro.org
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
drivers/gpio/gpio-mxs.c | 19 ++-
1 file
On 07/12/2012 08:08 AM, Sebastian Hesselbarh wrote:
On 07/12/2012 02:14 PM, Rob Herring wrote:
+Required child properties:
+- reg : should contain the individual bit and polarity to control
+the clock gate. A polarity of 0 means that by setting the
+bit to 1 the clock passes
On 07/13/2012 12:14 AM, Stephen Rothwell wrote:
Hi Mike,
Today's linux-next merge of the clk tree got a conflict in
drivers/clk/Makefile between commit 4a31bd28e86a (ARM: nomadik: convert
to generic clock) from the arm-soc tree and commit 8d4d9f52081c (clk:
add highbank clock support)
On 07/13/2012 04:42 AM, Sebastian Hesselbarh wrote:
On 07/13/2012 05:19 AM, Rob Herring wrote:
What's implemented in Linux should not define the binding. The binding
should describe the hardware.
[...]
True, but not your problem to implement. A binding doesn't necessarily
mean
From: Rob Herring rob.herr...@calxeda.com
With commit 766e6a4ec602d0c107 (clk: add DT clock binding support),
compiling with OF !COMMON_CLK is broken.
Reported-by: Alexandre Pereira da Silva aletes@gmail.com
Reported-by: Prashant Gaikwad pgaik...@nvidia.com
Signed-off-by: Rob Herring
On 07/16/2012 07:12 PM, Mike Turquette wrote:
On 20120716-16:46, Rob Herring wrote:
From: Rob Herring rob.herr...@calxeda.com
With commit 766e6a4ec602d0c107 (clk: add DT clock binding support),
compiling with OF !COMMON_CLK is broken.
Hi Rob,
Thanks for sending this quickly.
snip
On 07/17/2012 08:19 AM, Rajendra Nayak wrote:
Rob, Mike,
On Tuesday 17 July 2012 07:38 AM, Rob Herring wrote:
On 07/16/2012 07:12 PM, Mike Turquette wrote:
On 20120716-16:46, Rob Herring wrote:
From: Rob Herringrob.herr...@calxeda.com
With commit 766e6a4ec602d0c107 (clk: add DT clock
downstream tree you have a lot of new
bindings. Please make sure these go through proper review channels as
you start to upstream them; i.e. Grant Likely and Rob Herring should
either merge or ack them.
I've cc:d Rob and Grant on this reply and I'll merge it for now but to avoid
delays in getting your
On Fri, Apr 12, 2013 at 7:27 PM, Stephen Boyd sb...@codeaurora.org wrote:
Add a binding for the arm architected timer hardware's memory
mapped interface. The mmio timer hardware is made up of one base
frame and a collection of up to 8 timer frames, where each of the
8 timer frames can have
On 04/15/2013 05:21 PM, Colin Cross wrote:
On Wed, Apr 10, 2013 at 6:30 AM, Rob Herring robherri...@gmail.com wrote:
On 04/09/2013 10:53 PM, Colin Cross wrote:
On Tue, Apr 9, 2013 at 8:08 PM, Rob Herring robherri...@gmail.com wrote:
From: Rob Herring rob.herr...@calxeda.com
Atomic operations
On 04/16/2013 03:44 AM, Will Deacon wrote:
On Tue, Apr 16, 2013 at 01:43:09AM +0100, Colin Cross wrote:
On Mon, Apr 15, 2013 at 4:59 PM, Rob Herring robherri...@gmail.com wrote:
Exclusive accesses still have further restrictions. From section 3.4.5:
• It is IMPLEMENTATION DEFINED whether
From: Rob Herring rob.herr...@calxeda.com
In preparation to fix initial time and suspend/resume handling, unify
the sched_clock init and implementation for arch timer on arm and arm64.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Catalin Marinas
From: Rob Herring rob.herr...@calxeda.com
Commit 023796b (ARM: arch_timer: use full 64-bit counter for sched_clock)
fails to ensure sched_clock always starts at time 0 and counting is
suspended during suspend. arm64 sched_clock support also has the same
issues. This fixes all architected timer
On 04/18/2013 07:00 PM, Stephen Boyd wrote:
On 04/18/13 12:30, Rob Herring wrote:
diff --git a/drivers/clocksource/arm_arch_timer.c
b/drivers/clocksource/arm_arch_timer.c
index 122ff05..17ed8e4 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
from preempt-rt, update subject add a commit log]
Signed-off-by: Paul Gortmaker paul.gortma...@windriver.com
Signed-off-by: Rob Herring rob.herr...@calxeda.com
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
From: Rob Herring rob.herr...@calxeda.com
CONFIG_OF_DEVICE is going away, so use CONFIG_OF instead. It does not
appear that CONFIG_OF_DEVICE was the correct dependency either.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Alexander Shishkin alexander.shish...@linux.intel.com
Cc: Greg
From: Rob Herring rob.herr...@calxeda.com
CONFIG_OF_DEVICE is always selected when CONFIG_OF is enabled, so remove
it and simplify of_platform.h and of_device.h headers. This also fixes
!OF compiles using of_platform_populate.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Grant Likely
From: Rob Herring rob.herr...@calxeda.com
This series is a relatively straight-forward removal of the last remaining
user of of_platform_driver (ibmebus) and removal of CONFIG_OF_DEVICE which
is always enabled when CONFIG_OF is enabled.
Compile tested on powerpc and sparc.
Rob
Rob Herring (5
From: Rob Herring rob.herr...@calxeda.com
In converting the last remaining of_platform_driver (ibmebus) to a regular
platform driver, to_platform_driver is needed to replace
to_of_platform_driver.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Greg Kroah-Hartman gre
From: Rob Herring rob.herr...@calxeda.com
The last user of of_platform_driver is converted to a regular
platform_driver, so of_platform_driver can be removed now.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Grant Likely grant.lik...@linaro.org
---
include/linux/of_platform.h | 21
From: Rob Herring rob.herr...@calxeda.com
ibmebus is the last remaining user of of_platform_driver and the
conversion to a regular platform driver is trivial.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau
Guo shawn@linaro.org
Acked-by: Rob Herring rob.herr...@calxeda.com
Signed-off-by: Stephen Warren swar...@nvidia.com
---
Grant, Rob, Michal, I'm hoping for acks or comments from you so this
series can be placed into a topic branch in the arm-soc repo, for others
to build on during the 3.10
On Mon, Sep 17, 2012 at 1:23 AM, Anton Vorontsov cbouatmai...@gmail.com wrote:
On Fri, Sep 07, 2012 at 10:29:10PM -0700, Anton Vorontsov wrote:
On Fri, Sep 07, 2012 at 11:29:36AM -0700, Bryan Freed wrote:
When called with a non-zero of_node, fill out a new ramoops_platform_data
with data
On 04/04/2013 08:01 PM, Stephen Warren wrote:
On 04/04/2013 05:17 PM, Rob Herring wrote:
On 04/03/2013 06:34 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
The recent dtc+cpp support allows header files and C pre-processor
defines/macros to be used when compiling device
On 04/05/2013 01:46 PM, Stephen Warren wrote:
Rob, it might be worth keeping this in a separate branch in linux-next
so you can pull it out if it causes any issues. I've been using these
patches for quite a while now, but there's always opportunity for
surprises on architectures I don't use. I
On 04/05/2013 02:36 PM, Nicolas Pitre wrote:
On Fri, 5 Apr 2013, Stefano Stabellini wrote:
This is what happens:
- No Xen
Xen is not running on the platform and a Xen hypervisor node is not
available on device tree.
Everything keeps working seamlessly, this patch doesn't change anything.
-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
Compared to the v3 sent by Andrew Murray, the following changes have
been made:
* Unify and move duplicate pci_process_bridge_OF_ranges functions to
drivers/of/of_pci.c as suggested by Rob Herring
This part should really
04, 2013 at 09:03:47PM -0500, Rob Herring wrote:
On Mon, Sep 17, 2012 at 1:23 AM, Anton Vorontsov cbouatmai...@gmail.com
wrote:
On Fri, Sep 07, 2012 at 10:29:10PM -0700, Anton Vorontsov wrote:
On Fri, Sep 07, 2012 at 11:29:36AM -0700, Bryan Freed wrote:
When called with a non-zero of_node
device_node *of_get_parent(const struct device_node
*node)
+{
+ return NULL;
+}
+
That looks like a proper fix, but I'd like to get Grant or/and Rob's ACK for
it before merging it. Please look at MAINTAINERS and cc them on this thread.
Acked-by: Rob Herring rob.herr...@calxeda.com
On 04/05/2013 01:46 PM, Stephen Warren wrote:
Rob, it might be worth keeping this in a separate branch in linux-next
so you can pull it out if it causes any issues. I've been using these
patches for quite a while now, but there's always opportunity for
surprises on architectures I don't use. I
From: Rob Herring rob.herr...@calxeda.com
Atomic operations are undefined behavior on ARM for device or strongly
ordered memory types. So use write-combine variants for mappings. This
corresponds to normal, non-cacheable memory on ARM. For many other
architectures, this change should not change
From: Rob Herring rob.herr...@calxeda.com
There doesn't appear to be any reason for the overall pstore RAM buffer to
be a power of 2 size, so remove it. The individual console, ftrace and oops
buffers are still a power of 2 size.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Anton
From: Rob Herring rob.herr...@calxeda.com
For persistent RAM outside of main memory, the memory may have limitations
on supported accesses. For internal RAM on highbank platform exclusive
accesses are not supported and will hang the system. So atomic_cmpxchg
cannot be used. This commit uses
this common code to a common place.
Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
One comment below. Otherwise,
Reviewed-by: Rob Herring rob.herr...@calxeda.com
You need also need acks from Ben and Michal.
[...]
+ /* Act based
On 04/09/2013 10:53 PM, Colin Cross wrote:
On Tue, Apr 9, 2013 at 8:08 PM, Rob Herring robherri...@gmail.com wrote:
From: Rob Herring rob.herr...@calxeda.com
Atomic operations are undefined behavior on ARM for device or strongly
ordered memory types. So use write-combine variants for mappings
On 04/09/2013 11:10 PM, Colin Cross wrote:
On Tue, Apr 9, 2013 at 8:08 PM, Rob Herring robherri...@gmail.com wrote:
From: Rob Herring rob.herr...@calxeda.com
For persistent RAM outside of main memory, the memory may have limitations
on supported accesses. For internal RAM on highbank platform
-by: Rob Herring rob.herr...@calxeda.com
drivers/of/address.c | 63 +
drivers/of/of_pci.c| 112
include/linux/of_address.h | 42
3 files changed, 145 insertions(+), 72 deletions(-)
diff
On 04/10/2013 02:29 AM, Andrew Murray wrote:
This patch converts the pci_load_of_ranges function to use the new common
of_pci_range_parser.
Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
Reviewed-by: Rob Herring rob.herr...@calxeda.com
On 04/11/2013 03:25 AM, Olof Johansson wrote:
On Mon, Apr 08, 2013 at 12:05:17PM +0100, Stefano Stabellini wrote:
Arnd, Olof,
do you have any thoughts on this series?
Would you be happy to carry it in the arm-soc tree?
The last patch, xen/arm: introduce xen_early_init, use PSCI on xen has
a
On 04/12/2013 03:57 AM, Will Deacon wrote:
On Thu, Apr 11, 2013 at 09:16:57PM +0100, Rob Herring wrote:
On 04/11/2013 03:25 AM, Olof Johansson wrote:
On Mon, Apr 08, 2013 at 12:05:17PM +0100, Stefano Stabellini wrote:
Arnd, Olof,
do you have any thoughts on this series?
Would you be happy
On 03/28/2013 10:39 AM, Nicolas Pitre wrote:
On Thu, 28 Mar 2013, Rob Herring wrote:
On 03/28/2013 09:51 AM, Nicolas Pitre wrote:
On Thu, 28 Mar 2013, Stefano Stabellini wrote:
- the interface to bring up secondary cpus is different and based on
PSCI, in fact Xen is going to add a PSCI
On 03/28/2013 09:51 AM, Russell King - ARM Linux wrote:
On Thu, Mar 28, 2013 at 09:48:18AM -0500, Rob Herring wrote:
On 03/28/2013 04:41 AM, Maxime Ripard wrote:
+ if (machine_desc-init_irq)
+ machine_desc-init_irq();
+ else
+ irqchip_init();
There needs
From: Rob Herring rob.herr...@calxeda.com
If skb allocation for the rx ring fails repeatedly, we can reach a point
were the ring is empty. In this condition, the driver is out of sync with
the h/w. While this has always been possible, the removal of the skb
recycling seems to have made triggering
From: Rob Herring rob.herr...@calxeda.com
WOL is broken because the magic packet status bit is getting set rather
than the enable bit. The PMT interrupt is not getting serviced because
the PMT interrupt is also enabled on the global interrupt, but not
cleared by the global interrupt
1 - 100 of 25282 matches
Mail list logo
