On Wed, Jul 30, 2014 at 11:24:37AM +0530, Pramod Gurav wrote:
From: Pramod Gurav pramod.gu...@smartplayin.com
Input device must be released(input_free_device) when ads7846_probe_dt
fails. This fixes the same by releasing resources on failure.
CC: Dmitry Torokhov dmitry.torok...@gmail.com
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Reported-by Doug Anderson diand...@chromium.org
Suggested-by: Jaehoon Chung jh80.ch...@samsung.com
Suggested-by:
label symbols are missing because elf_sec__is_a() fails
to find the section because the section strings do not
match the section headers because the sections headers
are from the 'runtime' object and the sections strings
are from the 'symbol source' object.
Fix by getting the section strings from
Add an option to cause a selected event
to be opened always without a pid when
configured by perf_evsel__config().
This is needed when using the sched_switch
tracepoint to follow object code execution.
sched_switch occurs before the task
switch and so it cannot record it in a
context limited to
This enables a PMU event to be specified in the form:
pmu//
which is effectively the same as:
pmu/config=0/
This patch is a precursor to defining
default config for a PMU.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/parse-events.c | 6 ++
Add a function to change which event is used
to track mmap, comm and task events.
This is needed with Instruction Tracing
because the Instruction Tracing event
must come first but cannot be used for
tracking because it will be disabled
under some circumstances.
Signed-off-by: Adrian Hunter
Add a function to determine if an address is in
the kernel. This is based on the kernel function
kernel_ip().
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/event.c | 6 +++---
tools/perf/util/machine.c | 23 +++
tools/perf/util/machine.h | 17
This allows default config terms to be provided
for a PMU. So, for example, when the Intel PT
PMU is added, it will be possible to specify:
intel_pt//
which will be the same as:
intel_pt/tsc=1,noretcomp=0/
meaning that the trace should contain
TSC timestamps and perform 'return
perf list only lists PMUs with events. Add a
flag to cause a PMU to be also listed separately.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/pmu.c | 13 +++--
tools/perf/util/pmu.h | 1 +
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git
Decoding an Intel PT trace of the kernel requires
an accurate kernel object image. This is provided
by making a copy of kcore. However the copy needs
to be made under the same conditions as the original
recording, and then it needs to be associated with
the perf.data file. The perf-with-kcore
Add a function to enable a specific event
within a specific perf event buffer.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/evlist.c | 47 +++
tools/perf/util/evlist.h | 2 ++
2 files changed, 49 insertions(+)
diff --git
In order to defer some output via the scripting API,
there needs to be a callback after session processing
but before the session is deleted.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/builtin-script.c| 12
Tracing for a workload begins before the comm event
is seen, which results in the initial comm having a
string of the form :pid (e.g. :12345). In order
to export the correct string, defer the export until
the new script 'flush' callback.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
Add a thread stack for synthesizing call chains from call
and return events.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/Makefile.perf | 2 +
tools/perf/util/event.h| 26 +++
tools/perf/util/thread-stack.c | 151
perf tools copy VDSO out of memory. However, on 64-bit
machines there may be 32-bit compatibility VDOs also. To
copy those requires separate 32-bit executables. This
patch adds to the build additional programs perf-read-vdso32
and perf-read-vdsox32 for 32-bit and x32 respectively.
Add the ability to export detailed information about
paired calls and returns to Python db export and
the export-to-postgresql.py script.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
.../scripts/python/bin/export-to-postgresql-report | 15 ++--
'perf record' post-processes the event stream to create
a list of build-ids for object files for which sample
events have been recorded. That results in those object
files being recorded in the build-id cache.
In the case of VDSO, perf tools reads it from memory
and copies it into a temporary
Add a Python script to export to a postgresql database.
The script requires the Python psycopg2 module. The
caller of the script must be able to create postgresql
databases.
The script takes the database name as a parameter. The
database and database tables are created. Data is written
to flat
The Python script API repeatedly uses the same
lines of code to get and call objects. Make that
into helper functions instead. A side-effect is
that some reference counting bugs disappear because
the new call_object() function always decrements
the reference count of 'retval'.
Signed-off-by:
Enhance the thread stack to output detailed information
about paired calls and returns.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/thread-stack.c | 547 -
tools/perf/util/thread-stack.h | 47
2 files changed, 590
Add flags and insn_len to struct sample. The flags
will be used to export branch type and transaction
status. insn_len is preparation for pairing calls
and returns because the return address equals the
call address plus the instruction length (insn_len).
Signed-off-by: Adrian Hunter
Make it possible for the database export API to use the
enhanced thread stack and export detailed information
about paired calls and returns.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/db-export.c | 52 -
Add branch_type and in_tx to Python db export and
the export-to-postgresql.py script.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/scripts/python/export-to-postgresql.py | 32 ++
.../util/scripting-engines/trace-event-python.c| 30
This patch introduces an abstraction for exporting sample
data in a database-friendly way. The abstraction does not
implement the actual output. A subsequent patch takes this
facility into use for extending the script interface.
The abstraction is needed because static data like symbols,
dsos,
perf script was not displaying callchains if any selected
event did not have PERF_SAMPLE_CALLCHAIN. Change this to
disable callchains only if all selected events do not have
PERF_SAMPLE_CALLCHAIN.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/builtin-script.c | 17
Add a function to peek at other events in the
event stream.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/session.c | 55 +++
tools/perf/util/session.h | 5 +
2 files changed, 60 insertions(+)
diff --git
Use the new db_export facility to export data in a
database-friendly way.
A Python script selects the db_export mode by setting
a global variable 'perf_db_export_mode' to True. The
script then optionally implements functions to receive
table rows. The functions are:
evsel_table
- this fixes sparse warning for directly deferencing user space buffer
./lustre/ldlm/ldlm_resource.c:202:35: warning: incorrect type in argument 2
(different address spaces)
./lustre/ldlm/ldlm_resource.c:202:35:expected void const [noderef]
asn:1*from
./lustre/ldlm/ldlm_resource.c:202:35:
Add a function to deliver synthesized events from
within a session.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/session.c | 14 ++
tools/perf/util/session.h | 5 +
2 files changed, 19 insertions(+)
diff --git a/tools/perf/util/session.c
Add an index of the event identifiers.
This is needed to queue Instruction
Trace samples according to the mmap
buffer from which they were recorded.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/builtin-inject.c | 1 +
tools/perf/util/event.c | 1 +
Add a function to scan a sysfs file within the pmu device
directory.
This will be used to read capability values from the PMU
'caps' subdirectory.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/pmu.c | 37 +
tools/perf/util/pmu.h |
Hi
Here is the next selection of patches based on tip/perf/core.
They can also be found here:
http://git.infradead.org/users/ahunter/linux-perf.git/shortlog/refs/heads/for-acme
Adrian Hunter (31):
perf tools: Identify which comms are from exec
perf tools: Add
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/comm.c| 7 +--
tools/perf/util/comm.h| 6 --
tools/perf/util/machine.c | 4 +++-
tools/perf/util/thread.c | 24 +++-
tools/perf/util/thread.h | 10 +-
5 files changed, 40
Add machine__thread_exec_comm() to return the comm
that matches the last exec, if the comm_exec flag
is present, or the last comm otherwise.
Signed-off-by: Adrian Hunter adrian.hun...@intel.com
---
tools/perf/util/machine.c | 26 ++
tools/perf/util/machine.h | 4
Marek Vasut wrote:
On Wednesday, July 23, 2014 at 02:15:02 PM, Lothar Waßmann wrote:
Hi,
Varka Bhadram wrote:
On 07/23/2014 04:41 PM, Yao Yuan wrote:
Hi,
Thanks for your review.
Lothar Waßmann wrote:
Yuan Yao wrote:
Add dma support for i2c. This function
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/31/2014 01:04 AM, Aaron Lu wrote:
On Wed, Jul 30, 2014 at 10:25:03AM -0400, Rik van Riel wrote:
On 07/29/2014 10:14 PM, Aaron Lu wrote:
On Tue, Jul 29, 2014 at 04:04:37PM -0400, Rik van Riel wrote:
On Tue, 29 Jul 2014 10:17:12 +0200 Peter
__kmap_atomic_idx is per_cpu variable. Each CPU can
use KM_TYPE_NR entries from FIXMAP i.e. from 0 to
KM_TYPE_NR - 1. Allowing __kmap_atomic_idx to over-
shoot to KM_TYPE_NR can mess up with next CPU's 0th
entry which is a bug. Hence BUG_ON if
__kmap_atomic_idx = KM_TYPE_NR.
Signed-off-by:
This patch fixes wrong coding style.
Signed-off-by: Jaegeuk Kim jaeg...@kernel.org
---
fs/f2fs/f2fs.h | 2 +-
fs/f2fs/file.c | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 14b9f74..80c7869 100644
--- a/fs/f2fs/f2fs.h
+++
* Felipe Balbi ba...@ti.com [140730 09:23]:
Hi,
On Wed, Jul 30, 2014 at 10:45:41AM -0500, Nishanth Menon wrote:
On Wed, Jul 30, 2014 at 9:40 AM, Felipe Balbi ba...@ti.com wrote:
HI,
On Tue, Jul 29, 2014 at 11:04:21PM -0700, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [140729
Hi all,
Today's linux-next merge of the kvm-arm tree got a conflict in
virt/kvm/arm/vgic.c between commit 63afbe7a0ac1 (kvm: arm64: vgic: fix
hyp panic with 64k pages on juno platform) from Linus' tree and commit
8f186d522c69 (KVM: ARM: vgic: split GICv2 backend from the main vgic
code) and
On 07/31/2014 01:42 AM, Mike Turquette wrote:
Quoting Tero Kristo (2014-07-30 05:27:07)
On 07/30/2014 08:53 AM, Peter Ujfalusi wrote:
On 07/29/2014 07:12 PM, Mike Turquette wrote:
Oh yea, seems this got lost into the myriad of branches I have. I can push
this on top of my for-v3.17/ti-clk-drv
Add cadence-wdt bindings documentation.
Signed-off-by: Harini Katakam hari...@xilinx.com
---
v4 changes:
- Change name of property reset to reset-on-timeout.
- Use cdns compatible string in example.
- Improve description of clocks and interrupts.
v3 changes:
- Change reset property type and
Add Cadence WDT driver. This is used by Xilinx Zynq.
Signed-off-by: Harini Katakam hari...@xilinx.com
---
v4 changes:
- Change name of property reset to reset-on-timeout.
v3 changes:
- Make rst a boolean and use of_property_read_boolean.
- Use only cdns compatible string. If customization is
On Thu, 31 Jul 2014 13:04:54 +0800
Aaron Lu aaron...@intel.com wrote:
On Wed, Jul 30, 2014 at 10:25:03AM -0400, Rik van Riel wrote:
On 07/29/2014 10:14 PM, Aaron Lu wrote:
+#define NUMA_SCALE 1024
+#define NUMA_MOVE_THRESH (5 * NUMA_SCALE / 100)
It would be good to see if changing
On Thu, Jul 31, 2014 at 01:31:46PM +0800, Chao Yu wrote:
Hi Changman,
-Original Message-
From: Changman Lee [mailto:cm224@samsung.com]
Sent: Thursday, July 31, 2014 10:07 AM
To: Chao Yu
Cc: 'Jaegeuk Kim'; linux-fsde...@vger.kernel.org;
linux-kernel@vger.kernel.org;
From: Andi Kleen a...@linux.intel.com
Time stamps are always implicitely enabled for record currently.
The old --time/-T option is a nop.
Allow the user to disable timestamps by using --no-time
This can cause some minor misaccounting (by missing mmaps), but significantly
lowers the size of
Currently the PEBS buffer size is 4k, it only can hold about 21
PEBS records. This patch enlarges the PEBS buffer size to 64k
(the same as BTS buffer), 64k memory can hold about 330 PEBS
records. This will significantly the reduce number of PMI when
large PEBS interrupt threshold is used.
This patch series implements large PEBS interrupt threshold. For some
limited cases, it can significantly reduce the sample overhead. Please
read patch 6's commit message for more information.
changes since v1:
- drop patch 'perf, core: Add all PMUs to pmu_idr'
- add comments for case that
PEBS always had the capability to log samples to its buffers without
an interrupt. Traditionally perf has not used this but always set the
PEBS threshold to one.
For frequently occuring events (like cycles or branches or load/stores)
this in term requires using a relatively high sampling period
Flush the PEBS buffer during context switch if PEBS interrupt threshold
is larger than one. This allows perf to supply TID for sample outputs.
Signed-off-by: Yan, Zheng zheng.z@intel.com
---
arch/x86/kernel/cpu/perf_event.h | 3 +++
arch/x86/kernel/cpu/perf_event_intel.c | 11
When a fixed period is specified, this patch make perf use the PEBS
auto reload mechanism. This makes normal profiling faster, because
it avoids one costly MSR write in the PMI handler.
Signef-off-by: Yan, Zheng zheng.z@intel.com
---
arch/x86/kernel/cpu/perf_event.c | 15
move codes that setup PEBS sample data to separate function
Signed-off-by: Yan, Zheng zheng.z@intel.com
---
arch/x86/kernel/cpu/perf_event_intel_ds.c | 63 ++-
1 file changed, 36 insertions(+), 27 deletions(-)
diff --git
When PEBS interrupt threshold is larger than one, the PEBS buffer
may include mutiple records for each PEBS event. This patch makes
the code first count how many records each PEBS event has, then
output the samples in batch.
One corner case needs to mention is that the PEBS hardware doesn't
deal
Previous commit introduces context switch callback, its function
overlaps with the flush branch stack callback. So we can use the
context switch callback to flush LBR stack.
This patch adds code that uses the flush branch callback to
flush the LBR stack when task is being scheduled in. The
The callback is invoked when process is scheduled in or out.
It provides mechanism for later patches to save/store the LBR
stack. For the schedule in case, the callback is invoked at
the same place that flush branch stack callback is invoked.
So it also can replace the flush branch stack callback.
Hi Ben, Goffredo,
On Thu, 31 Jul 2014 11:27:00 +1000, Benjamin Herrenschmidt wrote:
On Wed, 2014-07-30 at 22:50 +0200, Goffredo Baroncelli wrote:
I am writing to you Jean and Benjamin because it seem that both
worked on these items.
On a PowerMac G4 I noticed that between the kernel
On Wed, Jul 30, 2014 at 02:02:32PM -0700, Randy Dunlap wrote:
On 07/30/14 13:41, Davidlohr Bueso wrote:
Specifically:
Documentation/locking/lockdep-design.txt
Documentation/locking/lockstat.txt
Documentation/locking/mutex-design.txt
Documentation/locking/rt-mutex-design.txt
Since commit b5660ba76b41 (x86, platforms: Remove NUMAQ) removed NUMAQ,
the x86_32_numa_cpu_node() apic callback has been obsolete. Remove it.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/include/asm/apic.h | 8
arch/x86/kernel/apic/apic.c | 11 ---
2 files
The trampoline_phys_{high,low} members of struct apic are always
initialized to DEFAULT_TRAMPOLINE_PHYS_HIGH and TRAMPOLINE_PHYS_LOW,
respectively. Hardwire the constants and remove the unneeded members.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/include/asm/apic.h
The check_apicid_present() apic callback is never called, so remove it
and functions that implement it.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/include/asm/apic.h | 6 --
arch/x86/kernel/apic/apic_flat_64.c | 2 --
arch/x86/kernel/apic/apic_noop.c | 6
noop_check_apicid_used() has the same implementation as
default_check_apicid_used() in the standard header file, so replace the
former with the latter.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/kernel/apic/apic_noop.c | 7 +--
1 file changed, 1 insertion(+), 6
Since commit b5660ba76b41 (x86, platforms: Remove NUMAQ) removed NUMAQ,
the smp_callin_clear_local_apic() apic callback has been obsolete.
Remove it.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/include/asm/apic.h | 1 -
arch/x86/kernel/apic/apic_flat_64.c | 2 --
Since commit b5660ba76b41 (x86, platforms: Remove NUMAQ) removed NUMAQ,
the setup_portio_remap() apic callback has been obsolete. Remove it.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/include/asm/apic.h | 1 -
arch/x86/kernel/apic/apic_flat_64.c | 2 --
The enable_apic_mode() apic callback is never called, so remove it.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/include/asm/apic.h | 1 -
arch/x86/kernel/apic/apic.c | 2 --
arch/x86/kernel/apic/apic_flat_64.c | 2 --
arch/x86/kernel/apic/apic_noop.c
Hi,
On Thu, Jul 24, 2014 at 09:00:16PM +0800, Hanjun Guo wrote:
+/*
+ * In ACPI mode, the cpu possible map was enumerated before SMP
+ * initialization when MADT table was parsed, so we can get the
+ * possible map here to initialize CPUs.
+ */
The DT smp init will warn if the kernel has
On Thu, Jul 31, 2014 at 02:22:55AM -0400, Rik van Riel wrote:
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Hash: SHA1
On 07/31/2014 01:04 AM, Aaron Lu wrote:
On Wed, Jul 30, 2014 at 10:25:03AM -0400, Rik van Riel wrote:
On 07/29/2014 10:14 PM, Aaron Lu wrote:
On Tue, Jul 29, 2014 at 04:04:37PM
Since commit b5660ba76b41 (x86, platforms: Remove NUMAQ) removed NUMAQ,
the mps_oem_check() apic callback has been obsolete. Remove it.
This allows generic_mps_oem_check() to be removed as well.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/include/asm/apic.h | 7
Since commit b5660ba76b41 (x86, platforms: Remove NUMAQ) removed NUMAQ,
the multi_timer_check() apic callback has been obsolete. Remove it.
Signed-off-by: David Rientjes rient...@google.com
---
arch/x86/include/asm/apic.h | 1 -
arch/x86/kernel/apic/apic_flat_64.c | 2 --
Hi Ingo, Peter, and Thomas,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/rientjes/linux.git x86/apic
# HEAD: c11645f83e72cbfcf1841a3a821123f3254b9922 x86, apic: Remove
enable_apic_mode callback
or apply individually. This branch is based on x86/apic.
Now that I've
Hi Fengguang,
Reproduced with your config and script. Working on locating the cause...
Thanks,
-Artem
-Original Message-
From: Fengguang Wu [mailto:fengguang...@intel.com]
Sent: Wednesday, July 30, 2014 7:08 AM
To: Artem Fetishev
Cc: Jet Chen; Su Tao; Yuanhan Liu; LKP;
On Thu, 31 Jul 2014, Chintan Pandya wrote:
__kmap_atomic_idx is per_cpu variable. Each CPU can
use KM_TYPE_NR entries from FIXMAP i.e. from 0 to
KM_TYPE_NR - 1. Allowing __kmap_atomic_idx to over-
shoot to KM_TYPE_NR can mess up with next CPU's 0th
entry which is a bug. Hence BUG_ON if
Hi Punnaiah,
I haven't looked too closely at everything here, but a few comments:
On Mon, Jul 28, 2014 at 09:01:39PM +0530, Punnaiah Choudary Kalluri wrote:
Added ONDIE ECC support. Currently this ecc mode is supported for
specific micron parts with oob size 64 bytes.
Signed-off-by:
Hi Goffredo,
For next time: please give each individual patch an appropriate
subject. Otherwise it is difficult to keep track of what each patch
does exactly.
On Wed, 30 Jul 2014 22:50:57 +0200, Goffredo Baroncelli wrote:
Add the log_temp and verbose module parameters.
I think this is a good
Hi Greg,
Today's linux-next merge of the driver-core tree got a conflict in
lib/Kconfig.debug between commit e704f93af5a0 (kernel: time: Add
udelay_test module to validate udelay) from the tip tree and commit
0a8adf584759 (test: add firmware_class loader test) from the
driver-core tree.
I fixed
On Thursday, July 31, 2014 10:06 AM, Kever Yang wrote:
Some devices with A female host port and without use of usb_id pin
will need this for the otg controller works as device role
during firmware period and works as host role in rich os.
Hi Kever Yang,
This commit message looks too
This patch introduces the use of devm_ioremap_resource instead of
devm_request_mem_region and devm_ioremap. The error handling on the
platform_get_resource is done way with. The size and start fields in the
octeon_mgmt are no longer needed. So they are removed and there
initialization skipped.
* Yan, Zheng zheng.z@intel.com wrote:
This patch series implements large PEBS interrupt threshold. For some
limited cases, it can significantly reduce the sample overhead. Please
read patch 6's commit message for more information.
changes since v1:
- drop patch 'perf, core: Add all
Hi,
On Mon, Jul 28, 2014 at 08:57:15PM +0530, Punnaiah Choudary Kalluri wrote:
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v4:
- none
Changes in v3:
- none
Changes in v2:
- modified
On 07/31/2014 03:16 PM, Ingo Molnar wrote:
* Yan, Zheng zheng.z@intel.com wrote:
This patch series implements large PEBS interrupt threshold. For some
limited cases, it can significantly reduce the sample overhead. Please
read patch 6's commit message for more information.
changes
* Johannes Weiner han...@cmpxchg.org wrote:
Maintainers often repeat the same feedback on poorly written
changelogs - describe the problem, justify your changes, quantify
optimizations, describe user-visible changes - but our documentation
on writing changelogs doesn't include these things.
On Thu, Jul 31, 2014 at 12:06:43AM -0700, Brian Norris wrote:
On Mon, Jul 28, 2014 at 09:01:39PM +0530, Punnaiah Choudary Kalluri wrote:
+/* Generic flash bbt decriptors */
+static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' };
+static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' };
+
I'm getting weird soft lockups while reading smaps on loaded systems with
some background cgroups usage. This issue can be reproduced with the most
recent kernel.
Here's the stack trace:
[ 1748.312052] BUG: soft lockup - CPU#6 stuck for 23s! [python2.7:1857]
[ 1748.312052] Modules linked in: xfs
* Yan, Zheng zheng.z@intel.com wrote:
On 07/31/2014 03:16 PM, Ingo Molnar wrote:
* Yan, Zheng zheng.z@intel.com wrote:
This patch series implements large PEBS interrupt threshold. For some
limited cases, it can significantly reduce the sample overhead. Please
read patch
On Thu, 31 Jul 2014, Stephen Rothwell wrote:
On Wed, 30 Jul 2014 08:12:54 +0100 Lee Jones lee.jo...@linaro.org wrote:
I noticed commit 71e297b17bb6 (MAINTAINERS: Update MFD repo location)
in the mfd-lj tree today. In linux-next, I have the following mfd
trees:
On Thu, Jul 31, 2014 at 01:31:30AM +0300, Kirill A. Shutemov wrote:
...
*cringe*
I don't like it. That really should be a responsiblity of specific
-show();
I'm going to take that mutex, bugger off if we are in execve() makes a lot
more sense than having e.g. seq_read() care of
OK, so no feedback on the 'pending' discussions we had wrt PEBS record
generation?
No feedback on the correctness aspects of the overflow crap?
Just a new series, which I then have to dig through to figure out wtf
changed?
A quick look at patch 6 reads like you still don't understand the
On 07/31/2014 08:39 AM, Paul E. McKenney wrote:
From: Paul E. McKenney paul...@linux.vnet.ibm.com
This commit adds a new RCU-tasks flavor of RCU, which provides
call_rcu_tasks(). This RCU flavor's quiescent states are voluntary
context switch (not preemption!), userspace execution, and the
On 07/28/2014 02:52 PM, Peter Zijlstra wrote:
On Mon, Jul 28, 2014 at 10:24:30AM +0800, Yan, Zheng wrote:
I don't think this method works for interrupt threshold 1 case. When
collision
happens, the hardware only create one PEBS record. The status in next record
has
nothing to do with
On 07/31/2014 03:27 PM, Peter Zijlstra wrote:
OK, so no feedback on the 'pending' discussions we had wrt PEBS record
generation?
No feedback on the correctness aspects of the overflow crap?
Just a new series, which I then have to dig through to figure out wtf
changed?
A quick look
On Wed, 2014-07-30 at 07:23 -0700, Paul E. McKenney wrote:
So the delta accounting is much of the pain. Hmmm...
(overhead picture was incomplete, just fixing that...)
executive summary:
nohz_full=NA cpu=3 604.2 KHz 1.000
nohz_full=3, cpu=3 303.5 KHz .502
nohz_full=3, cpu=2
On Wed, 2014-07-30 at 22:32 +0200, Rickard Strandqvist wrote:
Possible error if incorrect in parameter, count = 0.
And clarified what the code actually does significantly.
Signed-off-by: Rickard Strandqvist rickard_strandqv...@spectrumdigital.se
---
drivers/s390/net/claw.c | 24
On Thu, 31 Jul 2014, Aleksei Besogonov wrote:
I'm getting weird soft lockups while reading smaps on loaded systems with
some background cgroups usage. This issue can be reproduced with the most
recent kernel.
Here's the stack trace:
[ 1748.312052] BUG: soft lockup - CPU#6 stuck for 23s!
Hi John,
Here's one more (hopefully last) pull request for 3.17.
We've got:
- 6lowpan fixes/cleanups
- A couple crash fixes, one for the Marvell HCI driver and another in LE SMP.
- Fix for an incorrect connected state check
- Fix for the bondable requirement during pairing (an issue which had
Hi Vinod,
On Wed, Jul 30, 2014 at 09:36:07PM +0530, Vinod Koul wrote:
On Wed, Jul 30, 2014 at 06:03:13PM +0200, Maxime Ripard wrote:
The dmaengine is neither trivial nor properly documented at the moment,
which
means a lot of trial and error development, which is not that good for such
On Thu, Jul 31, 2014 at 03:36:26PM +0800, Yan, Zheng wrote:
On 07/31/2014 03:27 PM, Peter Zijlstra wrote:
OK, so no feedback on the 'pending' discussions we had wrt PEBS record
generation?
No feedback on the correctness aspects of the overflow crap?
Just a new series, which I
- this fixes sparse warning for directly deferencing user space buffer
drivers/staging/lustre/lustre/ptlrpc/lproc_ptlrpc.c:652:33: warning: incorrect
type in argument 2 (different address spaces)
drivers/staging/lustre/lustre/ptlrpc/lproc_ptlrpc.c:652:33:expected void
const [noderef]
It is a regression that I have introduce with universal plane.
I have fix it and refresh v8 branch.
I have map CRTC on hardware mixers IP.
I could have one or two mixers, its depends of the chipset and I use
one graphic input (GDP) per mixer as primary plane.
Other GPD are used as overlay planes.
On 07/30/2014 09:56 PM, Fengguang Wu wrote:
Hi Christoph,
FYI, this commit seems to convert some kernel boot hang bug into
different BUG messages.
git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu.git
for-3.17-consistent-ops
commit 9b0c63851edaf54e909475fe2a0946f57810e98a
Author:
On 07/31/2014 09:28 AM, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [140730 09:23]:
Hi,
On Wed, Jul 30, 2014 at 10:45:41AM -0500, Nishanth Menon wrote:
On Wed, Jul 30, 2014 at 9:40 AM, Felipe Balbi ba...@ti.com wrote:
HI,
On Tue, Jul 29, 2014 at 11:04:21PM -0700, Tony Lindgren wrote:
Hi Rafael,
The warning is still there, though the detail info is a bit different.
[ 389.589955] ==
[ 389.590064] [ INFO: possible circular locking dependency detected ]
[ 389.590064] 3.16.0-rc7+ #119 Not tainted
[ 389.590064]
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