Re: [PATCH v7 4/8] arm64: parse cpu capacity-dmips-mhz from DT

Hi Juri, On 5 September 2016 at 16:22, Juri Lelli wrote: > With the introduction of cpu capacity-dmips-mhz bindings, CPU capacities > can now be calculated from values extracted from DT and information > coming from cpufreq. Add parsing of DT information at boot time, and >

Re: [PATCH v7 2/8] arm: parse cpu capacity-dmips-mhz from DT

Hi Juri, On 5 September 2016 at 16:22, Juri Lelli wrote: > With the introduction of cpu capacity-dmips-mhz bindings, CPU capacities > can now be calculated from values extracted from DT and information > coming from cpufreq. Add parsing of DT information at boot time, and >

[PATCH 1/3] Documentation: devicetree: add qca8k binding

Add device-tree binding for ar8xxx switch families. Cc: devicet...@vger.kernel.org Signed-off-by: John Crispin --- .../devicetree/bindings/net/dsa/qca8k.txt | 53 1 file changed, 53 insertions(+) create mode 100644

Re: [PATCH 1/5] staging: ks7010: Fix coding style warning in ks7010_sdio.c

On Sat, Sep 03, 2016 at 10:35:48PM +0530, Sabitha George wrote: > This patch fixes the coding style warning ' braces {} are not > necessary for single statement blocks' found by checkpatch.pl > > Signed-off-by: Sabitha George > --- >

[PATCHv2 3/3] tty/serial: at91: fix hardware handshake on SAM9x5 (without GPIOs)

Commit 1cf6e8fc8341 ("tty/serial: at91: fix RTS line management when hardware handshake is enabled") broke the hardware handshake on SAM9x5 platforms. On Atmel platforms, the USART can only handle the handware handshake (ATMEL_US_USMODE_HWHS) if FIFOs or PDC are used. Thus, ATMEL_US_USMODE_HWHS

[PATCHv2 0/3] Fix handware handshake on SAM9x5 platforms

Since commit 1cf6e8fc8341 ("tty/serial: at91: fix RTS line management when hardware handshake is enabled"), hardware handshake is not working anymore on SAM9x5 platforms. The first two patches fix the hardware handshake when CTS/RTS pins are handle by GPIOs. The last patch fixes hardware

Re: [PATCH] autofs - use dentry flags to block walks during expire

On Mon, 12 Sep 2016 03:40:17 +0200, Ian Kent wrote: > > Somewhere along the way the autofs expire operation has changed to > hold a spin lock over expired dentry selection. The autofs indirect > mount expired dentry selection is complicated and quite lengthy so > it isn't appropriate to hold a

[PATCH] staging: emxx_udc: Remove unnecessary blank line

This patch fixes the checkpatch.pl warning: Blank lines aren't necessary before a close brace '}' Signed-off-by: Rehas Sachdeva --- drivers/staging/emxx_udc/emxx_udc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/emxx_udc/emxx_udc.c

Re: [PATCH v7 9/9] drm/mediatek: add support for Mediatek SoC MT2701

Hi CK, On Wed, 2016-09-07 at 13:37 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > This patch add support for the Mediatek MT2701 DISP subsystem. > > There is only one OVL engine in MT2701. > > > > Signed-off-by: YT Shen > >

Re: [PATCH v7 4/9] drm/mediatek: update display module connections

Hi CK, On Tue, 2016-09-06 at 15:39 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > update connections for OVL, RDMA, BLS, DSI > > > > Signed-off-by: YT Shen > > --- > > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 25

[PATCH] arm-cci: add cci_enable_port_for_self() declaration in arm-cci.h

We get 1 warning when building kernel with W=1: drivers/bus/arm-cci.c:2027:25: warning: no previous prototype for 'cci_enable_port_for_self' [-Wmissing-prototypes] In fact, this function is used in a few files, but should be declared in a header file. So this patch adds the declaration in

Re: [PATCH] openrisc: remove the redundant of_platform_populate

On Tue, 30 Aug 2016, Rob Herring wrote: The of_platform_populate call in the openrisc arch code is now redundant as the DT core provides a default call. Openrisc has a NULL match table which means only top level nodes with compatible strings will have devices creates. The default version will

Re: [PATCH] pinctrl: Add SX150X GPIO Extender Pinctrl Driver

Hi Peter, On 09/12/2016 12:17 PM, Peter Rosin wrote: > Hi! > > Sorry for the delay, other stuff interfered... Who hasn't ? > > As I stated previously, we have an sx1502, and this seems /almost/ good. > Comments inline. > > On 2016-09-06 14:56, Neil Armstrong wrote: [..] >> +++

[PATCH 3/3] net-next: dsa: add new driver for qca8xxx family

This patch contains initial support for the QCA8337 switch. It will detect a QCA8337 switch, if present and declared in the DT. Each port will be represented through a standalone net_device interface, as for other DSA switches. CPU can communicate with any of the ports by setting an IP@ on ethN

[PATCH 0/3] net-next: dsa: add QCA8K support

This series is based on the AR8xxx series posted by Matthieu Olivari in may 2015. The following changes were made since then * fixed the nitpicks from the previous review * updated to latest API * turned it into an mdio device * added callbacks for fdb, bridge offloading, stp, eee, port status *

[PATCH 2/3] net-next: dsa: add Qualcomm tag RX/TX handler

Add support for the 2-bytes Qualcomm tag that gigabit switches such as the QCA8337/N might insert when receiving packets, or that we need to insert while targeting specific switch ports. The tag is inserted directly behind the ethernet header. Signed-off-by: John Crispin ---

[PATCH] [media] pulse8-cec: avoid uninitialized data use

Building with -Wmaybe-uninitialized reveals the use on an uninitialized variable containing the physical address of the device whenever firmware before version 2 is used: drivers/staging/media/pulse8-cec/pulse8-cec.c: In function 'pulse8_connect':

RE: [patch v1] x86/platform/mellanox: introduce support for Mellanox systems platform

> -Original Message- > From: Greg KH [mailto:gre...@linuxfoundation.org] > Sent: Monday, September 12, 2016 11:35 AM > To: Vadim Pasternak > Cc: t...@linutronix.de; mi...@redhat.com; h...@zytor.com; > da...@davemloft.net; ge...@linux-m68k.org;

Re: [PATCH v2] gpio/gpiolib: Forbid irqchip default trigger if probed over DT

On Thu, Sep 8, 2016 at 7:13 PM, Marc Zyngier wrote: > On 07/09/16 23:18, Linus Walleij wrote: >> On Wed, Sep 7, 2016 at 10:12 AM, Marc Zyngier wrote: >> >>> Using a default trigger is a bad idea if using DT to configure >>> interrupts, as the device's

Re: [patch v1] x86/platform/mellanox: introduce support for Mellanox systems platform

On Mon, Sep 12, 2016 at 10:34 AM, Greg KH wrote: >> This is LPC to I2C bridge. > > "LPC"? https://en.wikipedia.org/wiki/Low_Pin_Count "Modern ISA" >> Controller logic is implemented in Lattice CPLD. CPLD itself is attached to >> LPC. > > And how is the CPLD

Re: [PATCH v15.1 3/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

On Fri, Sep 09, 2016 at 09:16:06PM -0700, Chris Zhong wrote: > Add support for cdn DP controller which is embedded in the rk3399 > SoCs. The DP is compliant with DisplayPort Specification, Please don't new patches in reply to old serieses, especially not individual patches in the middle of the

Re: [PATCH v2] cfg80211: Remove deprecated create_singlethread_workqueue

On Wed, 2016-08-31 at 00:35 +0530, Bhaktipriya Shridhar wrote: > The workqueue "cfg80211_wq" is involved in cleanup, scan and event > related > works. It queues multiple work items >event_work, > >dfs_update_channels_wk, > _to_rdev(request->wiphy)->scan_done_wk, >

Re: [PATCH V4] perf tools: adding support for address filters

On 08/09/16 21:25, Mathieu Poirier wrote: > This patch makes it possible to use the current filter > framework with address filters. That way address filters for > HW tracers such as CoreSight and IntelPT can be communicated > to the kernel drivers. > > CC: Alexander Shishkin

[PATCH] atm: iphase: fix newline escape and minor tweak to source formatting

From: Colin Ian King The newline escape is incorrect and needs fixing. Also adjust source formatting / indentation and remove trailing white space. Signed-off-by: Colin Ian King --- drivers/atm/iphase.c | 5 ++--- 1 file changed, 2

[PATCH] pinctrl: qcom: fix masking of pinmux functions

The following commit introduced a regression by not properly masking the calculated value. commit 47a01ee9a6c39fe1 ("pinctrl: qcom: Clear all function selection bits") Signed-off-by: John Crispin --- drivers/pinctrl/qcom/pinctrl-msm.c |2 +- 1 file changed, 1

Re: [GIT PULL 1/4] ARM: exynos: SoC/Mach for v4.9

On 09/08/2016 09:24 PM, Sam Van Den Berge wrote: > Thanks for the suggestion and apologies for the late response. Last couple of > days I've been figuring out what this would involve and I decided that I want > to give this a try. I found this patch series [1] that I'll use as an example. > If I

Re: [PATCH v15.1 3/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

Hi Mark OK, thanks. I will send the whole series next time, hope it will not bother anyone On 09/12/2016 05:13 PM, Mark Brown wrote: On Fri, Sep 09, 2016 at 09:16:06PM -0700, Chris Zhong wrote: Add support for cdn DP controller which is embedded in the rk3399 SoCs. The DP is compliant with

Re: [PATCH] staging/android: mark sync_timeline_create() static

On Mon, Sep 05, 2016 at 08:40:25AM +0800, Baoyou Xie wrote: > > > On 4 September 2016 at 23:41, Sudip Mukherjee > wrote: > > On Sat, Sep 03, 2016 at 02:34:13PM +0800, Baoyou Xie wrote: > > We get 1 warning when building kernel with W=1: > >

[PATCH] add Advantech cpci-1502 hard disk swap button driver

>Thanks for the patch, but can you resend it with a Signed-off-by: line, as >described by Documentation/SubmittingPatches? We need that before we can take >anything. >Also, you should run the code through scripts/checkpatch.pl and fix up the >errors it finds. There are still a number of

Re: [PATCH v5 2/3] mfd: add support for Allwinner SoCs ADC

On Mon, 12 Sep 2016, Quentin Schulz wrote: > On 12/09/2016 11:18, Lee Jones wrote: > > On Thu, 08 Sep 2016, Quentin Schulz wrote: > > > [...] [...] > >> +++ b/drivers/mfd/sun4i-gpadc-mfd.c [...] > >> +static struct mfd_cell sun4i_gpadc_mfd_cells[] = { > >> + { > >> + .name =

Re: [PATCH] drivers/edac: NO_IRQ removal from powerpc-only drivers

Arnd Bergmann writes: > On Monday, September 12, 2016 2:47:37 PM CEST Michael Ellerman wrote: >> >> @@ -1058,7 +1058,7 @@ static int mpc85xx_mc_err_probe(struct >> >> platform_device *op) >> >> >> >> pdata = mci->pvt_info; >> >> pdata->name = "mpc85xx_mc_err"; >> >> -

Re: [PATCH v7 6/9] drm/mediatek: add dsi interrupt control

Hi CK, On Wed, 2016-09-07 at 09:39 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > From: shaoming chen > > > > add dsi interrupt control > > > > Signed-off-by: shaoming chen > > --- > >

Re: [PATCH v7 7/9] drm/mediatek: add dsi transfer function

Hi CK, On Wed, 2016-09-07 at 10:33 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > From: shaoming chen > > > > add dsi read/write commands for transfer function > > > > Signed-off-by: shaoming chen

Re: [PATCH v7 8/9] drm/mediatek: update DSI sub driver flow

Hi CK, On Wed, 2016-09-07 at 12:58 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > This patch update enable/disable flow of DSI module and MIPI TX module > > > > Signed-off-by: shaoming chen > > Signed-off-by: YT Shen

[PATCH] arm-cci: add cci_enable_port_for_self() declaration in arm-cci.h

We get 1 warning when building kernel with W=1: drivers/bus/arm-cci.c:2027:25: warning: no previous prototype for 'cci_enable_port_for_self' [-Wmissing-prototypes] In fact, this function is used in a few files, but should be declared in a header file. So this patch adds the declaration in

Re: [PATCH 1/1] USB: serial: usb-serial-simple: add support for another Infineon flashloader

On Fri, Sep 02, 2016 at 10:37:56AM +0200, Daniele Palmas wrote: > This patch adds support for Infineon flashloader 0x8087/0x0801. > > The flashloader is used in Telit LE940B modem family with Telit > flashing application. > > Signed-off-by: Daniele Palmas Now applied, thanks.

Re: [PATCH v7 4/8] arm64: parse cpu capacity-dmips-mhz from DT

Hi, On 12/09/16 10:37, Vincent Guittot wrote: > Hi Juri, > > On 5 September 2016 at 16:22, Juri Lelli wrote: > > With the introduction of cpu capacity-dmips-mhz bindings, CPU capacities > > can now be calculated from values extracted from DT and information > > coming from

Re: [PATCH 23/26] sh_eth: constify local structures

On Sun, 11 Sep 2016, Sergei Shtylyov wrote: > On 09/11/2016 04:06 PM, Julia Lawall wrote: > > For structure types defined in the same file or local header files, find > > top-level static structure declarations that have the following > > properties: > > 1. Never reassigned. > > Really? > > >

Re: [PATCH v7 2/8] arm: parse cpu capacity-dmips-mhz from DT

Hi, On 12/09/16 10:36, Vincent Guittot wrote: > Hi Juri, > > On 5 September 2016 at 16:22, Juri Lelli wrote: > > With the introduction of cpu capacity-dmips-mhz bindings, CPU capacities > > can now be calculated from values extracted from DT and information > > coming from

[PULL] clockevents for 4.9

Hi Thomas, Ingo, This pull request for 4.9 contains a few changes: - Cleanup the atmel-pit timer (Alexander Belloni) - Add the Aspeed support (Joel Stanley) - Replaced setup_irq/request_irq and panic/pr_err on moxart (Daniel Lezcano) - Add the Ox820 compatible string for oxnas (Neil

[PATCH 8/9] clocksource/drivers/timer-atmel-pit: Simplify IRQ handler

From: Alexandre Belloni Because the PIT is also a proper clocksource, the timekeeping code is already able to handle lost ticks. Reported-by: Thomas Gleixner Acked-by: Nicolas Ferre Signed-off-by: Alexandre

[PATCH 5/9] clocksource/drivers/moxart: Replace panic by pr_err

The clksrc-of code is supposed to catch the return code and fail gracefully. Don't panic on error, but print the error and exit with a relevant error code. Signed-off-by: Daniel Lezcano Acked-by: Joel Stanley --- drivers/clocksource/moxart_timer.c |

[PATCH 2/9] clocksource/drivers/moxart: Use struct to hold state

From: Joel Stanley Add a struct moxart_timer to hold the driver state, including the irqaction and struct clock_event_device. Most importantly this holds values for enabling and disabling the timer, so future support can be added for devices that use different bits for

[PATCH 9/9] clocksource/drivers/oxnas: Add OX820 compatible

From: Neil Armstrong In order to support the Oxford Semiconductor OX820 SoC, add new compatible string to rps timer driver. Also add new string in the dt-bindings. Signed-off-by: Neil Armstrong Signed-off-by: Daniel Lezcano

[PATCH] watchdog: rt2880_wdt: Remove assignment of dev pointer

Commit 0254e953537c ("watchdog: Drop pointer to watchdog device from struct watchdog_device") removed the dev pointer from struct watchdog_device, but this driver was still assigning it, leading to a compilation error: drivers/watchdog/rt2880_wdt.c: In function ‘rt288x_wdt_probe’:

Re: [PATCH 23/26] sh_eth: constify local structures

On Sun, 11 Sep 2016, Sergei Shtylyov wrote: > On 09/11/2016 04:06 PM, Julia Lawall wrote: > > For structure types defined in the same file or local header files, find > > top-level static structure declarations that have the following > > properties: > > 1. Never reassigned. > > Really? > > >

Re: [PATCH v5 2/3] mfd: add support for Allwinner SoCs ADC

On 12/09/2016 11:18, Lee Jones wrote: > On Thu, 08 Sep 2016, Quentin Schulz wrote: > [...] >> + To compile this driver as a module, choose M here: the module will be >> + called sun4i-gpadc-mfd. > > Drop the -mfd. > >> config MFD_AS3711 >> bool "AMS AS3711" >> select

Re: [PATCHv2 3/3] tty/serial: at91: fix hardware handshake on SAM9x5 (without GPIOs)

On 12/09/2016 at 11:47:33 +0200, Richard Genoud wrote : > Commit 1cf6e8fc8341 ("tty/serial: at91: fix RTS line management when > hardware handshake is enabled") broke the hardware handshake on SAM9x5 > platforms. > > On Atmel platforms, the USART can only handle the handware handshake >

Re: [PATCH 1/2] shmem: fix tmpfs to handle the huge= option properly

On Fri, Sep 09, 2016 at 04:24:22PM -0600, Toshi Kani wrote: > shmem_get_unmapped_area() checks SHMEM_SB(sb)->huge incorrectly, > which leads to a reversed effect of "huge=" mount option. > > Fix the check in shmem_get_unmapped_area(). > > Note, the default value of SHMEM_SB(sb)->huge remains as

Re: [PATCH 2/6] mfd: sm501: constify gpio_chip structures

On Sun, 11 Sep 2016, Julia Lawall wrote: > These structures are only used to copy into other structures, so declare > them as const. > > The semantic patch that makes this change is as follows: > (http://coccinelle.lip6.fr/) > > // > @r disable optional_qualifier@ > identifier i; > position p;

[PATCH] rpmsg: smd: fix dependency on QCOM_SMD=n

The ARM allmodconfig build broke with the addition of the SMD rpmsg driver that conflicts with the driver its replaces: WARNING: drivers/soc/qcom/smd: 'qcom_smd_register_edge' exported twice. Previous export was in drivers/rpmsg/qcom_smd.ko WARNING: drivers/soc/qcom/smd:

Re: [PATCH v2 4/4] arm64: dts: add Pine64 support

Hi, On 10/09/16 03:33, Chen-Yu Tsai wrote: > Hi, > > On Sat, Sep 10, 2016 at 4:10 AM, Maxime Ripard > wrote: >> From: Andre Przywara >> >> The Pine64 is a cost-efficient development board based on the >> Allwinner A64 SoC. >> There are

Re: [RFC PATCH 1/2] mm, mincore2(): retrieve dax and tlb-size attributes of an address range

On Sun, Sep 11, 2016 at 10:31:35AM -0700, Dan Williams wrote: > As evidenced by this bug report [1], userspace libraries are interested > in whether a mapping is DAX mapped, i.e. no intervening page cache. > Rather than using the ambiguous VM_MIXEDMAP flag in smaps, provide an > explicit "is dax"

Re: [PATCH] staging: lustre: lustre/ldlm: Fixed sparse warnings

On Fri, Sep 09, 2016 at 08:50:35PM +0530, Nayeemahmed Badebade wrote: > Added __acquires / __releases sparse locking annotations > to lock_res_and_lock and unlock_res_and_lock functions in > l_lock.c, to fix below sparse warnings: > > l_lock.c:47:22: warning: context imbalance in

Re: [PATCH] arm-cci: add cci_enable_port_for_self() declaration in arm-cci.h

On 12/09/16 11:33, Baoyou Xie wrote: We get 1 warning when building kernel with W=1: drivers/bus/arm-cci.c:2027:25: warning: no previous prototype for 'cci_enable_port_for_self' [-Wmissing-prototypes] In fact, this function is used in a few files, but should be declared in a header file. So

Re: DAX mapping detection (was: Re: [PATCH] Fix region lost in /proc/self/smaps)

On 09/12/2016 11:44 AM, Rudoff, Andy wrote: Whether msync/fsync can make data persistent depends on ADR feature on memory controller, if it exists everything works well, otherwise, we need to have another interface that is why 'Flush hint table' in ACPI comes in. 'Flush hint table' is

[PATCH V2] cpufreq: create link to policy only for registered CPUs

If a cpufreq driver is registered very early in the boot stage (e.g. registered from postcore_initcall()), then cpufreq core may generate kernel warnings for it. In this case, the CPUs are brought online, then the cpufreq driver is registered, and then the CPU topology devices are registered.

Re: [PATCH v3] usb: dwc3: OCTEON: add support for device tree

"Steven J. Hill" writes: > This patch adds support to parse probe data for > the dwc3-octeon driver using device tree. The > DWC3 IP core is found on OCTEON III processors. > > Signed-off-by: Steven J. Hill > > Changes in v3: > - Massive

Re: [PATCH v3 4/9] ARM: dts: sun8i-h3: Add dt node for the syscon control module

On Fri, Sep 09, 2016 at 02:45:12PM +0200, Corentin Labbe wrote: > This patch add the dt node for the syscon register present on the > Allwinner H3. > > Only two register are present in this syscon and the only one useful is > the one dedicated to EMAC clock. > > Signed-off-by: Corentin Labbe

[PATCH 3/7 v3] sched: factorize PELT update

Every time, we modify load/utilization of sched_entity, we start to sync it with its cfs_rq. This update is done is different ways: -when attaching/detaching a sched_entity, we update cfs_rq and then we sync the entity with the cfs_rq. -when enqueueing/dequeuing the sched_entity, we update both

[PATCH 0/7 v3] sched: reflect sched_entity move into task_group's load

Ensure that the move of a sched_entity will be reflected in load and utilization of the task_group hierarchy. When a sched_entity moves between groups or CPUs, load and utilization of cfs_rq don't reflect the changes immediately but converge to new values. As a result, the metrics are no more

[PATCH 2/7 v3] sched: fix hierarchical order in rq->leaf_cfs_rq_list

Fix the insertion of cfs_rq in rq->leaf_cfs_rq_list to ensure that a child will always be called before its parent. The hierarchical order in shares update list has been introduced by commit 67e86250f8ea ("sched: Introduce hierarchal order on shares update list") With the current implementation

[PATCH 5/7 v3] sched: propagate asynchrous detach

A task can be asynchronously detached from cfs_rq when migrating between CPUs. The load of the migrated task is then removed from source cfs_rq during its next update. We use this event to set propagation flag. During the load balance, we take advanatge of the update of blocked load to we

[PATCH 1/7 v3] sched: factorize attach entity

Factorize post_init_entity_util_avg and part of attach_task_cfs_rq in one function attach_entity_cfs_rq Signed-off-by: Vincent Guittot --- kernel/sched/fair.c | 19 +++ 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/kernel/sched/fair.c

[PATCH] [media] atmel-isc: set the format on the first open

Set the current format on the first open. Signed-off-by: Songjun Wu --- drivers/media/platform/atmel/atmel-isc.c | 30 ++ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc.c

[PATCH 7/7 v3] sched: fix wrong utilization accounting when switching to fair class

When a task switches to fair scheduling class, the period between now and the last update of its utilization is accounted as running time whatever happened during this period. This wrong accounting applies to the task and also to the task group branch. When changing the property of a running task

[PATCH 11/15] x86/mce/AMD: Save MCA_IPID in MCE struct on SMCA systems

From: Yazen Ghannam The MCA_IPID register uniquely identifies a bank's type and instance on Scalable MCA systems. We should save the value of this register in struct mce along with the other relevant error information. This ensures that we can decode errors without relying

[PATCH 15/15] x86/RAS/mce_amd_inj: Fix some W= warnings

From: Borislav Petkov In particular: arch/x86/ras/mce_amd_inj.c: In function ‘prepare_msrs’: arch/x86/ras/mce_amd_inj.c:249:13: warning: declaration of ‘i_mce’ shadows a global declaration [-Wshadow] struct mce i_mce = *(struct mce *)info; ^

[PATCH 12/15] x86/mce, EDAC/mce_amd: Print MCA_SYND and MCA_IPID during MCE on SMCA systems

From: Yazen Ghannam The MCA_SYND and MCA_IPID registers contain valuable information and should be included in MCE output. The MCA_SYND register contains syndrome and other error information, and the MCA_IPID register will uniquely identify the MCA bank's type without

[PATCH 13/15] x86/mce/AMD: Extract the error address on SMCA systems

From: Yazen Ghannam The MCA_ADDR registers on Scalable MCA systems contain the ErrorAddr in bits [55:0] and the least significant bit of the address in bits [61:56]. We should extract the valid ErrorAddr bits from the MCA_ADDR register rather than saving the raw value to

[PATCH 08/15] x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP types

From: Yazen Ghannam Scalable MCA defines a number of IP types. An MCA bank on an SMCA system is defined as one of these IP types. A bank's type is uniquely identified by the combination of the HWID and MCATYPE values read from its MCA_IPID register. Add the required

[PATCH 00/15] x86/RAS queue for 4.9

From: Borislav Petkov Hi guys, here's the RAS pile of patches ready for 4.9. It is mainly Scalable MCA enablement for the upcoming AMD F17h machines. Please apply, thanks. Borislav Petkov (1): x86/RAS/mce_amd_inj: Fix some W= warnings Yazen Ghannam (14): x86/mce/AMD: Use

[PATCH 02/15] x86/mce: Add support for new MCA_SYND register

From: Yazen Ghannam Syndrome information is no longer contained in MCA_STATUS for SMCA systems but in a new register - MCA_SYND. Add a synd field to struct mce to hold MCA_SYND register value. Add it to the end of struct mce to maintain compatibility with old versions of

[PATCH 07/15] EDAC/mce_amd: Use SMCA prefix for error descriptions arrays

From: Yazen Ghannam The error descriptions defined for Fam17h can be reused for other SMCA systems, so their names should reflect this. Change f17h prefix to smca for error descriptions. Signed-off-by: Yazen Ghannam Cc: Tony Luck

[PATCH 10/15] x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on SMCA systems

From: Yazen Ghannam The Deferred Error Interrupt Type is set per bank on Scalable MCA systems. This is done in a bitfield in the MCA_CONFIG register of each bank. We should set its type to APIC-based interrupt and not assume BIOS has set it for us. Signed-off-by: Yazen

[PATCH 09/15] x86/mce/AMD: Update sysfs bank names for SMCA systems

From: Yazen Ghannam Define a bank's sysfs filename based on its IP type and InstanceId. Aravind: * General idea and proto- get_name(). * Define smca_umc_block_names[] and buf_mcatype[]. Signed-off-by: Yazen Ghannam Cc: Aravind Gopalakrishnan

[PATCH 14/15] x86/MCE/AMD, EDAC: Handle reserved bank 4 on Fam17h properly

From: Yazen Ghannam Bank 4 is reserved on family 0x17 and shouldn't generate any MCE records. However, broken hardware and software is not something unheard of so warn about bank 4 errors. They shouldn't be coming from bank 4 naturally but users can still use mce_amd_inj

[PATCH 01/15] x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks()

From: Yazen Ghannam Change MSR_IA32_MCx_MISC() macro to msr_ops.misc() because SMCA machines define a different set of MSRs and msr_ops will give you the correct MISC register. Signed-off-by: Yazen Ghannam Cc: Aravind Gopalakrishnan

Build regressions/improvements in v4.8-rc6

Below is the list of build error/warning regressions/improvements in v4.8-rc6[1] compared to v4.7[2]. Summarized: - build errors: +10/-12 - build warnings: +1237/-938 JFYI, when comparing v4.8-rc6[1] to v4.8-rc5[3], the summaries are: - build errors: +3/-1 - build warnings: +320/-516

RE: [patch v1] x86/platform/mellanox: introduce support for Mellanox systems platform

> -Original Message- > From: Greg KH [mailto:gre...@linuxfoundation.org] > Sent: Monday, September 12, 2016 11:17 AM > To: Vadim Pasternak > Cc: t...@linutronix.de; mi...@redhat.com; h...@zytor.com; > da...@davemloft.net; ge...@linux-m68k.org;

Re: [PATCH v5] i2c: imx: make bus recovery through pinctrl optional

Hi, On Fri, 9 Sep 2016 14:37:12 -0500 Leo Li wrote: > On Fri, Sep 9, 2016 at 11:51 AM, Stefan Agner wrote: > > On 2016-09-08 16:57, Leo Li wrote: [...] > >> people fix problem that they don't really care by deliberately enlarge > >> the problem. That's why we don't panic() on

Re: [PATCH v3 0/3] spi-nor: Add support for Intel SPI serial flash controller

On Tue, Aug 30, 2016 at 11:47:43AM +0100, Lee Jones wrote: > On Tue, 30 Aug 2016, Mika Westerberg wrote: > > > On Tue, Aug 30, 2016 at 10:13:30AM +0100, Lee Jones wrote: > > > On Mon, 29 Aug 2016, Mika Westerberg wrote: > > > > > > > On Mon, Aug 15, 2016 at 10:10:41AM +0300, Mika Westerberg

Re: [PATCH 10/26] tpm: constify local structures

On Sun, 11 Sep 2016, Jarkko Sakkinen wrote: > On Sun, Sep 11, 2016 at 03:05:52PM +0200, Julia Lawall wrote: > > For structure types defined in the same file or local header files, find > > top-level static structure declarations that have the following > > properties: > > 1. Never reassigned. >

Re: [PATCH] drm: msm: mdp4: mark symbols static where possible

On 09/07/2016 04:28 PM, Baoyou Xie wrote: We get 2 warnings when building kernel with W=1: drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c:96:23: warning: no previous prototype for 'get_connector' [-Wmissing-prototypes] drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c:84:5: warning: no previous

Re: [PATCH 00/26] constify local structures

On Sun, 11 Sep 2016, Jarkko Sakkinen wrote: > On Sun, Sep 11, 2016 at 03:05:42PM +0200, Julia Lawall wrote: > > Constify local structures. > > > > The semantic patch that makes this change is as follows: > > (http://coccinelle.lip6.fr/) > > Just my two cents but: > > 1. You *can* use a static

Re: linux-next: manual merge of the kbuild tree with Linus' tree

On 2016-09-12 04:53, Nicholas Piggin wrote: > Question, what is the best way to merge dependent patches? Considering > they will need a good amount of architecture testing, I think they will > have to go via arch trees. But it also does not make sense to merge these > kbuild changes upstream

Re: [PATCH 25/26] pch_gbe: constify local structures

On Sun, 11 Sep 2016, David Miller wrote: > > Julia, I went over the networking driver patches in this series and > I have to say that I'd rather see these changes be more durable > and self-checking. > > By this I mean that I want you to also make the driver private pointer > that holds these

Re: [PATCH] prctl,x86 Add PR_[GET|SET]_CPUID for controlling the CPUID instruction.

On Sun, Sep 11, 2016 at 05:29:23PM -0700, Kyle Huey wrote: > rr (http://rr-project.org/), a userspace record-and-replay reverse- > execution debugger, would like to trap and emulate the CPUID instruction. > This would allow us to a) mask away certain hardware features that rr does > not support

[PATCH] clk: hisilicon: add CRG driver for Hi3798CV200 SoC

Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset Generator) module generates clock and reset signals used by other module blocks on SoC. Signed-off-by: Jiancheng Xue --- .../devicetree/bindings/clock/hi3519-crg.txt | 46

Re: [GIT PULL] Immutable branch between MFD, GPIO and Regulator due for the v4.9 merge window

On Fri, 09 Sep 2016, Mark Brown wrote: > On Thu, Sep 08, 2016 at 08:26:46AM +0100, Lee Jones wrote: > > On Wed, 07 Sep 2016, Linus Walleij wrote: > > > > Hm it is based on a later release candidate than my tree so I'll wait > > > and see if I > > > have to pull it (like if there are clashes in

Re: [PATCH] staging: ks7010: mark symbols static where possible

On Sun, Sep 04, 2016 at 02:38:39PM +0800, Baoyou Xie wrote: > We get 2 warnings when building kernel with W=1: > drivers/staging/ks7010/ks_hostif.c:72:6: warning: no previous prototype for > 'ks_wlan_hw_wakeup_task' [-Wmissing-prototypes] > drivers/staging/ks7010/ks_hostif.c:1508:6: warning: no

[PATCH 4/9] clocksource/drivers/moxart: Replace setup_irq by request_irq

Save memory space and line of code by replacing setup_irq by request_irq. Signed-off-by: Daniel Lezcano Acked-by: Joel Stanley --- drivers/clocksource/moxart_timer.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git

Re: [PATCH v5 2/3] mfd: add support for Allwinner SoCs ADC

On Thu, 08 Sep 2016, Quentin Schulz wrote: > The Allwinner SoCs all have an ADC that can also act as a touchscreen > controller and a thermal sensor. For now, only the ADC and the thermal > sensor drivers are probed by the MFD, the touchscreen controller support > will be added later. > >

Re: [RFC/RFT][PATCH v2 6/7] PM / runtime: Use device links

On Thu, Sep 08, 2016 at 11:30:26PM +0200, Rafael J. Wysocki wrote: > Modify the runtime PM framework to use device links to ensure that > supplier devices will not be suspended if any of their consumer > devices are active. I think it's inconsistent to runtime resume/suspend suppliers in

[PATCHv2 2/3] tty/serial: at91: fix hardware handshake with GPIOs

Commit 1cf6e8fc8341 ("tty/serial: at91: fix RTS line management when hardware handshake is enabled") broke the hardware handshake when GPIOs where used. Hardware handshake with GPIOs used to work before this commit because the CRTSCTS flag (termios->c_cflag) was set, but not the

Re: [PATCH 0/7] drm/sun4i: Introduce A33 display driver

Hi, On Wed, Sep 07, 2016 at 12:49:58PM +0800, Chen-Yu Tsai wrote: > On Wed, Sep 7, 2016 at 2:54 AM, Maxime Ripard > wrote: > > On Tue, Sep 06, 2016 at 10:50:09AM +0800, Chen-Yu Tsai wrote: > >> >> The implementation might be along the lines of > >> >> > >> >>

Re: [PATCH v5 2/3] mfd: add support for Allwinner SoCs ADC

On Mon, Sep 12, 2016 at 10:59:23AM +0100, Lee Jones wrote: > > >> +static const struct of_device_id sun4i_gpadc_mfd_of_match[] = { > > >> +{ > > >> +.compatible = "allwinner,sun4i-a10-ts", > > >> +.data = _gpadc_mfd_cells, > > >> +}, { > > >> +

Re: [PATCH] ARM: decompressor: reset ttbcr fields to use TTBR0 on ARMv7

On Mon, Sep 12, 2016 at 12:27:00PM +0530, Srinivas Ramana wrote: > If the bootloader uses the long descriptor format and jumps to > kernel decompressor code, TTBCR may not be in a right state. > Before enabling the MMU, it is required to clear the TTBCR.PD0 > field to use TTBR0 for translation

[PATCH] video: fbdev: add missing \n at end of printk error message

From: Colin Ian King The message is missing a \n, add it. Signed-off-by: Colin Ian King --- drivers/video/fbdev/s1d13xxxfb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/fbdev/s1d13xxxfb.c

Re: [patch v1] x86/platform/mellanox: introduce support for Mellanox systems platform

On Mon, Sep 12, 2016 at 08:21:28AM +, Vadim Pasternak wrote: > > > > -Original Message- > > From: Greg KH [mailto:gre...@linuxfoundation.org] > > Sent: Monday, September 12, 2016 11:17 AM > > To: Vadim Pasternak > > Cc: t...@linutronix.de; mi...@redhat.com;

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