On (09/14/17 16:01), Luck, Tony wrote:
>
> > let's hear from ia64 and ppc64 guys.
>
> If you write a patch, I can try it on some ia64 h/w.
>
> Please include some test cases (perhaps as a second patch that adds a few
> good/bad %pF and %pS
> to some code (both in base kernel, and in a module).
Hi, Christoph,
I don't think dma_get_cache_alignment is the "absolute minimum alignment" in
all cases. At least on MIPS/Loongson, if we use I/O coherent mode (Cached DMA
mode), align block queue to 4Bytes is enough. If we align block queue to
dma_get_cache_alignment in I/O coherent mode, there
+Cc: Pierre, Liam
(Tom: I'm not an audio guy)
On Wed, 2017-09-13 at 10:55 -0400, Tom Rini wrote:
> Hey folks,
>
> Entirely unrelated to the regression on this board that we dealt with
> the other week, I have (and have had for a bit), a problem with audio
> on
> this laptop. After a while of us
Hi,
this has been previously sent
http://lkml.kernel.org/r/20170904082148.23131-1-mho...@kernel.org
No fundamental objections have been raised. There were some questions about
potential permanent migration failures but those are deemed unlikely and
not really problematic because the context is int
From: Michal Hocko
Memory offlining can fail just too eagerly under a heavy memory pressure.
[ 5410.336792] page:ea22a646bd00 count:255 mapcount:252
mapping:88ff926c9f38 index:0x3
[ 5410.336809] flags: 0x9855fe40010048(uptodate|active|mappedtodisk)
[ 5410.336811] page dumped because: is
From: Michal Hocko
We have a hardcoded 120s timeout after which the memory offline fails
basically since the hot remove has been introduced. This is essentially
a policy implemented in the kernel. Moreover there is no way to adjust
the timeout and so we are sometimes facing memory offline failure
Despite the unprovable lockdep warning raised by Sergey, I didn't get any
feedback on this series.
Is there a chance to get it moved upstream ?
Thanks,
Laurent.
On 08/09/2017 20:06, Laurent Dufour wrote:
> This is a port on kernel 4.13 of the work done by Peter Zijlstra to
> handle page fault wi
On Mon, Sep 18, 2017 at 01:55:18PM +0800, yuzhoujian wrote:
> Introduce a new option to print trace output to files named by the
> monitored events and update perf-script documentation accordingly.
>
> Shown below is output of perf script command with the newly introduced
> option.
>
> $p
On Mon, 2017-09-11 at 20:03 +0200, Devid Antonio Filoni wrote:
> On Mon, Sep 11, 2017 at 05:55:29PM +0300, Sakari Ailus wrote:
> > Hi Devid,
> >
> > Please see my comments below.
> >
> > Andy: please look for "INT5648".
>
> Hi Sakari,
> I'm replying below to your comments. I'll work on a v2 patc
> Am 18.09.2017 um 04:40 schrieb Paul E. McKenney :
[...]
> And after some playing around, I did get rid of the error messages.
> The code-block output looks a bit strange though, hints? I preceded
> the code block with "::", again at Akira's suggestion. It looks fine
> except for the :c:func: a
On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:
> Allwinner H3 features a thermal sensor like the one in A33, but has its
> register re-arranged, the clock divider moved to CCU (originally the
> clock divider is in ADC) and added a pair of bus clock and reset.
>
> Update the binding
Hi Wenyou,
Thanks for the update.
The driver exposes controls that are accessible through the sub-device node
even if the device hasn't been powered on.
Many ISP and bridge drivers will also power the sensor down once the last
user of the user space device nodes disappears. You could keep the de
On Thu, Sep 14, 2017 at 10:52:47PM +0800, Icenowy Zheng wrote:
> As the H3 SoC, which is also in sun8i line, has totally different
> register map for the thermal sensor (a cut down version of GPADC), we
> should rename A23/A33-specified registers to contain A33, in order to
> prevent obfuscation wi
On Mon, 11 Sep 2017, Denis Plotnikov wrote:
> ping!
I'll have a look next week as I'm not much around this week.
Thanks,
tglx
On Thu, Sep 14, 2017 at 10:52:48PM +0800, Icenowy Zheng wrote:
> The SoCs after H3 has newer thermal sensor ADCs, which have two clock
> inputs (bus clock and sampling clock) and a reset. The registers are
> also re-arranged.
>
> This commit reworks the code, adds the process of the clocks and
> r
Hi Wenyou,
On Mon, Sep 18, 2017 at 02:45:13PM +0800, Wenyou Yang wrote:
> @@ -998,8 +1002,15 @@ static int ov7670_set_fmt(struct v4l2_subdev *sd,
> ret = ov7670_try_fmt_internal(sd, &format->format, NULL, NULL);
> if (ret)
> return ret;
> -
Hi Wenyou,
[auto build test WARNING on linuxtv-media/master]
[also build test WARNING on v4.14-rc1 next-20170918]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Wenyou-Yang/media-ov7670-Add
于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard
写到:
>On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:
>> Allwinner H3 features a thermal sensor like the one in A33, but has
>its
>> register re-arranged, the clock divider moved to CCU (originally the
>> clock divider is in ADC) and
On Wed, Aug 30, 2017 at 03:41:20PM +0100, Dietmar Eggemann wrote:
> The following 'capacity-dmips-mhz' dt property values are used:
>
> Cortex-A15: 1024, Cortex-A7: 539
>
> They have been derived form the cpu_efficiency values:
>
> Cortex-A15: 3891, Cortex-A7: 2048
>
> by scaling them so that t
Commit-ID: 8fce3dc5c5d6f6301f67311fa79f333902b58cea
Gitweb: http://git.kernel.org/tip/8fce3dc5c5d6f6301f67311fa79f333902b58cea
Author: Arnd Bergmann
AuthorDate: Fri, 15 Sep 2017 21:42:59 +0200
Committer: Thomas Gleixner
CommitDate: Mon, 18 Sep 2017 09:37:33 +0200
clocksource/integrator
For raw layer-2 packets, copy the desired future transmit time from
the CMSG cookie into the skb.
Signed-off-by: Richard Cochran
---
net/packet/af_packet.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index c26172995511..342c6cc81a42 1
For raw packets, copy the desired future transmit time from the CMSG
cookie into the skb.
Signed-off-by: Richard Cochran
---
net/ipv4/raw.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/ipv4/raw.c b/net/ipv4/raw.c
index 33b70bfd1122..f6805973629b 100644
--- a/net/ipv4/raw.c
+++ b/net
This patch configures the i210 transmit queues to reserve the first queue
for time based transmit arbitration, placing all other traffic into the
second queue. This configuration is hard coded and does not make use of
the two spare queues.
Signed-off-by: Richard Cochran
---
drivers/net/ethernet
This series is an early RFC that introduces a new socket option
allowing time based transmission of packets. This option will be
useful in implementing various real time protocols over Ethernet,
including but not limited to P802.1Qbv, which is currently finding
its way into 802.1Q.
* Open questio
This patch introduces SO_TXTIME. User space enables this option in
order to pass a desired future transmit time in a CMSG when calling
sendmsg(2).
Signed-off-by: Richard Cochran
---
arch/alpha/include/uapi/asm/socket.h | 3 +++
arch/frv/include/uapi/asm/socket.h | 3 +++
arch/ia64/inclu
For udp packets, copy the desired future transmit time from the CMSG
cookie into the skb.
Signed-off-by: Richard Cochran
---
net/ipv4/udp.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
index ef29df8648e4..669f63495877 100644
--- a/net/ip
Signed-off-by: Richard Cochran
---
include/linux/skbuff.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 72299ef00061..bc7f7dcbb413 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -635,6 +635,7 @@ typedef unsigned ch
On Sun, Sep 17, 2017 at 04:05:09PM -0700, Paul E. McKenney wrote:
> Hello!
>
Hi Paul,
> The topic of memory-ordering recipes came up at the Linux Plumbers
> Conference microconference on Friday, so I thought that I should summarize
> what is currently "out there":
>
> 1.memory-barriers.txt:
On Mon, Aug 28, 2017 at 10:41:55AM +0200, Peter Zijlstra wrote:
> On Fri, Aug 25, 2017 at 12:11:31AM +0200, Uladzislau Rezki (Sony) wrote:
> > From: Uladzislau Rezki
> >
> > As a first step this patch makes cfs_tasks list as MRU one.
> > It means, that when a next task is picked to run on physica
> On 16 Sep 2017, at 20.39, Rakesh Pandit wrote:
>
> nvm_tgt_types list was protected by wrong lock for NVM_INFO ioctl call
> and can race with addition or removal of target types. Also
> unregistering target type was not protected correctly.
>
> Fixes: 5cd907853 ("lightnvm: remove nested lock
> On 17 Sep 2017, at 23.04, Rakesh Pandit wrote:
>
> Remove repeated calculation for number of channels while creating a
> target device.
>
> Signed-off-by: Rakesh Pandit
> ---
>
> This is also a trivial change I found while investigating/working on
> other issue.
>
> drivers/lightnvm/core.c
Hi,
On Sun, Sep 17, 2017 at 05:19:47AM +0200, Stefan Brüns wrote:
> The H83T uses a compatible string different from the A23, but requires
> the same clock autogating register setting.
>
> The H3 also requires setting the clock autogating register, but has
> the register at a different offset.
>
On Sun, Sep 17, 2017 at 05:19:48AM +0200, Stefan Brüns wrote:
> For the H3, the burst lengths field offsets in the channel configuration
> register differs from earlier SoC generations.
>
> Using the A31 register macros actually configured the H3 controller
> do to bursts of length 1 always, which
On Mon, 18 Sep 2017 11:12:55 +0900, Masahiro Yamada wrote:
> Since commit bc6245e5efd7 ("bug: split BUILD_BUG stuff out into
> "), #include is better
> to pull minimal headers needed for BUILG_BUG() family.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Jakub Kicinski
On 16.09.2017 07:49, Kai-Heng Feng wrote:
On Mon, Aug 28, 2017 at 9:56 PM, Kai-Heng Feng
wrote:
On Mon, Aug 28, 2017 at 6:14 PM, Mathias Nyman
wrote:
On 28.08.2017 12:29, Greg KH wrote:
Adding more people who were involved in the original patch.
Users are now seeing the unresponsive USB2 po
The 'modes' member of the mvebu_comphy_priv structure is not used.
Remove it.
Signed-off-by: Antoine Tenart
---
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
b/drivers/phy/marvell/phy-mvebu-cp110-comp
The mux value is retrieved from the mvebu_comphy_get_mux() function
which returns an int. In mvebu_comphy_power_on() this int is stored to a
u32 and a check is made to ensure it's not negative. Which is wrong.
This fixes it.
Fixes: d0438bd6aa09 ("phy: add the mvebu cp110 comphy driver")
Signed-off
The pipe selector is used to select some modes (such as USB or PCIe).
Otherwise it must be set to 0 (or "unconnected"). This patch does this
to ensure it is not set to an incompatible value when using the
supported modes (SGMII, 10GKR).
Signed-off-by: Antoine Tenart
---
drivers/phy/marvell/phy-m
I don't think it makes sense to check for a possible bad
initialization order at run time on every system when it is all
decided at build time.
A more efficient way to make sure developers do not introduce new
calls to dmi_check_system() too early in the initialization sequence
is to simply docume
On Fri, 2017-09-08 at 01:20 +0200, Rafael J. Wysocki wrote:
> rom: Rafael J. Wysocki
>
> Andy and Mika review code changes under drivers/acpi/pmic/ on
> a regular basis and I rely on their help with that, so add them
> as code reviwewers for that part of the kernel.
>
Fine by me:
Reviewed-by:
On Sun, Sep 17, 2017 at 05:19:49AM +0200, Stefan Brüns wrote:
> The current code mixes three distinct operations when transforming
> the slave config to register settings:
>
> 1. special handling of DMA_SLAVE_BUSWIDTH_UNDEFINED, maxburst == 0
> 2. range checking
> 3. conversion of raw to reg
On Sun, Sep 17, 2017 at 05:19:50AM +0200, Stefan Brüns wrote:
> The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with
> a width of 1, 2, 4 or 8 bytes.
>
> The register value for the the width is log2-encoded, change the
> conversion function to provide the correct value for width =
Hi!
> > > > After commit 9caf25f996e8, user for CMA memory should use to check
> > > > PageHighmem in order to get proper virtual address of the page. If
> > > > someone doesn't use it, it is possible to use wrong virtual address
> > > > and it then causes the use of wrong physical address.
> > >
On Sun, Sep 17, 2017 at 05:19:52AM +0200, Stefan Brüns wrote:
> The A64 is register compatible with the H3, but has a different number
> of dma channels and request ports.
>
> Attach additional properties to the node to allow future reuse of the
> compatible for controllers with different number o
Hi,
gustavo panizzo writes:
>>>gustavo panizzo writes:
>>>---
>>>drivers/usb/dwc3/core.c | 33 +
>>>1 file changed, 33 insertions(+)
>>>
>>>diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>>>index 326b
1;4803;0c
On Sun, Sep 17, 2017 at 05:19:51AM +0200, Stefan Brüns wrote:
> Preparatory patch: If the same compatible is used for different SoCs which
> have a common register layout, but different number of channels, the
> channel count can no longer be stored in the config. Store it in the
> device
From: Markus Elfring
Date: Mon, 18 Sep 2017 09:51:23 +0200
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Delete two error messages for a failed memory allocation in dvb_usbv2_probe()
Improve a size determination in two functions
driver
From: Markus Elfring
Date: Mon, 18 Sep 2017 09:25:19 +0200
Omit extra messages for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/media/usb/dvb-usb-v2/dvb_usb_core.c | 3 ---
1 file changed, 3 d
From: Markus Elfring
Date: Mon, 18 Sep 2017 09:36:33 +0200
Replace the specification of data structures by variable references
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.
Signed-off-by: Markus
From: Colin Ian King
The structure stm32f7_setup is local to the source and does not need
to be in global scope, make it static const.
Cleans up sparse warning:
symbol 'stm32f7_setup' was not declared. Should it be static?
Signed-off-by: Colin Ian King
---
drivers/i2c/busses/i2c-stm32f7.c | 2
Hello Mr Chehab,
Thanks for the review.
I have modified the code and documentation as per your comments.
Please let me know if this patch is ready for merging.
Signed-off-by: Satendra Singh Thakur
---
Documentation/media/uapi/dvb/fe-get-property.rst | 24 ++-
drivers/media/dvb-core/dvb_fronten
Memory to Memory transfers does not have any special alignment needs
regarding to acnt array size, but if one of the areas are in memory mapped
regions (like PCIe memory), we need to make sure that the acnt array size
is aligned with the mem copy parameters.
Before "dmaengine: edma: Optimize memc
Dear Andy,
On 09/17/17 20:19, tip-bot for Andy Lutomirski wrote:
Commit-ID: 4ba55e65f471d011d3ba2ac2022180ea0877d68e
Gitweb: http://git.kernel.org/tip/4ba55e65f471d011d3ba2ac2022180ea0877d68e
Author: Andy Lutomirski
AuthorDate: Sun, 17 Sep 2017 09:03:51 -0700
Committer: Ingo Molnar
Hi,
On Sun, Sep 17, 2017 at 05:19:53AM +0200, Stefan Brüns wrote:
> + ret = of_property_read_u32(np, "dma-channels", &sdc->num_pchans);
> + if (ret && !sdc->num_pchans) {
> + dev_err(&pdev->dev, "Can't get dma-channels.\n");
> + return ret;
> + }
> +
> + if
On Sun, Sep 17, 2017 at 05:19:54AM +0200, Stefan Brüns wrote:
> The A64 SoC has the same dma engine as the H3 (sun8i), with a
> reduced amount of physical channels. To allow future reuse of the
> compatible, leave the channel count etc. in the config data blank
> and retrieve it from the devicetree
On Sun, Sep 17, 2017 at 09:17:13AM -0400, Cole Robinson wrote:
> On 09/15/2017 01:51 PM, Josef Bacik wrote:
> > Finally got access to a box to run this down myself. This patch on top of
> > the other patches fixes the problem for me, could you verify it works for
> > you? Thanks,
> >
>
> Yup
On Sat, Sep 16, 2017 at 06:14:08PM +0800, icen...@aosc.io wrote:
> > The H3 apparently supports IRQs, why do you not support them for the
> > temperature? They might be broken as it is on A33 but then it might be a
> > good idea to write it down in a comment in the driver (and not adding
> > the un
On Thu, Sep 14, 2017 at 10:52:50PM +0800, Icenowy Zheng wrote:
> As we have gained the support for the thermal sensor in H3, we can now
> add its device nodes to the device tree.
>
> Add them to the H3 device tree.
>
> The calibration data of the thermal sensor is still not added, as
> it's curre
Hi Jonathan,
On Sat, Sep 16, 2017 at 03:17:34PM -0700, Jonathan Cameron wrote:
> On Sat, 16 Sep 2017 12:05:49 +0200
> Quentin Schulz wrote:
>
> > Hi Icenowy,
> >
> > On 14/09/2017 16:52, Icenowy Zheng wrote:
> > > Because of the restriction of the OF thermal framework, the thermal
> > > sensor
On Thu, 14 Sep 2017, Icenowy Zheng wrote:
> As the H3 SoC, which is also in sun8i line, has totally different
> register map for the thermal sensor (a cut down version of GPADC), we
> should rename A23/A33-specified registers to contain A33, in order to
> prevent obfuscation with H3 registers. Cur
On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote:
> 于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard
> 写到:
> >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:
> >> Allwinner H3 features a thermal sensor like the one in A33, but has
> >its
> >> register re-arranged, the c
Stephen Hemminger writes:
> On Sep 15, 2017 11:01 AM, "KY Srinivasan" wrote:
>
> > Vitaly Kuznetsov writes:
> >
> > >
> > > I'm seeing the same issue, reverting the offending
> > >
> > > commit 6f3d791f300618caf82a2be0c27456edd76d5164
> > > Author: K. Y. Srinivasan
> > > Date: Fri Aug
Kingdisplay Technology Co., Ltd, established in
China Shenzhen in 2006, is a national high-tech
enterprise specializing in the R&D, manufacturing
and marketing of TFT-LCM and touch panel.
Signed-off-by: Nickey Yang
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed,
On Wed, Sep 13, 2017 at 12:21:56PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Sun, Sep 10, 2017 at 07:23:16PM -0700, kan.li...@intel.com escreveu:
> > From: Kan Liang
> >
> > For hist_entry, it only needs comm_str for cmp.
>
> And thinking a bit more, isn't this even a bug fix, as at the time o
From: Colin Ian King
In the case where sizeof(maddr) != sizeof(long) p is initialized and
never read and clang throws a warning on this. Move declaration of
p to clean up the clang build warning:
warning: Value stored to 'p' during its initialization is never read
Signed-off-by: Colin Ian King
On 9/16/2017 7:19 AM, Jim Mattson wrote:
On Thu, Aug 24, 2017 at 5:27 AM, Yu Zhang wrote:
Currently, KVM uses CR3_L_MODE_RESERVED_BITS to check the
reserved bits in CR3. Yet the length of reserved bits in
guest CR3 should be based on the physical address width
exposed to the VM. This patch ch
On Thu, Sep 14, 2017 at 10:05:19AM +0900, Byungchul Park wrote:
> Currently, migrating tasks to cpu0 unconditionally happens when the
> heap is empty, since cp->elements[].cpu was initialized to 0(=cpu0).
> We have to distinguish between the empty case and cpu0 to avoid the
> unnecessary migrantion
Some regulators require keeping their voltage spread below defined
max_spread.
Add properties to provide information on regulators' coupling.
Signed-off-by: Maciej Purski
---
Documentation/devicetree/bindings/regulator/regulator.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documen
On Fri, Sep 08, 2017 at 09:08:58PM +, Sheng-Hui J. Chu wrote:
> From: Jeffrey Chu
>
> Add CYPRESS_VID vid and CYPRESS_WICED_BT_USB and CYPRESS_WICED_WL_USB
> device IDs to ftdi_sio driver
>
> Signed-off-by: Jeffrey Chu
I have two v9 of this patch in my mailbox with different authorship and
Support Kingdisplay kd097d04 9.7" 1536x2048 TFT LCD panel,
it is a MIPI DSI panel.
Signed-off-by: Nickey Yang
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c | 485 +
On 18/09/2017 10:15, Yu Zhang wrote:
>>
>> static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
>> u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool
>> check_limit)
>> {
>> return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx,
>> check_limit);
>> }
>>
>> And
Hi all,
this patchset adds a new mechanism to the framework - regulators' coupling.
On Odroid XU3/4 and other Exynos5422 based boards there is a case, that
different devices on the board are supplied by different regulators
with non-fixed voltages. If one of these devices temporarily requires
hi
On Odroid XU3/4 and other Exynos5422 based boards there is a case, that
different devices on the board are supplied by different regulators
with non-fixed voltages. If one of these devices temporarily requires
higher voltage, there might occur a situation that the spread between
two devices' voltag
On 18/09/17 10:38, Colin King wrote:
> From: Colin Ian King
>
> In the case where sizeof(maddr) != sizeof(long) p is initialized and
> never read and clang throws a warning on this. Move declaration of
> p to clean up the clang build warning:
>
> warning: Value stored to 'p' during its initiali
The KINGDISPLAY KD097D04 is a 9.7" panel with a 1536x2048
resolution and connected to DSI using 8 lanes.
Signed-off-by: Nickey Yang
---
.../display/panel/kingdisplay,kd097d04.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644
Documentation/devicetree/b
On Fri, 15 Sep 2017, 冯锐 wrote:
> > On Thu, 14 Sep 2017, 冯锐 wrote:
> >
> > > On Fri, 08 Sep 2017, rui_f...@realsil.com.cn wrote:
> > >
> > > > From: rui_feng
> > > >
> > > > Add support for new chip rts5260.
> > >
> > > You are adding over 600 lines in this patch. It desearves a more
> > > fort
On Fri, Sep 08, 2017 at 05:46:25PM +0900, Byungchul Park wrote:
> The workqueue added manual acquisitions to catch deadlock cases.
> Now crossrelease was introduced, some of those are redundant, since
> wait_for_completion() already includes the acquisition for itself.
> Removed it.
Now, lock_map_
This commit makes Cavium PCI ACS quirk applicable only to Cavium
ThunderX (CN81/83/88XX) PCIE Root Ports which has limited PCI capabilities
in terms of no ACS support advertisement. However, the RTL internally
implements similar protection as if ACS had completion/request redirection,
upstream forw
Am Samstag, 16. September 2017, 15:00:34 CEST schrieb Jason A. Donenfeld:
Hi Jason,
> This started out as just replacing the use of crypto/rng with
> get_random_bytes_wait,
This change is a challenge. The use of the kernel crypto API's DRNG has been
made to allow FIPS 140-2 compliance. Otherwi
On Thu, 14 Sep 2017, Martin Kaiser wrote:
> Thus wrote Lee Jones (lee.jo...@linaro.org):
>
> > On Tue, 12 Sep 2017, Martin Kaiser wrote:
>
> > > When fsl-imx25-tsadc is compiled as a module, unloading and reloading
> > > the module will lead to a crash.
>
> > > Add a removal function which clea
On Sun, Sep 10, 2017 at 07:23:18PM -0700, kan.li...@intel.com wrote:
SNIP
> + pthread_mutex_unlock(&thread->namespaces_lock);
> +
> return 0;
> }
>
> -void thread__namespaces_id(const struct thread *thread,
> +void thread__namespaces_id(struct thread *thread,
>
On 21/08/2017 15:25, Marc Gonzalez wrote:
Using separate mask and ack functions (i.e. my patch)
# iperf3 -c 172.27.64.110 -t 20
Connecting to host 172.27.64.110, port 5201
[ 4] local 172.27.64.1 port 40868 connected to 172.27.64.110 port 5201
[ ID] Interval Transfer Bandwidth
On Thu, 14 Sep 2017, Mark Brown wrote:
> On Thu, Sep 14, 2017 at 08:43:00AM +0100, Lee Jones wrote:
>
> > Change of plan. It looks like there are deps.
>
> > Unapplied.
>
> The core stuff went in during the merge window, you should be able to
> wait for -rc1 or pick up the asoc-v4.14 tag.
No,
Hi Leon,
Thanks for the update. Please see my comments below.
On Fri, Sep 15, 2017 at 03:49:52PM +0800, Leon Luo wrote:
> The imx274 is a Sony CMOS image sensor that has 1/2.5 image size.
> It supports up to 3840x2160 (4K) 60fps, 1080p 120fps. The interface
> is 4-lane MIPI CSI-2 running at 1.44G
On Sun, Sep 10, 2017 at 07:23:13PM -0700, kan.li...@intel.com wrote:
> From: Kan Liang
>
> The patch series intends to fix the severe performance issue in
> Knights Landing/Mill, when monitoring in heavy load system.
> perf top costs a few minutes to show the result, which is
> unacceptable.
> Wi
From: Colin Ian King
dma_data is being initialized twice, remove the unused first
initialization and use the latter one instead. Fixed clang warning:
"warning: Value stored to 'dma_data' during its initialization is
never read"
Signed-off-by: Colin Ian King
---
sound/soc/zte/zx-spdif.c | 4 +
16 bits timers aren't accurate enough to be used as
clocksource, remove them from stm32f4 and stm32f7 devicetree.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f429.dtsi | 32
arch/arm/boot/dts/stm32f746.dtsi | 32
2
Rework driver code to use only one timer for both clocksource
and clockevent.
This patch also forbid to use 16 bits timers because they are
not enough accurate.
Do some clean up in structure and functions names too.
Signed-off-by: Benjamin Gaignard
Signed-off-by: Ludovic Barre
---
drivers/clock
version 2:
- fix uninitialized variable
These patch implements clocksource and clockevent by using only one hardware
block.
It also limits usage of clocksource to 32 bits timers because 16 bits ones
aren't enough accurate.
Series includes minor clean up in structures, function prototypes and driv
From: Colin Ian King
In the case where sizeof(maddr) != sizeof(long) p is initialized and
never read and clang throws a warning on this. Move declaration of
p to clean up the clang build warning:
warning: Value stored to 'p' during its initialization is never read
Signed-off-by: Colin Ian King
On Mon, Sep 18, 2017 at 10:49:56AM +0200, Stephan Mueller wrote:
> Am Samstag, 16. September 2017, 15:00:34 CEST schrieb Jason A. Donenfeld:
>
> Hi Jason,
>
> > This started out as just replacing the use of crypto/rng with
> > get_random_bytes_wait,
>
> This change is a challenge. The use of th
This patch correct Feedback divider setting:
1、Set Feedback divider [8:5] when HIGH_PROGRAM_EN
2、Due to the use of a "by 2 pre-scaler," the range of the
feedback multiplication Feedback divider is limited to even
division numbers, and Feedback divider must be greater than
12, less than 1000.
3、Make
Configure dsi slave channel when driving a panel
which needs 2 DSI links.
Signed-off-by: Nickey Yang
---
.../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_r
As MIPI PHY document show, icpctrl<3..0> and lpfctrl<5..0>
should depend on frequency,so fix it.
Signed-off-by: Nickey Yang
---
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 70 +++---
1 file changed, 40 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/rockchip
Signed-off-by: Nickey Yang
---
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 353
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 +
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 3 +
4 files changed, 257 insert
clk_24m --> Gate11[14] --> clk_mipidphy_ref --> Gate21[0] --> clk_dphy_pll
Signed-off-by: Nickey Yang
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.d
On Tue, Sep 12, 2017 at 09:41:20AM -0700, Guenter Roeck wrote:
> On Tue, Sep 12, 2017 at 10:38:39AM +0300, Heikki Krogerus wrote:
> > On Mon, Sep 11, 2017 at 08:32:04PM -0700, Guenter Roeck wrote:
> > > Commented out code can be added as needed. Drop it.
> > > Also drop TODO and an obsolete XXX com
On 13/09/17 21:43, Damien Riegel wrote:
msm8916-wcd-analog uses button0 to differentiate between headphone and
headset. Under some circumstances, button pressed and released
interrupts are not fired as the driver expects it.
This is what we need to understand to find a right solution,
I woul
4.13-stable review patch. If anyone has any objections, please let me know.
--
From: Bernat, Yehezkel
commit 8fdd6ab36197ad891233572c57781b1f537da0ac upstream.
The key size is tested by hex2bin() already (as '\0' isn't an hex digit)
Suggested-by: Andy Shevchenko
Signed-off-b
4.13-stable review patch. If anyone has any objections, please let me know.
--
From: Xin Long
[ Upstream commit 5c25f30c93fdc5bf25e62101aeaae7a4f9b421b3 ]
Now when probessing ICMPV6_PKT_TOOBIG, ip6gre_err only subtracts the
offset of gre header from mtu info. The expected mtu
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