On Wed, 2018-05-30 at 08:26 +0200, Marcel Holtmann wrote:
> Hi Sean,
>
> >>
[ ... ]
> >>> * Unknown packet (code 14 len 30)
> >>> 0.641509
> >>> 01 00 00 00 02 00 01 0e 00 01 00 00 00 10 62 6c ..bl
> >>> 75 65 74 6f 6f 74 68 64
On newer Intel platforms, ASPM support in r8169 is the last missing
puzzle to let Package C-State achieves PC8. Without ASPM support, the
deepest Package C-State can hit is PC3.
PC8 can save additional ~3W in comparison with PC3 on my testing
platform.
The original patch is from Realtek.
This patch adds region_id to fpga_image_info data structure, it
allows driver to pass region id information to fpga-mgr via
fpga_image_info for fpga reconfiguration function.
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked-by: Alan Tull
---
v3: add one line comment for region_id
v4: add
From: Kang Luwei
Partial Reconfiguration (PR) is the most important function for FME. It
allows reconfiguration for given Port/Accelerated Function Unit (AFU).
It creates platform devices for fpga-mgr, fpga-regions and fpga-bridges,
and invokes fpga-region's interface (fpga_region_program_fpga)
The Device Feature List (DFL) is implemented in MMIO, and features
are linked via the DFLs. This patch enables pcie driver to prepare
enumeration information (e.g locations of all device feature lists
in MMIO) and use common APIs provided by the Device Feature List
framework to enumerate each
Hi All,
Here is v6 patch-series adding drivers for FPGA DFL devices.
This patch series provides a common framework to support FPGA Device Feature
List (DFL), and also feature dev drivers under this DFL framework to provide
interfaces for userspace applications to configure, enumerate, open, and
For feature devices, we need a method to find the port dedicated
to the device. This patch adds a function dfl_fpga_cdev_find_port
for this purpose. e.g FPGA Management Engine (FME) Partial
Reconfiguration sub feature, it uses this function to find
dedicated port on the device for PR function
From: Kang Luwei
The Header Register set is always present for FPGA Management Engine (FME),
this patch implements init and uinit function for header sub feature and
introduces several read-only sysfs interfaces for the capability and
status.
Sysfs interfaces:
*
On 12 June 2018 at 10:42, Feng Tang wrote:
> Hi Ulf,
>
> Thanks for the review.
>
> On Tue, Jun 12, 2018 at 08:25:44AM +0200, Ulf Hansson wrote:
>> On 8 June 2018 at 11:51, Feng Tang wrote:
>> > When doing some boot time optimization for an eMMC rootfs NUCs,
>> > we found the rootfs may spend
Maybe, the commit title should be:
mtd: rawnand: denali: add more clocks and improve setup_data_interface
2018-06-12 19:31 GMT+09:00 Masahiro Yamada :
> According to the Denali User's Guide, this IP needs three clock inputs:
>
> - clk: controller core clock
>
> - clk_x: bus interface clock
>
__pgtable_l5_enabled shouldn't be needed after system has booted, we can
mark it as __initdata, but it requires preparation.
This patch moves early cpu initialization into a separate translation
unit. This limits effect of USE_EARLY_PGTABLE_L5 to less code.
Without the change cpu_init() uses
Olof Johansson writes:
> - Qualcomm:
> + SDM845, a.k.a Snapdragon 845, an 4+4-core Kryo 385/845
> (Cortex-A75/A55 derivative) SoC that's one of the current high-end
> mobile SoCs.
>
> It's great to see mainline support for it. So far, you
> can't do much with it, since a lot of peripherals are
2018-06-12 20:03 GMT+09:00 Boris Brezillon :
> On Tue, 12 Jun 2018 19:36:06 +0900
> Masahiro Yamada wrote:
>
>> Maybe, the commit title should be:
>>
>> mtd: rawnand: denali: add more clocks and improve setup_data_interface
>
> Or you split that in 2 commits, one retrieving the new clks, and the
When a new task wakes-up for the first time, its initial utilization
is set to half of the spare capacity of its CPU. The current
implementation of post_init_entity_util_avg() uses SCHED_CAPACITY_SCALE
directly as a capacity reference. As a result, on a big.LITTLE system, a
new task waking up on
So still need to keep return type as int, I’ll fix in V2.
Thanks.
> 在 2018年6月12日，下午7:27，kbuild test robot 写道：
>
> Hi Chengguang,
>
> Thank you for the patch! Perhaps something to improve:
>
> [auto build test WARNING on tip/x86/core]
> [also build test WARNIN
On Mon, Jun 11, 2018 at 01:09:24PM +0800, Zhouyang Jia wrote:
> When nlmsg_put fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling nlmsg_put.
>
> Signed-off-by: Zhouyang Jia
> ---
> drivers/staging/gdm724x/netlink_k.c | 3
On 2018/6/12 18:29, Ulf Hansson wrote:
On 12 June 2018 at 10:42, Feng Tang wrote:
Hi Ulf,
Thanks for the review.
On Tue, Jun 12, 2018 at 08:25:44AM +0200, Ulf Hansson wrote:
On 8 June 2018 at 11:51, Feng Tang wrote:
When doing some boot time optimization for an eMMC rootfs NUCs,
we found
On Tue, Jun 12, 2018 at 11:15:28AM +0800, Huang, Ying wrote:
> "Huang, Ying" writes:
> >> On Wed, May 23, 2018 at 04:26:07PM +0800, Huang, Ying wrote:
> >>> @@ -3516,11 +3512,39 @@ static int __swap_duplicate(swp_entry_t entry,
> >>> unsigned char usage)
> >>
> >> Two comments about this part of
On 2018-06-12 13:57, p...@codeaurora.org wrote:
On 2018-06-12 05:51, Ray Jui wrote:
On certain versions of Broadcom PAXC based root complexes, certain
regions of the configuration space are corrupted. As a result, it
prevents the Linux PCIe stack from traversing the linked list of the
On Tue, Jun 12, 2018 at 02:00:11PM +0200, Daniel Lezcano wrote:
> +static void __idle_injection_wakeup(struct idle_injection_device *ii_dev)
> +{
> + struct idle_injection_thread *iit;
> + struct cpumask tmp;
> + unsigned int cpu;
> +
> + cpumask_and(, ii_dev->cpumask,
Hi,
On Fri, Jun 08, 2018 at 03:36:55PM -0700, Brian Norris wrote:
> This compatible property was documented before the driver was renamed to
> "SBS" (see commit e57f1b68c406 ("devicetree-bindings: Propagate
> bq20z75->sbs rename to dt bindings")). The driver has continued to
> support this
On 12/06/2018 14:30, Peter Zijlstra wrote:
> On Tue, Jun 12, 2018 at 02:00:11PM +0200, Daniel Lezcano wrote:
>> +static void __idle_injection_wakeup(struct idle_injection_device *ii_dev)
>> +{
>> +struct idle_injection_thread *iit;
>> +struct cpumask tmp;
>> +unsigned int cpu;
>> +
>>
Hi Rafael,
On 2018-06-12 13:00, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> If a device link is added via device_link_add() by the driver of the
> link's consumer device, the supplier's runtime PM usage counter is
> going to be dropped by the pm_runtime_put_suppliers() call in
>
Christoffer,
Thanks for the review.
On 2018/6/9 19:17, Christoffer Dall wrote:
> On Sat, Jun 09, 2018 at 03:48:40AM +0800, Dongjiu Geng wrote:
>> For the migrating VMs, user space may need to know the exception
>> state. For example, in the machine A, KVM make an SError pending,
>> when
Make sure to free and deregister the addrmatch and chancounts devices
allocated during probe in all error paths. Also fix use-after-free in a
probe error path and in the remove success path where the devices were
being put before before deregistration.
Fixes: 356f0a30860d ("i7core_edac: change
Hi Boris,
-Original Message-
From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf Of
Yogesh Narayan Gaur
Sent: Monday, June 11, 2018 3:51 PM
To: Boris Brezillon
Cc: rich...@nod.at; Prabhakar Kushwaha ; Han Xu
; linux-kernel@vger.kernel.org;
We cannot do it last, otherwithse it will be skipped for dynamic
volumes.
Reported-by: Lachmann, Juergen
Fixes: 34653fd8c46e ("ubi: fastmap: Check each mapping only once")
Signed-off-by: Richard Weinberger
---
drivers/mtd/ubi/vtbl.c | 20 ++--
1 file changed, 10 insertions(+),
> 在 2018年6月12日，下午12:22，Zhouyang Jia 写道：
>
> When kmem_cache_create fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling kmem_cache_create.
I think SLAB_PANIC can handle this case.
Thanks,
Chengguang.
>
>
This is needed in case of PROBE_DEFER if IRQ resource is not yet ready.
Signed-off-by: Keerthy
---
Tested for GPIO Interrupts on da850-lcdk board.
Changes in v3:
Changed type of bank_irq to int from unsigned
* Changed irqs type from unsigned to int
drivers/gpio/gpio-davinci.c | 29
On 12.06.2018 02:03, Dmitry Osipenko wrote:
> On Monday, 11 June 2018 23:52:22 MSK Stefan Agner wrote:
>> Add support for the NAND flash controller found on NVIDIA
>> Tegra 2 SoCs. This implementation does not make use of the
>> command queue feature. Regular operations/data transfers are
>> done
Quoting Codrin Ciubotariu (2018-06-07 03:30:14)
> >
> > Seems to me that clock additions could use a new binding and we start
> > with a new driver that handles these few clocks initially. But I
> > haven't looked whether both can coexist.
>
> Mark already applied to broonie/sound.git the I2S
Hi Rob,
On Mon, 11 Jun 2018 at 20:10, Rob Herring wrote:
>
> On Thu, Jun 07, 2018 at 04:05:42PM +0200, Clément Péron wrote:
> > From: Clément Peron
> >
> > Add devicetree binding document for NXP's i.MX SoC specific
> > EPIT timer driver.
> >
> > Signed-off-by: Clément Peron
> > ---
> >
On 2018-06-12 05:51, Ray Jui wrote:
PAXC is an emulated PCIe root complex internally in various Broadcom
based SoCs. PAXC internally connects to the embedded network processor
within these SoCs, with the embedeed network processor exposed as an
endpoint device
The number of physical functions
On 2018-06-12 05:51, Ray Jui wrote:
The internal MSI parsing logic in certain revisions of PAXC root
complexes does not work properly and can casue corruptions on the
writes. They need to be disabled
Signed-off-by: Ray Jui
Reviewed-by: Scott Branden
---
drivers/pci/host/pcie-iproc.c | 34
On Tue, Jun 12, 2018 at 3:39 AM, Tobin C. Harding wrote:
> Currently the function get_random_bytes_arch() has return value 'void'.
> If the hw RNG fails we currently fall back to using get_random_bytes().
> This defeats the purpose of requesting random material from the hw RNG
> in the first
There is no public user of this API, remove it.
Signed-off-by: Peter Zijlstra (Intel)
---
include/linux/swait.h |1 -
kernel/sched/swait.c |2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
--- a/include/linux/swait.h
+++ b/include/linux/swait.h
@@ -161,7 +161,6 @@ extern void
On Mon, Jun 4, 2018 at 3:58 PM, Nadav Amit wrote:
> men_z127_debounce() tries to round up and down, but uses functions which
> are only suitable when the divider is a power of two, which is not the
> case. Use the appropriate ones.
>
> Found by static check. Compile tested.
>
> Fixes:
Since swait basically implemented exclusive waits only, make sure
the API reflects that.
$ git grep -l -e "\"
-e "\" | while read file;
do
sed -i -e 's/\/&_one/g'
-e 's/\/&_exclusive/g' $file;
done
With a few manual touch-ups.
Suggested-by: Linus
Linus noted that swait basically implements exclusive mode -- because
swake_up() only wakes a single waiter. And because of that it should
take care to properly deal with the interruptible case.
In short, the problem is that swake_up() can race with a signal. In
this this case it is possible the
As mentioned by Linus, swait is exclusive mode and had better behave like it
and be named like it.
Make it so.
---
arch/mips/kvm/mips.c | 4 ++--
arch/powerpc/kvm/book3s_hv.c | 6 +++---
arch/s390/kvm/interrupt.c| 2 +-
arch/x86/kernel/kvm.c| 4 ++--
arch/x86/kvm/lapic.c
Hi Ulf,
Thanks for the review.
On Tue, Jun 12, 2018 at 08:25:44AM +0200, Ulf Hansson wrote:
> On 8 June 2018 at 11:51, Feng Tang wrote:
> > When doing some boot time optimization for an eMMC rootfs NUCs,
> > we found the rootfs may spend around 100 microseconds waiting
> > for eMMC card to be
On 06/08/2018 02:09 PM, Vincent Guittot wrote:
[...]
@@ -182,21 +183,30 @@ static void sugov_get_util(struct sugov_cpu *sg_cpu)
sg_cpu->util_dl = cpu_util_dl(rq);
sg_cpu->bw_dl= cpu_bw_dl(rq);
sg_cpu->util_rt = cpu_util_rt(rq);
+ sg_cpu->util_irq =
Hello!
On 6/12/2018 7:32 AM, Zhouyang Jia wrote:
When platform_get_resource_byname fails, the lack of error-handling code may
cause unexpected results.
What results?
This patch adds error-handling code after calling platform_get_resource_byname.
Signed-off-by: Zhouyang Jia
---
On Tue, Jun 12, 2018 at 05:07:37PM +0800, Zhizhou Zhang wrote:
> We can't call function trace hook before setup percpu offset.
> When entering secondary_start_kernel(), percpu offset has not
> been initialized. So this lead hotplug malfunction.
> Here is the flow to reproduce this bug:
>
> echo
We can't call function trace hook before setup percpu offset.
When entering secondary_start_kernel(), percpu offset has not
been initialized. So this lead hotplug malfunction.
Here is the flow to reproduce this bug:
echo 0 > /sys/devices/system/cpu/cpu1/online
echo function >
On 25.04.18 17:34, Marc Kleine-Budde wrote:
Applied to linux-can-next.
Thanks,
Marc
Marc, is the patch supposed to show up on
https://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git/log/
or am I looking at the wrong tree?
Thanks,
Jakob
diff --git a/Documentation/networking/netdev-FAQ.txt
b/Documentation/networking/netdev-FAQ.txt
index 2a3278d5cf35..fa951b820b25 100644
--- a/Documentation/networking/netdev-FAQ.txt
+++ b/Documentation/networking/netdev-FAQ.txt
@@ -179,6 +179,15 @@ A: No. See above answer. In short, if you think
diff --git a/Documentation/networking/netdev-FAQ.txt
b/Documentation/networking/netdev-FAQ.txt
index cfc66ea72329..a365656e4873 100644
--- a/Documentation/networking/netdev-FAQ.txt
+++ b/Documentation/networking/netdev-FAQ.txt
@@ -176,6 +176,15 @@ A: No. See above answer. In short, if you think
diff --git a/Documentation/networking/netdev-FAQ.txt
b/Documentation/networking/netdev-FAQ.txt
index 2a3278d5cf35..fa951b820b25 100644
--- a/Documentation/networking/netdev-FAQ.txt
+++ b/Documentation/networking/netdev-FAQ.txt
@@ -179,6 +179,15 @@ A: No. See above answer. In short, if you think
On Tue, 12 Jun 2018 11:17:09 +0200
Stefan Agner wrote:
> [also added Jens Axboe]
>
> On 12.06.2018 10:27, Boris Brezillon wrote:
> > On Tue, 12 Jun 2018 10:06:42 +0200
> > Stefan Agner wrote:
> >
> >> On 12.06.2018 02:03, Dmitry Osipenko wrote:
> >> > On Monday, 11 June 2018 23:52:22 MSK
I'm announcing the release of the 4.16.15 kernel.
All users of the 4.16 kernel series must upgrade.
The updated 4.16.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.16.y
and can be browsed at the normal kernel.org git web
I'm announcing the release of the 4.17.1 kernel.
All users of the 4.17 kernel series must upgrade.
The updated 4.17.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.17.y
and can be browsed at the normal kernel.org git web browser:
in __kmem_cache_create->kmem_cache_open
with SLAB_PANIC, kernel will panic if it fail
On Tue, Jun 12, 2018 at 3:41 PM, cgxu...@gmx.com wrote:
>
>> 在 2018年6月12日，下午12:22，Zhouyang Jia 写道：
>>
>> When kmem_cache_create fails, the lack of error-handling code may
>> cause unexpected results.
>>
>>
On Tue, 12 Jun 2018 02:57:48 +0200
Karim Eshapa wrote:
> Use sign_extend32 kernel function instead of code duplication.
> Safe also for 16 bit.
>
> Signed-off-by: Karim Eshapa
Please resend as a fresh patch marked at V2 with a change log below the ---
so we can easily see what has changed.
This patch adds compat_id support to fme manager driver, it
reads the ID from the hardware register. And it could be used
for compatibility check before partial reconfiguration.
Signed-off-by: Wu Hao
Acked-by: Alan Tull
---
v6: add Acked-by from Alan.
---
drivers/fpga/dfl-fme-mgr.c | 15
The port header register set is always present for port, it is mainly
for capability, control and status of the ports that AFU connected to.
This patch implements header sub feature support. Below user interfaces
are created by this patch.
Sysfs interface:
* /sys/class/fpga_region///id
This patch adds compat_id support, it reuses fme manager's
compat id, as the per region compat id is actually from the
fme manager's register.
Signed-off-by: Wu Hao
Acked-by: Alan Tull
---
v5: reuse fme manager's compat_id as per region compat_id
v6: rebase, fix copyright time and add Acked-by
From: Xiao Guangrong
User Accelerated Function Unit sub feature exposes the MMIO region of
the AFU. After valid PR bitstream is programmed and the port is enabled,
then this MMIO region could be accessed.
This patch adds support to enumerate the AFU MMIO region and expose it
to userspace via
DMA memory regions are required for Accelerated Function Unit (AFU) usage.
These two ioctls allow user space applications to map user memory regions
for dma, and unmap them after use. Iova is returned from driver to user
space application via DFL_FPGA_PORT_DMA_MAP ioctl. Application needs to
unmap
On Tue, 2018-06-12 at 08:20 +0200, Greg Kroah-Hartman wrote:
> On Tue, Jun 12, 2018 at 02:14:25PM +1000, Benjamin Herrenschmidt wrote:
> > Hi Greg !
> >
> > There are a first round of updates of the FSI stack, aiming at
> > reducing/removing
> > the gap with the OpenBMC tree and a first step in
Add entry for FPGA Device Feature List (DFL) drivers.
Signed-off-by: Wu Hao
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 448957c..98fc5ea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5619,6 +5619,14 @@ F: drivers/fpga/
F:
In some cases, other DFL driver modules may need to access some port
operations, e.g disable / enable port for partial reconfiguration in
FME module. In order to avoid dependency between port and FME modules,
this patch introduces the dfl_fpga_port_ops support in DFL framework.
A global
DFL_FPGA_GET_API_VERSION and DFL_FPGA_CHECK_EXTENSION ioctls are common
ones which need to be supported by all feature devices drivers including
FME and AFU. Userspace application can use these ioctl interfaces to get
the API info and check if specific extension is supported or not in
current
From: Kang Luwei
The FPGA Management Engine (FME) provides power, thermal management,
performance counters, partial reconfiguration and other functions. For each
function, it is packaged into a private feature linked to the FME feature
device in the 'Device Feature List'. It's a platform device
This patch adds one common function in DFL framework. It uses
port_ops get_id callback to get port id and compare it with given
value. This function could be used as match function of the
dfl_fpga_cdev_find_port function.
Signed-off-by: Wu Hao
Acked-by: Alan Tull
---
v6: reabse and add Acked-by
From: Xiao Guangrong
This patch abstracts the common operations of the sub features, and defines
the feature_ops data structure, including init, uinit and ioctl function
pointers. And this patch adds some common helper functions for FME and AFU
drivers, e.g dfl_feature_dev_use_begin/end which
This patch adds fpga manager driver for FPGA Management Engine (FME). It
implements fpga_manager_ops for FPGA Partial Reconfiguration function.
Signed-off-by: Tim Whisonant
Signed-off-by: Enno Luebbers
Signed-off-by: Shiva Rao
Signed-off-by: Christopher Rauer
Signed-off-by: Kang Luwei
From: Zhang Yi
This patch implements the basic framework of the driver for FPGA PCIe
device which implements the Device Feature List (DFL) in its MMIO space.
This driver is verified on Intel(R) PCIe based FPGA DFL devices, including
both integrated (e.g Intel Server Platform with In-package
This patch adds fpga bridge platform driver for FPGA Management Engine.
It implements the enable_set callback for fpga bridge.
Signed-off-by: Tim Whisonant
Signed-off-by: Enno Luebbers
Signed-off-by: Shiva Rao
Signed-off-by: Christopher Rauer
Signed-off-by: Wu Hao
Acked-by: Alan Tull
This series is a mixed bag: Some code moves to deal with version 2 of the
TSENS IP in common functions, new platform support (sdm845), a cleanup
patch and a DT change to have a common way to deal with the SROT and TM
registers despite slightly different features across the IP family and
different
Hi Greg !
There are a first round of updates of the FSI stack, aiming at reducing/removing
he gap with the OpenBMC tree and a first step in getting dependent drivers
upstream.
These changes significantly improve the FSI bitbanging driver performance
and reliability, and add the new "sbefifo"
We also split up the regmap address space into two, one for the TM
registers, the other for the SROT registers. This was required to deal with
different address offsets for the TM and SROT registers across different
SoC families.
Since tsens-common.c/init_common() currently only registers one
The TSENS block inside the 8996 is internally classified as version 2.
Several other SoC families use this block and can share this code. Rename
get_temp() to reflect that it can be used across the v2 family.
Signed-off-by: Amit Kucheria
---
drivers/thermal/qcom/tsens-8996.c | 73
status_field and trdy are unused in any of the tsens drivers. Remove them.
Signed-off-by: Amit Kucheria
Reviewed-by: Bjorn Andersson
Acked-by: Rajendra Nayak
---
drivers/thermal/qcom/tsens.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/thermal/qcom/tsens.h
From: Rafael J. Wysocki
If a device link is added via device_link_add() by the driver of the
link's consumer device, the supplier's runtime PM usage counter is
going to be dropped by the pm_runtime_put_suppliers() call in
driver_probe_device(). However, in that case it is not incremented
unless
On Tue, Jun 12, 2018 at 10:15:40AM +0200, Linus Walleij wrote:
> On Mon, Jun 11, 2018 at 5:00 PM, Mark Brown wrote:
> > On Mon, Jun 11, 2018 at 03:11:14PM +0200, Linus Walleij wrote:
> >> Sadly this only handled the undocumented fixed
> >> regulator binding "reg-fixed-voltage". So I need to fix
On Tue, 12 Jun 2018 19:36:06 +0900
Masahiro Yamada wrote:
> Maybe, the commit title should be:
>
> mtd: rawnand: denali: add more clocks and improve setup_data_interface
Or you split that in 2 commits, one retrieving the new clks, and the
other one fixing/improving ->setup_data_interface().
>
Am Dienstag, 12. Juni 2018, 13:03:29 CEST schrieb Boris Brezillon:
> On Tue, 12 Jun 2018 19:36:06 +0900
> Masahiro Yamada wrote:
>
> > Maybe, the commit title should be:
> >
> > mtd: rawnand: denali: add more clocks and improve setup_data_interface
>
> Or you split that in 2 commits, one
Hi,
Good to see this patch!
On Tue, Jun 12, 2018 at 01:40:30PM +0800, Songjun Wu wrote:
> diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
> index ac7ad54f984f..bcd647060f3e 100644
> --- a/arch/mips/Kbuild.platforms
> +++ b/arch/mips/Kbuild.platforms
> @@ -12,6 +12,7 @@
[v4]
* Fixed console messages as per comments.
* Return error from qcom_resources_init()
in the cases where failed to get frequency domain.
* Rename cpu_dev to cpu_np in qcom_resources_init,
qcom_get_related_cpus(). Also use temp variable freq_np in
qcom_get_related_cpus().
*
The CPUfreq FW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this firmware.
Signed-off-by: Saravana Kannan
Signed-off-by: Taniya Das
---
drivers/cpufreq/Kconfig.arm | 9 +
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
SoCs. This is required for managing the cpu frequency transitions which are
controlled by firmware.
Signed-off-by: Taniya Das
---
.../bindings/cpufreq/cpufreq-qcom-fw.txt | 173 +
1 file
On Tue, Jun 12, 2018 at 11:25:35AM +0800, Zhouyang Jia wrote:
> When vmap fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling vmap.
>
Again, this is not error handling, this is just an error message. This
error condition
On Tue, Jun 12, 2018 at 11:50:46AM +0300, jackm wrote:
> On Fri, 8 Jun 2018 10:42:18 -0700
> Matthew Wilcox wrote:
>
> > + rcu_read_lock();
> > + mad_agent = idr_find(_mad_clients, hi_tid);
> > + if (mad_agent
> > && !atomic_inc_not_zero(_agent->refcount))
> > +
On Tue, 2018-06-12 at 13:44 +0200, Greg Kroah-Hartman wrote:
>
> > We are in regression only mode even before -rc1 these days ? including
> > for code that is basically completely unused upstream (which is what
> > this is trying to fix) ? :-) That's rather full-on ...
>
> For code that goes
On 08/06/18 22:52, Mathieu Poirier wrote:
On 8 June 2018 at 15:49, Mathieu Poirier wrote:
On Tue, Jun 05, 2018 at 10:43:21PM +0100, Suzuki K Poulose wrote:
Switch to updated coresight bindings for hw ports.
Cc: Sudeep Holla
Cc: Liviu Dudau
Cc: Mathieu Poirier
Signed-off-by: Suzuki K
Device Feature List (DFL) defines a feature list structure that creates
a link list of feature headers within the MMIO space to provide an
extensible way of adding features. This patch introduces a kernel module
to provide basic infrastructure to support FPGA devices which implement
the Device
Add a document for FPGA Device Feature List (DFL) Framework Overview.
Signed-off-by: Enno Luebbers
Signed-off-by: Xiao Guangrong
Signed-off-by: Wu Hao
Acked-by: Alan Tull
---
v2: added FME fpga-mgr/bridge/region platform driver to driver organization.
updated open discussion per current
On Tue, 2018-06-12 at 11:35 +0300, Andy Shevchenko wrote:
> On Tue, Jun 12, 2018 at 3:01 AM, Benjamin Herrenschmidt
> wrote:
> > There are still quite a few cases where a device might want to get to a
> > different node of the device-tree, obtain the resources and map them.
> >
> > Drivers doing
This patch introduces compat_id support to fpga manager, it adds
a fpga_compat_id pointer to fpga manager data structure to allow
fpga manager drivers to save the compatibility id. This compat_id
could be used for compatibility checking before doing partial
reconfiguration to associated fpga
This patch adds status sysfs interface for fpga manager, it's a
read only interface which allows user to get fpga manager status,
including full/partial reconfiguration error and other status
information. It adds a status callback to fpga_manager_ops too,
allows each fpga_manager driver to define
For feature devices drivers, both the FPGA Management Engine (FME) and
Accelerated Function Unit (AFU) driver need to expose user interfaces via
the device file, for example, mmap and ioctls.
This patch adds chardev support in the dfl driver for feature devices,
FME and AFU. It reserves the
This patch introduces a compat_id pointer member and sysfs interface
for each fpga region, similar as compat_id for fpga manager, it allows
applications to read the per region compat_id for compatibility
checking before other actions on this fpga-region (e.g PR).
Signed-off-by: Wu Hao
Acked-by:
On Mon, Jun 4, 2018 at 6:03 PM, Bjorn Andersson
wrote:
> On Sat 02 Jun 04:11 PDT 2018, Amit Kucheria wrote:
>> diff --git a/drivers/thermal/qcom/tsens-sdm845.c
>> b/drivers/thermal/qcom/tsens-sdm845.c
> [..]
>> +#define TRDY_OFFSET 0xe4
>> +#define TRDY_READY_BIT BIT(1)
>
> This is bit 0.
--
Hello,
I have a very Important Information for you, can you please contact me,
I look forward for your response.
Regards.
Mr.Ben
On Tue, Jun 12, 2018 at 08:54:39PM +1000, Benjamin Herrenschmidt wrote:
> Hi Greg !
>
> There are a first round of updates of the FSI stack, aiming at
> reducing/removing
> he gap with the OpenBMC tree and a first step in getting dependent drivers
> upstream.
>
> These changes significantly
On Tue, 2018-06-12 at 13:18 +0200, Greg Kroah-Hartman wrote:
> On Tue, Jun 12, 2018 at 08:54:39PM +1000, Benjamin Herrenschmidt wrote:
> > Hi Greg !
> >
> > There are a first round of updates of the FSI stack, aiming at
> > reducing/removing
> > he gap with the OpenBMC tree and a first step in
Hi Chengguang,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on tip/x86/core]
[also build test WARNING on v4.17 next-20180612]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day
I'm interested in financing your business project. I'm open to further
discussion aimed at reaching an agreement.
On Tue, Jun 12, 2018 at 09:25:11PM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2018-06-12 at 13:18 +0200, Greg Kroah-Hartman wrote:
> > On Tue, Jun 12, 2018 at 08:54:39PM +1000, Benjamin Herrenschmidt wrote:
> > > Hi Greg !
> > >
> > > There are a first round of updates of the FSI stack,
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