On 25-Sep 17:49, Peter Zijlstra wrote:
> On Mon, Sep 24, 2018 at 04:14:00PM +0100, Patrick Bellasi wrote:
[...]
> Well, with DL there are well defined rules for what to put in and what
> to then expect.
>
> For this thing, not so much I feel.
Maybe you'll prove me wrong, but that's not already
On 26/09/18 10:31, Banajit Goswami wrote:
+static irqreturn_t wcd9335_mbhc_sw_irq(int irq, void *data)
Are we supporting only headset and headphone detection for now ?
Extension cable and electrical detection will be supported later ?
And how about cases for slow insertion scenarios ?
I can
On 19/09/18 06:49, Rohit Kumar wrote:
Hello Srinivas,
We will add support for vi feedback usecase in sdm845 machine driver
where we have to support 4 channel tx data for a particular backend. We
should probably keep be_hw_params_fixup in respective machine driver for
now to support such r
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/pci/hotplug/cpqphp_core.c: In function 'init_SERR':
drivers/pci/hotplug/cpqphp_core.c:124:5: warning:
variable 'physical_slot' set but not used [-Wunused-but-set-variable]
Signed-off-by: YueHaibing
---
drivers/pci/hotplug/cpqphp_core.c | 2
On 26/09/18 03:59, Florian Fainelli wrote:
On 9/24/2018 8:01 AM, Jim Quinlan wrote:
On Mon, Sep 24, 2018 at 4:25 AM Ard Biesheuvel
wrote:
On Fri, 21 Sep 2018 at 19:41, Jim Quinlan wrote:
On Thu, Sep 20, 2018 at 5:39 PM Florian Fainelli
wrote:
On 09/20/2018 02:33 PM, Ard Biesheuvel wr
On 2018-09-25 23:48, Michal Hocko wrote:
On Tue 25-09-18 11:59:09, Vlastimil Babka wrote:
[...]
This seems like almost complete copy of __free_pages_boot_core(),
could
you do some code reuse instead? I think Michal Hocko also suggested
that.
Yes, please try to reuse as much code as possible
On 24.9.2018 09:41, Geert Uytterhoeven wrote:
> Hi Michal,
>
> On Thu, Sep 20, 2018 at 1:42 PM Michal Simek wrote:
>> The function travels the lookup table to record alias ids for the given
>> device match structures and alias stem.
>> This function will be used by serial drivers to check if requ
On Tue, Sep 25, 2018 at 10:34 PM Stuart Hayes wrote:
>
> From: Stuart Hayes
>
> The dell_rbu and dcdbas drivers need some changes, and should be moved to
> drivers/platform/x86. Additionally, dell_rbu needs a maintainer, and the
> listed maintainer for dcdbas is inactive and needs to be changed.
On Tue 2018-09-25 22:31:43, Sergey Senozhatsky wrote:
> On (09/25/18 14:23), Petr Mladek wrote:
> > The 32GB was mentioned as an example one year ego. This is not enough
> > for a new syscall from my point of view.
>
> I agree. I didn't think of syslog(); was merely thinking about logbuf
> and flu
On Wed, Sep 26, 2018 at 2:04 PM Andy Shevchenko
wrote:
>
> On Tue, Sep 25, 2018 at 10:34 PM Stuart Hayes
> wrote:
> >
> > From: Stuart Hayes
> >
> > The dell_rbu and dcdbas drivers need some changes, and should be moved to
> > drivers/platform/x86. Additionally, dell_rbu needs a maintainer, an
Fix english spelling in of_alias_get_alias_list().
Reported-by: Geert Uytterhoeven
Signed-off-by: Michal Simek
---
Greg: Please apply it on the top of tty-next because patch is going via
your tree.
---
drivers/of/base.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a
On Fri, Sep 21, 2018 at 9:20 AM Peter Feuerer wrote:
>
> Hi,
>
> 21. September 2018 03:45, "Paul Gortmaker"
> schrieb:
>
> > I came across this older netbook over the xmas holidays, and noticed the
> > acerhdf driver wouldn't load. Turns out the BIOS string was too new,
> > and not listed in the
On Tue, Sep 25, 2018 at 06:48:54PM +0200, Borislav Petkov wrote:
> > + eax = cpuid_eax(SGX_CPUID);
> > +
> > + if (eax & _X86_FEATURE_SGX1)
> > + set_cpu_cap(c, X86_FEATURE_SGX1);
> > +
> > + if (eax & _X86_FEATURE_SGX2)
> > + set_cpu_cap(c, X86_FEATURE_SGX2);
> > +
> > +
On 9/19/18 7:03 PM, Yang Shi wrote:
...
> Suggested-by: Michal Hocko
> Suggested-by: Kirill A. Shutemov
> Suggested-by: Matthew Wilcox
> Reviewed-by: Matthew Wilcox
> Cc: Laurent Dufour
> Cc: Vlastimil Babka
> Cc: Andrew Morton
> Signed-off-by: Yang Shi
This is indeed much better code st
On 2018-09-20 21:15:35 [-0700], Andy Lutomirski wrote:
> > I mean the fpu.initialized variable entirely. AFAIK, its only use is for
> > kernel threads — setting it to false lets us switch to a kernel thread and
> > back without saving and restoring. But TIF_LOAD_FPU should be able to
> > replace
On 9/19/18 7:03 PM, Yang Shi wrote:
> When unmapping VM_HUGETLB mappings, vm flags need to be updated. Since
> the vmas have been detached, so it sounds safe to update vm flags with
> read mmap_sem.
>
> Cc: Michal Hocko
> Cc: Vlastimil Babka
> Reviewed-by: Matthew Wilcox
> Signed-off-by: Yang S
On Wed, Sep 26, 2018 at 2:09 PM Andy Shevchenko
wrote:
>
> On Fri, Sep 21, 2018 at 9:20 AM Peter Feuerer wrote:
> >
> > Hi,
> >
> > 21. September 2018 03:45, "Paul Gortmaker"
> > schrieb:
> >
> > > I came across this older netbook over the xmas holidays, and noticed the
> > > acerhdf driver wou
On 9/19/18 7:03 PM, Yang Shi wrote:
> When unmapping VM_PFNMAP mappings, vm flags need to be updated. Since
> the vmas have been detached, so it sounds safe to update vm flags with
> read mmap_sem.
>
> Cc: Michal Hocko
> Cc: Vlastimil Babka
> Reviewed-by: Matthew Wilcox
> Signed-off-by: Yang Sh
MIPSR6 CPUs do not support unaligned load/store instructions
(LWL, LWR, SWL, SWR and LDL, LDR, SDL, SDR for 64bit).
Currently the MIPS tree has some special cases to avoid these
instructions, and the code is testing for !CONFIG_CPU_MIPSR6.
This patch declares a new Kconfig variable:
CONFIG_CPU_HA
Hi,
This is the v2 of:
https://www.linux-mips.org/archives/linux-mips/2018-09/msg00641.html
Changelog:
v1 -> v2:
- Rebased on v4.19-rc5
- Addressed Paul's comments:
https://www.linux-mips.org/archives/linux-mips/2018-09/msg00735.html
The patch is also available at:
https://github.com/yashac3
Hi,
> > The CoC is a political document:
> > https://web.archive.org/web/20180924234027/https://twitter.com/coralineada/status/1041465346656530432
> ...
> > Here is the author's post-meritocracy manifesto:
> > https://postmeritocracy.org/
>
> There have been those who have characterized the
Hi,
The below patch fixes the bootmem leftovers in csky. It is based on the
current mmots and csky build there fails because of undefined reference to
dma_direct_ops:
MODPOST vmlinux.o
kernel/dma/mapping.o: In function `dmam_alloc_attrs':
kernel/dma/mapping.c:143: undefined reference to `dma_di
Flip the branch condition after atomic_fetch_or_acquire(_Q_PENDING_VAL)
such that we loose the indent. This also result in a more natural code
flow IMO.
Signed-off-by: Peter Zijlstra (Intel)
---
kernel/locking/qspinlock.c | 56 +
1 file changed, 27 i
While working my way through the code again; I felt the comments could
use help.
Signed-off-by: Peter Zijlstra (Intel)
---
kernel/locking/qspinlock.c | 40
1 file changed, 28 insertions(+), 12 deletions(-)
--- a/kernel/locking/qspinlock.c
+++ b/kernel/
Back when Will did his qspinlock determinism patches, we were left with one
cmpxchg loop on x86 due to the use of atomic_fetch_or(). Will proposed a nifty
trick:
http://lkml.kernel.org/r/20180409145409.ga9...@arm.com
But at the time we didn't pursue it. This series implements that and argues fo
On x86 we cannot do fetch_or with a single instruction and end up
using a cmpxchg loop, this reduces determinism. Replace the fetch_or
with a very tricky composite xchg8 + load.
The basic idea is that we use xchg8 to test-and-set the pending bit
(when it is a byte) and then a load to fetch the who
Am Mittwoch, 26. September 2018, 08:24:57 CEST schrieb Akash Gajjar:
> Rockpro64 is a rockchip RK3399 based board from pine64.org.
> This patch adds basic device node support for Rockpro64 board and make it able
> to bring up.
>
> Peripheral Works
> - Sdcard
> - USB 2.0, 3.0
> - Leds
> - Ethernet
On Wed, Sep 26, 2018 at 02:11:39PM +0300, Jarkko Sakkinen wrote:
> Thank you. I guess I understand what you want me to do i.e.
>
> + { X86_FEATURE_SGX1, CPUID_EAX, 0, 0x0012, 0 },
> + { X86_FEATURE_SGX2, CPUID_EAX, 1, 0x0012, 0 },
> + { X86_FEATU
On Tue, Sep 25, 2018 at 12:10:13PM -0700, Matthias Kaehlcke wrote:
> +/**
> + * fwnode_get_bd_address - Get the Bluetooth Device Address (BD_ADDR) from
> the
> + * firmware node
> + * @fwnode: Pointer to the firmware node
> + * @bd_addr: Pointer to struct to store the BD a
On Fri 2018-09-14 20:19:53, Sergey Senozhatsky wrote:
> On (09/14/18 10:59), Petr Mladek wrote:
> >
> > Well, I am not sure if it is worth the code complexity.
> >
>
> Well, I don't think we need to bother that much here. Besides,
> exclusive_console is cleared under logbuf_lock with preemption
>
mmc name is recommended based on devicetree specification.
Signed-off-by: Michal Simek
---
arch/arm/boot/dts/zynq-7000.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index e22507e23303..ca6425ad794
Am Mittwoch, 26. September 2018, 06:53:57 CEST schrieb Chen-Yu Tsai:
> The Pine64 Rock64 board comes with a GigaDevice GD25Q128CSIG
> or GD25Q127CSIG chip, which is a 128 Mbit SPI NOR flash chip
> that supports the JEDEC read-ID command.
>
> This patch enables the SPI controller and adds a device
mmc name is recommended based on devicetree specification.
Signed-off-by: Michal Simek
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 29ce23
It is safe to move a deference below a NULL test.
Signed-off-by: zhong jiang
---
drivers/misc/cxl/guest.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/cxl/guest.c b/drivers/misc/cxl/guest.c
index 3bc0c15..559e835 100644
--- a/drivers/misc/cxl/guest.c
+++ b
The one obvious thing SH and ARM want is a sensible default for
tlb_start_vma(). (also: https://lkml.org/lkml/2004/1/15/6 )
Avoid all VIPT architectures providing their own tlb_start_vma()
implementation and rely on architectures to provide a no-op
flush_cache_range() when it is not relevant.
The
Use the new tlb_get_unmap_shift() to determine the stride of the
INVLPG loop.
Cc: Nick Piggin
Cc: Andrew Morton
Cc: "Aneesh Kumar K.V"
Cc: Will Deacon
Cc: Dave Hansen
Signed-off-by: Peter Zijlstra (Intel)
---
arch/x86/include/asm/tlb.h | 21 ++---
arch/x86/include/as
Move the mmu_gather::page_size things into the generic code instead of
powerpc specific bits.
Cc: Nick Piggin
Cc: Andrew Morton
Cc: "Aneesh Kumar K.V"
Cc: Will Deacon
Signed-off-by: Peter Zijlstra (Intel)
---
arch/Kconfig |3 +++
arch/arm/include/asm/tlb.h |3 +-
Hi,
Here is my current stash of generic mmu_gather patches that goes on top of
Will's
tlb patches:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tlb/asm-generic
And they include the s390 patches done by Heiko. At the end of this, there is
not a single arch left with a custom m
Provide a generic tlb_flush() implementation that relies on
flush_tlb_range(). This is a little awkward because flush_tlb_range()
assumes a VMA for range invalidation, but we no longer have one.
Audit of all flush_tlb_range() implementations shows only vma->vm_mm
and vma->vm_flags are used, and of
As the comment notes; it is a potentially dangerous operation. Just
use tlb_flush_mmu(), that will skip the (double) TLB invalidate if
it really isn't needed anyway.
Signed-off-by: Peter Zijlstra (Intel)
---
include/asm-generic/tlb.h | 10 +++---
mm/memory.c |2 +-
mm/mmu
Generic mmu_gather provides everything ia64 needs (range tracking).
Cc: Will Deacon
Cc: "Aneesh Kumar K.V"
Cc: Andrew Morton
Cc: Nick Piggin
Cc: Tony Luck
Signed-off-by: Peter Zijlstra (Intel)
---
arch/ia64/include/asm/tlb.h | 256 ---
arch/ia64/inc
Generic mmu_gather provides everything that ARM needs:
- range tracking
- RCU table free
- VM_EXEC tracking
- VIPT cache flushing
The one notable curiosity is the 'funny' range tracking for classical
ARM in __pte_free_tlb().
Cc: Nick Piggin
Cc: Andrew Morton
Cc: "Aneesh Kumar K.V"
Cc: Wil
There are no external users of this API (nor should there be); remove it.
Signed-off-by: Peter Zijlstra (Intel)
---
include/asm-generic/tlb.h |1 -
mm/mmu_gather.c | 34 +-
2 files changed, 17 insertions(+), 18 deletions(-)
--- a/include/asm-gener
Now that all architectures are converted to the generic code, remove
the arch hooks.
Signed-off-by: Peter Zijlstra (Intel)
---
mm/mmu_gather.c | 93 +---
1 file changed, 42 insertions(+), 51 deletions(-)
--- a/mm/mmu_gather.c
+++ b/mm/mmu_ga
From: Martin Schwidefsky
Cc: npig...@gmail.com
Cc: heiko.carst...@de.ibm.com
Cc: will.dea...@arm.com
Cc: aneesh.ku...@linux.vnet.ibm.com
Cc: a...@linux-foundation.org
Cc: Linus Torvalds
Cc: li...@armlinux.org.uk
Signed-off-by: Martin Schwidefsky
Signed-off-by: Peter Zijlstra (Intel)
Link: http
Write a comment explaining some of this..
Cc: Nick Piggin
Cc: Andrew Morton
Cc: "Aneesh Kumar K.V"
Cc: Will Deacon
Signed-off-by: Peter Zijlstra (Intel)
---
include/asm-generic/tlb.h | 119 --
1 file changed, 116 insertions(+), 3 deletions(-)
---
Make issuing a TLB invalidate for page-table pages the normal case.
The reason is twofold:
- too many invalidates is safer than too few,
- most architectures use the linux page-tables natively
and would thus require this.
Make it an opt-out, instead of an opt-in.
Acked-by: Will Deacon
Sig
Generic mmu_gather provides the simple flush_tlb_range() based range
tracking mmu_gather UM needs.
Cc: Will Deacon
Cc: "Aneesh Kumar K.V"
Cc: Andrew Morton
Cc: Nick Piggin
Cc: Richard Weinberger
Signed-off-by: Peter Zijlstra (Intel)
---
arch/um/include/asm/tlb.h | 156 -
Generic mmu_gather provides everything SH needs (range tracking and
cache coherency).
Cc: Will Deacon
Cc: "Aneesh Kumar K.V"
Cc: Andrew Morton
Cc: Nick Piggin
Cc: Yoshinori Sato
Cc: Rich Felker
Signed-off-by: Peter Zijlstra (Intel)
---
arch/sh/include/asm/pgalloc.h |7 ++
arch/sh/inclu
Needed for ia64 -- alternatively we drop the entire hook.
Cc: Will Deacon
Cc: "Aneesh Kumar K.V"
Cc: Andrew Morton
Cc: Nick Piggin
Signed-off-by: Peter Zijlstra (Intel)
---
include/asm-generic/tlb.h |2 ++
1 file changed, 2 insertions(+)
--- a/include/asm-generic/tlb.h
+++ b/include/asm
Since all architectures are now using it, it is redundant.
Signed-off-by: Peter Zijlstra (Intel)
---
include/asm-generic/tlb.h |1 -
mm/mmu_gather.c |4
2 files changed, 5 deletions(-)
--- a/include/asm-generic/tlb.h
+++ b/include/asm-generic/tlb.h
@@ -139,7 +139,6 @@
*
There are generally two cases:
1) either the platform has an efficient flush_tlb_range() and
asm-generic/tlb.h doesn't need any overrides at all.
2) or an architecture lacks an efficient flush_tlb_range() and
we override tlb_end_vma() and tlb_flush().
Convert all 'simple' architectures
From: Martin Schwidefsky
Add the Kconfig option HAVE_MMU_GATHER_NO_GATHER to the generic
mmu_gather code. If the option is set the mmu_gather will not
track individual pages for delayed page free anymore. A platform
that enables the option needs to provide its own implementation
of the __tlb_remo
AM654 SoCs have similar I2C IP as OMAP SoCs. Add new compatible to
handle AM654 SoCs.
Signed-off-by: Vignesh R
---
Documentation/devicetree/bindings/i2c/i2c-omap.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-omap.txt
b/Docume
Allow I2C_OMAP to be built for K3 platforms.
Signed-off-by: Vignesh R
---
drivers/i2c/busses/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 451d4ae50e66..ac4b09642f63 100644
--- a/drivers/i2c/busses/Kconfi
Couple of patches to enable i2c-omap driver to be used with TI's new
AM654 platforms.
Vignesh R (2):
dt-bindings: i2c-omap: Add new compatible for AM654 SoCs
i2c: busses: Kconfig: Enable I2C_OMAP for ARCH_K3
Documentation/devicetree/bindings/i2c/i2c-omap.txt | 1 +
drivers/i2c/busses/Kconfig
Hi Sascha,
On Wed, Sep 26, 2018 at 3:47 AM, Sascha Hauer wrote:
> It's:
> rate = *prate / prediv_value;
> rate = rate / div_value;
Yes, this looks correct. Thanks for the feedback.
> To me this looks correct. However, For an unsigned long type we have
> DIV_ROUND_UP() with whic
The uprobe feature on ARM64 kernel does not support ARM A32 instruction
probing, making 32 bit apps running on 64 bit kernel unprobeable.
This patchset utilizes ARM32 uprobe code in ARM64 tree with following
modifications:
- moves ARM32 uprobes code form arch/arm to lib/uprobes/arm to be reused
by
ARM probe decoding function has similar name in arm32 -
arm_probes_decode_insn(), and arm64 - arm_probe_decode_insn(). Change arm64
probes decoding function name from arm_probe_decode_insn() to
arm64_probes_decode_insn() to minimize the risk of confusion.
Signed-off-by: Maciej Slodczyk
---
arch/
Move ARM32 uprobes code from arch/arm/probes/ to a more common location -
lib/probes/arm/. This code will be used by ARM64 code when uprobing 32-bit
applications.
Signed-off-by: Maciej Slodczyk
---
arch/arm/probes/Makefile | 8
arch/arm/probes/kprobes/ac
A probes_handler_t() handler function prototype differ between ARM32 and
ARM64 arch subtrees. Make ARM64 prototype the same as ARM32 prototype and
adjust the ARM64 code to work with the new prototype.
Signed-off-by: Maciej Slodczyk
---
arch/arm64/include/asm/probes.h | 6 +-
arch/a
Fix checkpatch issues in moved arm uprobes code.
Signed-off-by: Maciej Slodczyk
---
lib/probes/arm/actions-arm.c | 4 ++--
lib/probes/arm/decode-arm.c | 1 +
lib/probes/arm/decode-arm.h | 4 ++--
lib/probes/arm/decode.c | 6 ++
lib/probes/arm/decode.h | 7 +--
5 files changed
There are many segments of ARM32 uprobes code that is very specific to
32-bit ARM arch and many differences between the two architectures that
could be made portable (e.g. register numbers). Exclude the ARM32 specific
code from ARM64 compilation process and make adjustments in ARM32 uprobes
code to
Detect what kind of instruction is being probed and depending on the
result:
- if an A64 instruction handle it the old way, using existing A64
instructions probing code,
- if an A32 instruction decode it and handle using the new code, moved
from 32 bit arm kernel tree.
Signed-off-by: Maciej Slodcz
In uprobes generic code, an arch specific software breakpoint instruction
is statically assigned with a #define statement. It does not allow to
examine the context and set the proper arch on runtime, which is the case
of uprobing either a 32 or 64 bit app on a 64-bit kernel. Introduce
get_swbp_insn
00+ tests for the Linux
and can be downloaded at:
https://github.com/linux-test-project/ltp/releases/tag/20180926
The project pages as well as GIT repository are hosted on GitHub:
https://github.com/linux-test-project/ltp
http://linux-test-project.github.io/
If you ever wondered how to write a
From: Colin Ian King
The inner check for mdev->mthca_flags & MTHCA_FLAG_MSI_X is redundant
as this is already true because of the previous identical check in
an outer if statement. Remove it
Detected by cppcheck:
(warning) Identical inner 'if' condition is always true.
Signed-off-by: Colin Ian
Hi,
On 2018-09-25 11:21 PM, Guenter Roeck wrote:
This patch causes my parisc qemu tests to fail.
Unfortunately I don't have any useful log output; the failure
is silent. Reverting the patch fixes the problem.
Can you be more specific on how to run these tests?
Dave
--
John David Anglin dave.
Export the symbol for genpd_dev_pm_attach_by_name() so that drivers
built as modules can call this function.
Signed-off-by: Jon Hunter
---
drivers/base/power/domain.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index 4b5714199490.
Now that the Tegra xHCI driver manages the XUSB power-domains itself,
remove the code to power-up the power-domains used by the xHCI device
from the PMC driver on boot.
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 16
1 file changed, 16 deletions(-)
diff --git a/driv
Add details for power-domains to the Tegra xHCI bindings so that
generic power-domains can be used for inconjunction with the xHCI
driver.
Signed-off-by: Jon Hunter
---
Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt | 8
1 file changed, 8 insertions(+)
diff --git a/Docu
Populate the power-domain properties for the xHCI device for Tegra210.
Signed-off-by: Jon Hunter
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 8fe47d644
This series add genpd support for the Tegra xHCI device that requires
more than one power-domain to operate.
This series is making changes to more than one subsystem and at first
glance may look like a maintainers nightmare. However, my proposal is
this, once reviewed and people are happy ...
1. P
The generic power-domain framework has been updated to allow devices
that require more than one power-domain to create a new device for
each power-domain required and then link these new power-domain
devices to the consumer device.
Update the Tegra xHCI driver to use the new APIs provided by the
g
Hi Antoine,
On lun., sept. 24 2018, Antoine Tenart wrote:
> This patch changes the PPv2 IRQ names in the CP110 device tree to match
> a corresponding change in the Marvell PPv2 driver. The reason this was
> updated is the IRQ where names after Tx/Rx interrupts, but this is not
> true and can b
Hi Antoine,
On lun., sept. 24 2018, Antoine Tenart wrote:
> This patch describes 3 additional interrupts per PPv2 port. Those
> interrupts will be used later in future versions of the Marvell PPv2
> driver, and now the device tree description matches the hardware
> capabilities.
>
> Signed-off
I added the series (with a small fixup for 25 and added one Acked-by)
to
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux.git apv11
I can still add Rb and Acks.
I will probably merge this in kvms390/next at the end of the week.
On 09/26/2018 01:16 AM, Tony Krowiak wrote:
> From: Tony
Commit-ID: dbfe2953f63c640463c630746cd5d9de8b2f63ae
Gitweb: https://git.kernel.org/tip/dbfe2953f63c640463c630746cd5d9de8b2f63ae
Author: Jiri Kosina
AuthorDate: Tue, 25 Sep 2018 14:38:18 +0200
Committer: Thomas Gleixner
CommitDate: Wed, 26 Sep 2018 14:26:51 +0200
x86/speculation: Apply
Hi Lorenzo, Gustavo,
Thank you for reviewing.
On Tue, 25 Sep 2018 18:53:01 +0100
Gustavo Pimentel wrote:
> On 25/09/2018 17:14, Lorenzo Pieralisi wrote:
> > [+Gustavo, please have a look at INTX/MSI management]
> >
> > On Thu, Sep 06, 2018 at 06:40:32PM +0900, Kunihiko Hayashi wrote:
> >> This
Commit-ID: bb4b3b7762735cdaba5a40fd94c9303d9ffa147a
Gitweb: https://git.kernel.org/tip/bb4b3b7762735cdaba5a40fd94c9303d9ffa147a
Author: Jiri Kosina
AuthorDate: Tue, 25 Sep 2018 14:39:28 +0200
Committer: Thomas Gleixner
CommitDate: Wed, 26 Sep 2018 14:26:52 +0200
x86/speculation: Propag
Commit-ID: 53c613fe6349994f023245519265999eed75957f
Gitweb: https://git.kernel.org/tip/53c613fe6349994f023245519265999eed75957f
Author: Jiri Kosina
AuthorDate: Tue, 25 Sep 2018 14:38:55 +0200
Committer: Thomas Gleixner
CommitDate: Wed, 26 Sep 2018 14:26:52 +0200
x86/speculation: Enable
Hi Rob,
On Tue, 25 Sep 2018 15:55:02 -0500 wrote:
> On Thu, Sep 06, 2018 at 06:40:31PM +0900, Kunihiko Hayashi wrote:
> > Add DT bindings for PCIe controller implemented in UniPhier SoCs when
> > configured in Root Complex (host) mode. This controller is based on
> > the DesignWare PCIe core.
>
On Thu, Sep 20, 2018 at 01:03:38AM +0800, Yang Shi wrote:
>
> Yang Shi (3):
> mm: mmap: zap pages with read mmap_sem in munmap
> mm: unmap VM_HUGETLB mappings with optimized path
> mm: unmap VM_PFNMAP mappings with optimized path
>
> mm/mmap.c | 50 +
Daniel,
On 01/05/2018 at 10:36, Daniel Lezcano wrote:
On Wed, Apr 25, 2018 at 12:14:39PM +0200, Alexandre Belloni wrote:
smatch now reports a possible leak:
smatch warnings:
drivers/clocksource/timer-atmel-pit.c:183 at91sam926x_pit_dt_init() warn:
possible memory leak of 'data'
Ensure data i
On Wed, Sep 26, 2018 at 08:48:58AM +0530, Aneesh Kumar K.V wrote:
> We clear the pte temporarily during read/modify/write update of the pte. If we
> take a page fault while the pte is cleared, the application can get SIGBUS.
> One
> such case is with remap_pfn_range without a backing vm_ops->fault
Hi,
On Wed, Sep 26, 2018 at 04:30:39PM +0800, Baolin Wang wrote:
> Hi Linus,
>
> On 26 September 2018 at 16:00, Linus Walleij wrote:
> > On Wed, Sep 26, 2018 at 4:59 AM Baolin Wang wrote:
> >
> >> Introduce one property to present the battery internal resistance for
> >> battery
> >> informati
Hi Peter,
On Wed, Sep 26, 2018 at 01:36:23PM +0200, Peter Zijlstra wrote:
> Here is my current stash of generic mmu_gather patches that goes on top of
> Will's
> tlb patches:
FWIW, patches 1,2,15,16,17 and 18 look fine to me, so:
Acked-by: Will Deacon
for those.
I'll leave some minor comment
Making it work on 64-bit caused 32-bit builds to regress:
drivers/net/ethernet/ni/nixge.c: In function 'nixge_hw_dma_bd_release':
drivers/net/ethernet/ni/nixge.c:254:9: error: cast to pointer from integer of
different size [-Werror=int-to-pointer-cast]
skb = (struct sk_buff *)
^
In fi
Hi Suman,
On 09/25/2018 09:02 PM, Suman Anna wrote:
> Hi Arnaud,
>
>> On 09/25/2018 02:25 AM, Suman Anna wrote:
>>> Hi Srinivas,
>>>
>>> On 06/15/2018 04:59 AM, Srinivas Kandagatla wrote:
Some of the rpmsg devices need to switch on power domains to communicate
with remote processor. Fo
Selecting AC97_BUS_NEW from SND_PXA2XX_SOC_AC97 leads to a Kconfig
warning if any other driver selects AC97_BUS:
WARNING: unmet direct dependencies detected for AC97_BUS_COMPAT
Depends on [n]: SOUND [=y] && !UML && SND [=y] && AC97_BUS_NEW [=y] &&
!AC97_BUS [=y]
Selected by [y]:
- SND_SOC_W
From: Florian Dollinger
Hi there! Why do you re-engineer the wheel? :) There is already a fully
functional and tested driver out there (https://github.com/atar-axis/xpadneo).
Would be much easier to help me (the owner of xpadneo) to push it into the
kernel.
Hi all,
On Fri, Sep 21, 2018 at 02:02:26PM +0200, Sebastian Andrzej Siewior wrote:
> We reproducibly observe cache line starvation on a Core2Duo E6850 (2
> cores), a i5-6400 SKL (4 cores) and on a NXP LS2044A ARM Cortex-A72 (4
> cores).
>
> Instrumentation show always the picture:
>
> CPU0
On Wed, Sep 26, 2018 at 01:36:29PM +0200, Peter Zijlstra wrote:
> Needed for ia64 -- alternatively we drop the entire hook.
Ack for dropping the hook.
Will
On Wed, Sep 26, 2018 at 01:36:28PM +0200, Peter Zijlstra wrote:
> Provide a generic tlb_flush() implementation that relies on
> flush_tlb_range(). This is a little awkward because flush_tlb_range()
> assumes a VMA for range invalidation, but we no longer have one.
>
> Audit of all flush_tlb_range(
On Wed, Sep 26, 2018 at 01:36:31PM +0200, Peter Zijlstra wrote:
> Generic mmu_gather provides everything that ARM needs:
>
> - range tracking
> - RCU table free
> - VM_EXEC tracking
> - VIPT cache flushing
>
> The one notable curiosity is the 'funny' range tracking for classical
> ARM in __pt
The recent rework of the mt76 driver caused build failures in
configurations that leave the mt76x0u support disabled:
ERROR: "mt76u_mcu_deinit"
[drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0-common.ko] undefined!
ERROR: "mt76x02u_set_txinfo"
[drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0-c
On Tue, Sep 18, 2018 at 03:28:56PM +0200, Greg KH wrote:
> On Thu, Sep 06, 2018 at 03:42:14PM +0200, Ludovic Desroches wrote:
> > From: Nicolas Ferre
> >
> > When mode is set in atmel_config_iso7816() we backup last RS232 mode
> > for coming back to this mode if requested.
> > Also allow setup of
The icc_debugfs_dir variable is only used inside of an #ifdef
and should be moved into the same to avoid a harmless warning:
drivers/interconnect/core.c:26:23: error: 'icc_debugfs_dir' defined but not
used [-Werror=unused-variable]
Fixes: d54599e06b06 ("interconnect: Allow endpoints translation
Daniel Jordan writes:
> On Tue, Sep 25, 2018 at 03:13:30PM +0800, Huang Ying wrote:
>> @@ -3487,35 +3521,66 @@ static int __swap_duplicate_locked(struct
>> swap_info_struct *p,
>> }
>>
>> /*
>> - * Verify that a swap entry is valid and increment its swap map count.
>> + * Verify that the swa
On 09/25/2018 01:27 PM, Tong Zhang wrote:
Kernel Version: 4.18.5
Problem Description:
search_binary_handler() should be called after setting bprm using
prepare_binprm(),
and in prepare_binprm(), there’s a LSM hook security_bprm_set_creds(),
which can make a decision that binfmt cares.
We foun
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