On 12. 09. 19 18:38, Paul Thomas wrote:
>>> ---
>>> drivers/tty/serial/xilinx_uartps.c | 2 ++
>>> 1 file changed, 2 insertions(+)
>>>
>>> diff --git a/drivers/tty/serial/xilinx_uartps.c
>>> b/drivers/tty/serial/xilinx_uartps.c
>>> index 9dcc4d855ddd..ece7f6caa994 100644
>>> ---
Configure the port capabilities based on usb_dr_mode settings.
Based on work by JC Kuo .
Signed-off-by: Nagarjuna Kristam
Reviewed-by: JC Kuo
Acked-by: Thierry Reding
---
drivers/phy/tegra/xusb-tegra210.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git
Tegra210 has one XUSB device mode controller, which can be operated
HS and SS modes. Add DT support for XUSB device mode controller.
Signed-off-by: Nagarjuna Kristam
Reviewed-by: JC Kuo
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 19 +++
1 file changed, 19 insertions(+)
Patches 1-3 are phy driver changes to add support for device
mode.
Patches 4-7 are changes related to XUSB device mode
controller driver.
Patch 8 is to enable drivers for XUDC support in defconfig
Test Steps(USB 2.0):
- Enable "USB Gadget precomposed configurations" in defconfig
- Build, flash
On Tegra210, usb2 only otg/peripheral ports dont work in device mode.
They need an assosciated usb3 port to work in device mode. Identify
an unused usb3 port and assign it as a fake USB3 port to USB2 only
port whose mode is otg/peripheral.
Based on work by BH Hsieh .
Signed-off-by: Nagarjuna
Tegra XUSB device control driver needs to control vbus override
during its operations, add API for the support.
Signed-off-by: Nagarjuna Kristam
Acked-by: Thierry Reding
---
drivers/phy/tegra/xusb-tegra210.c | 57 +++
drivers/phy/tegra/xusb.c | 22
Enable Nvidia XUSB device mode controller driver and USB GPIO Based
Connection Detection Driver as module.
Signed-off-by: Nagarjuna Kristam
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index
Enable XUSB device mode driver for USB0 slot on Jetson TX1.
Signed-off-by: Nagarjuna Kristam
Reviewed-by: JC Kuo
---
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 31 +-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git
Add device-tree binding documentation for the XUSB device mode controller
present on Tegra210 SoC. This controller supports the USB 3.0
specification.
Signed-off-by: Nagarjuna Kristam
Reviewed-by: JC Kuo
Reviewed-by: Rob Herring
Acked-by: Thierry Reding
---
On 13/09/2019 00.30, Miguel Ojeda wrote:
> On Fri, Sep 13, 2019 at 12:19 AM Rasmus Villemoes
> wrote:
>>
>> Patch 1 has already been picked up by Greg in staging-next, it's
>> included here for completeness. I don't know how to route the rest, or
>> if they should simply wait for 5.5 given how
Hi Randy,
On 02. 09. 19 18:52, Linus Torvalds wrote:
> On Mon, Sep 2, 2019 at 6:17 AM Michal Simek wrote:
>>
>> Randy/Linus: Are you going create regular patch from this?
>
> Since I can't even test it, and Randy did most of the work (and that
> last patch worked for him too), I'd suggest he
Fix build failure on powerpc.
Fix preemption imbalance.
Signed-off-by: Christophe Leroy
---
mm/arch_pgtable_test.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/mm/arch_pgtable_test.c b/mm/arch_pgtable_test.c
index 8b4a92756ad8..f2b3c9ec35fa 100644
--- a/mm/arch_pgtable_test.c
+++
On 09/12/2019 08:12 PM, Christophe Leroy wrote:
> Hi,
>
> I didn't get patch 1 of this series, and it is not on linuxppc-dev patchwork
> either. Can you resend ?
Its there on linux-mm patchwork and copied on linux-kernel@vger.kernel.org
as well. The CC list for the first patch was different
This patch adds UDC driver for tegra XUSB 3.0 device mode controller.
XUSB device mode controller supports SS, HS and FS modes
Based on work by:
Mark Kuo
Hui Fu
Andrew Bresticker
Signed-off-by: Nagarjuna Kristam
Acked-by: Thierry Reding
---
drivers/usb/gadget/udc/Kconfig | 11
Le 12/09/2019 à 17:52, Christophe Leroy a écrit :
Le 12/09/2019 à 17:36, Christophe Leroy a écrit :
Le 12/09/2019 à 17:00, Christophe Leroy a écrit :
On 09/12/2019 06:02 AM, Anshuman Khandual wrote:
This adds a test module which will validate architecture page table
helpers
and
Le 13/09/2019 à 08:24, Anshuman Khandual a écrit :
On 09/12/2019 08:12 PM, Christophe Leroy wrote:
Hi,
I didn't get patch 1 of this series, and it is not on linuxppc-dev patchwork
either. Can you resend ?
Its there on linux-mm patchwork and copied on linux-kernel@vger.kernel.org
as
Hi Adam,
> Am 12.09.2019 um 20:30 schrieb Adam Ford :
>
> The thermal sensor in the omap3 family isn't accurate, but it's
> better than nothing. The various OPP's enabled for the omap3630
> support up to OPP1G, however the datasheet for the DM3730 states
> that OPP130 and OPP1G are not
On 09/13/2019 11:53 AM, Christophe Leroy wrote:
> Fix build failure on powerpc.
>
> Fix preemption imbalance.
>
> Signed-off-by: Christophe Leroy
> ---
> mm/arch_pgtable_test.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/mm/arch_pgtable_test.c b/mm/arch_pgtable_test.c
> index
Le 13/09/2019 à 08:58, Anshuman Khandual a écrit :
On 09/13/2019 11:53 AM, Christophe Leroy wrote:
Fix build failure on powerpc.
Fix preemption imbalance.
Signed-off-by: Christophe Leroy
---
mm/arch_pgtable_test.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
On Wed, 11 Sep 2019 16:11:29 -0600
Jens Axboe wrote:
> On 9/11/19 12:43 PM, Dan Carpenter wrote:
> >
> > I kind of hate all this extra documentation because now everyone thinks
> > they can invent new hoops to jump through.
>
> FWIW, I completely agree with Dan (Carpenter) here. I absolutely
Le 13/09/2019 à 09:03, Christophe Leroy a écrit :
Le 13/09/2019 à 08:58, Anshuman Khandual a écrit :
On 09/13/2019 11:53 AM, Christophe Leroy wrote:
Fix build failure on powerpc.
Fix preemption imbalance.
Signed-off-by: Christophe Leroy
---
mm/arch_pgtable_test.c | 3 +++
1 file
Am 12.09.2019 22:44, schrieb Christophe JAILLET:
> The 2nd parameter of 'find_first_zero_bit()' is a number of bits, not of
> bytes. So use 'BITS_PER_LONG' instead of 'sizeof(lanes_used)'.
>
> Fixes: 1fc3b37f34f6 ("media: v4l: cadence: Add Cadence MIPI-CSI2 RX driver")
> Signed-off-by:
On 12/09/2019 21:32, Stefan Wahren wrote:
>
> Am 12.09.19 um 19:18 schrieb Matthias Brugger:
>>
>> On 10/09/2019 11:27, Matthias Brugger wrote:
>>>
>>> On 09/09/2019 21:33, Stefan Wahren wrote:
Hi Nicolas,
Am 09.09.19 um 11:58 schrieb Nicolas Saenz Julienne:
> Hi all,
>
On Thu, 12 Sep 2019 13:23:38 +0200
Thomas Huth wrote:
> Hmm, we already talked about deprecating support for pre-3.15 kernel
> stuff in the past (see
> https://wiki.qemu.org/ChangeLog/2.12#Future_incompatible_changes for
> example),
Btw: did we ever do that? I don't quite recall what code we
On 12/09/2019 20.03, Vinod Koul wrote:
> On 09-09-19, 09:30, Peter Ujfalusi wrote:
>
or domain-dma-controller?
>>>
>>> I feel dma-domain-controller sounds fine as we are defining domains for
>>> dmaengine. Another thought which comes here is that why not extend this to
>>> slave as well
Hi,
since the merge window is closing in and y'all are on a conference, I
thought I should take another stab at it. It being something which Ingo,
Linus and Peter have suggested in the past at least once.
Instead of calling memset:
8100cd8d: e8 0e 15 7a 00 callq
There are two parts which should be fixed. The first one is to assigned
uartps_major at the end of probe() to avoid complicated logic when
something fails.
The second part is initialized uartps_major number to 0 when last device is
removed. This will ensure that on next probe driver will ask for
On Thu, 2019-09-12 at 18:39 -0300, Rodrigo Carvalho wrote:
> This patch add device tree binding documentation for ADIS16240.
>
> Signed-off-by: Rodrigo Ribeiro Carvalho
> ---
> V2:
> - Remove true constant for spi-cpha and spi-cpol
> - Add description field for spi-cpha and spi-cpol
> -
Hi Dmitry,
On 2019-09-12 22:13, Dmitry Torokhov wrote:
Hi Robin,
On Wed, Sep 04, 2019 at 06:23:29AM +, Robin van der Gracht wrote:
The first generation i.MX6 processors does not send an interrupt when
the
power key is pressed. It sends a power down request interrupt if the
key is
On 13/09/19 06:46, Greg Kroah-Hartman wrote:
> USB drivers expect kmalloc to return DMA-able memory. I don't know
> about specific alignment issues, that should only an issue for the host
> controller being used here, which you do not say in the above list.
I have no idea, this is just the
On 13/09/2019 09.20, Cornelia Huck wrote:
> On Thu, 12 Sep 2019 13:23:38 +0200
> Thomas Huth wrote:
>
>> Hmm, we already talked about deprecating support for pre-3.15 kernel
>> stuff in the past (see
>> https://wiki.qemu.org/ChangeLog/2.12#Future_incompatible_changes for
>> example),
>
> Btw:
* Borislav Petkov wrote:
> Hi,
>
> since the merge window is closing in and y'all are on a conference, I
> thought I should take another stab at it. It being something which Ingo,
> Linus and Peter have suggested in the past at least once.
>
> Instead of calling memset:
>
>
On 13.09.19 09:34, Thomas Huth wrote:
> On 13/09/2019 09.20, Cornelia Huck wrote:
>> On Thu, 12 Sep 2019 13:23:38 +0200
>> Thomas Huth wrote:
>>
>>> Hmm, we already talked about deprecating support for pre-3.15 kernel
>>> stuff in the past (see
>>>
At the Maintainer's Summit yesterday, we created a new mailing list:
workfl...@vger.kernel.org, where various Maintainers can share their
workflows for handling patch review, collection, testing, and
submission.
We will also be discussing what requirements should be for
infrastructure that will
On 2019-09-04 08:52, Marco Felsch wrote:
Hi Robin,
thanks for the patch it looks quite good, just two minor nitpicks.
On 19-09-04 06:23, Robin van der Gracht wrote:
The first generation i.MX6 processors does not send an interrupt when
the
power key is pressed. It sends a power down request
Hi Linus,
here's an early pull request from EDAC-land for the upcoming merge
window. The new thing this time around is that we have three maintainers
now and a new, old repo. New because it is new for the EDAC tree which
is hosted there from now on and old because it is Tony's and mine's old
RAS
On 13/09/2019 09.37, David Hildenbrand wrote:
> On 13.09.19 09:34, Thomas Huth wrote:
>> On 13/09/2019 09.20, Cornelia Huck wrote:
>>> On Thu, 12 Sep 2019 13:23:38 +0200
>>> Thomas Huth wrote:
>>>
Hmm, we already talked about deprecating support for pre-3.15 kernel
stuff in the past
Bob,
On Thu, 12 Sep 2019, Moore, Robert wrote:
The ability to unload an ACPI table (especially AML tables such as
SSDTs) is in the process of being deprecated in ACPICA -- since it is
also deprecated in the current ACPI specification. This is being done
because of the difficulty of deleting
On 12.09.19 21:18, Dexuan Cui wrote:
>> From: David Hildenbrand
>> Sent: Thursday, September 12, 2019 3:09 AM
>> On 12.09.19 01:36, Dexuan Cui wrote:
>>> When hibernation is enabled, we must ignore the balloon up/down and
>>> hot-add requests from the host, if any.
>>
>> Why do you even care
On Thu, Aug 22, 2019 at 4:59 AM Kevin Hilman wrote:
>
> Guillaume La Roque writes:
>
> > Add minimal thermal zone for two temperature sensor
> > One is located close to the DDR and the other one is
> > located close to the PLLs (between the CPU and GPU)
> >
> > Signed-off-by: Guillaume La Roque
On 13.09.19 09:43, Thomas Huth wrote:
> On 13/09/2019 09.37, David Hildenbrand wrote:
>> On 13.09.19 09:34, Thomas Huth wrote:
>>> On 13/09/2019 09.20, Cornelia Huck wrote:
On Thu, 12 Sep 2019 13:23:38 +0200
Thomas Huth wrote:
> Hmm, we already talked about deprecating support
On Fri, Sep 13, 2019 at 09:35:30AM +0200, Ingo Molnar wrote:
> That looks exciting - I'm wondering what effects this has on code
> footprint - for example defconfig vmlinux code size, and what the average
> per call site footprint impact is?
>
> If the footprint effect is acceptable, then I'd
On Thu, 12 Sep 2019 at 22:18, Thara Gopinath wrote:
>
> On 09/12/2019 11:04 AM, Ulf Hansson wrote:
>
> Hi Ulf,
>
> Thanks for the review.
> > On Tue, 10 Sep 2019 at 19:14, Thara Gopinath
> > wrote:
> >>
> >> Resources modeled as power domains in linux kenrel
> >> can be used to warm the
Hi Christophe,
On Thu, Sep 12, 2019 at 10:44:50PM +0200, Christophe JAILLET wrote:
> The 2nd parameter of 'find_first_zero_bit()' is a number of bits, not of
> bytes. So use 'BITS_PER_LONG' instead of 'sizeof(lanes_used)'.
>
> Fixes: 1fc3b37f34f6 ("media: v4l: cadence: Add Cadence MIPI-CSI2 RX
On Thu, Sep 12, 2019 at 10:46:58PM +0200, Jernej Škrabec wrote:
> Dne četrtek, 12. september 2019 ob 22:34:27 CEST je Maxime Ripard napisal(a):
> > On Thu, Sep 12, 2019 at 10:28:37PM +0200, Jernej Škrabec wrote:
> > > Dne četrtek, 12. september 2019 ob 22:20:57 CEST je Maxime Ripard
> napisal(a):
Cpupower tool has set and info options which are being used only by
x86 machines. This patch removes support for these two subcommands
from generic cpupower utility. Thus, these two subcommands will now be
available only for intel.
This removes the ambiguous error message while using set option in
On 12/09/2019 21:32, Stefan Wahren wrote:
>
> Am 12.09.19 um 19:18 schrieb Matthias Brugger:
>>
>> On 10/09/2019 11:27, Matthias Brugger wrote:
>>>
>>> On 09/09/2019 21:33, Stefan Wahren wrote:
Hi Nicolas,
Am 09.09.19 um 11:58 schrieb Nicolas Saenz Julienne:
> Hi all,
>
From: Colin Ian King
There is a spelling mistake in the debugfs output, fix it.
Signed-off-by: Colin Ian King
---
kernel/irq/debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/irq/debugfs.c b/kernel/irq/debugfs.c
index c1eccd4f6520..55b1b7ce667e 100644
---
Hi Linus,
please pull this branch
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git ras-core-for-linus
to receive the latest meager RAS updates for 5.4:
- Enable processing of action-optional MCEs which have the Overflow bit set
(Tony Luck)
- -Wmissing-prototypes warning fix and a
On Tue, Sep 3, 2019 at 11:26 PM Stephane Eranian wrote:
>
> Now that the default perf_events paranoid level is set to 2, a regular user
> cannot monitor kernel level activity anymore. As such, with the following
> cmdline:
>
> $ perf record -e cycles date
>
> The perf tool first tries cycles:uk
On Thu, Sep 12, 2019 at 11:11:32AM +0100, Linus Walleij wrote:
> Hi Rahul,
>
> thanks for your patches!
>
> On Thu, Sep 12, 2019 at 8:59 AM Rahul Tanwar
> wrote:
>
> > This series is to add pinctrl & GPIO controller driver for a new SoC.
> > Patch 1 adds pinmux & GPIO controller driver.
> >
On Thu, Sep 12, 2019 at 11:37:34AM +0100, Kieran Bingham wrote:
> The r8a77970 was added with an compatible string for a differnet device
> rather than adding the correct compatible to the driver.
>
> Remove the unnecessary compatible which is for a different platform.
>
> Signed-off-by: Kieran
On Thu, Sep 12, 2019 at 11:31:43AM +0100, Kieran Bingham wrote:
> The pwm3 was incorrectly added with a compatible reference to the
> renesas,pwm-r8a7790 (H2) due to a single characther ommision.
>
> Fix the compatible string.
>
> Fixes: de625477c632 ("arm64: dts: renesas: r8a779{7|8}0: add PWM
Hi Brad,
On Tue, Sep 03, 2019 at 04:33:23PM +0300, Mika Westerberg wrote:
> On Tue, Sep 03, 2019 at 08:54:02PM +0800, Brad Campbell wrote:
> > On 3/9/19 7:55 pm, Mika Westerberg wrote:
> > > On Tue, Sep 03, 2019 at 07:11:32PM +0800, Brad Campbell wrote:
> > >
> > > I think the problem is that
On 12.09.19 03:37, Naoya Horiguchi wrote:
> On Wed, Sep 11, 2019 at 12:27:22PM +0200, David Hildenbrand wrote:
>> On 10.09.19 12:30, Oscar Salvador wrote:
>>> From: Naoya Horiguchi
>>>
>>> Currently madvise_inject_error() pins the target via get_user_pages_fast.
>>> The call to
Hi Marco,
Ack for all, v3 incoming.
Thank you,
Gilles
- Le 12 Sep 19, à 12:12, Marco Felsch m.fel...@pengutronix.de a écrit :
> Hi Gilles,
>
> On 19-09-12 06:01, Gilles Doffe wrote:
>> Hi Marco,
>>
>> Thanks for your reply and sorry about the delay.
>
> No worries ;)
>
>> - Le 22
On 09/13/2019 12:41 PM, Christophe Leroy wrote:
>
>
> Le 13/09/2019 à 09:03, Christophe Leroy a écrit :
>>
>>
>> Le 13/09/2019 à 08:58, Anshuman Khandual a écrit :
>>> On 09/13/2019 11:53 AM, Christophe Leroy wrote:
Fix build failure on powerpc.
Fix preemption imbalance.
Since the logic for `spi_delay` struct + `spi_delay_exec()` has been copied
from the `cs_change_delay` logic, it's natural to make this delay, the
first user.
The `cs_change_delay` logic requires that the default remain 10 uS, in case
it is unspecified/unconfigured. So, there is some special
On 13/09/2019 08:37, Jonas Karlman wrote:
> On 2019-09-11 19:02, Cheng-yi Chiang wrote:
>> On Thu, Sep 12, 2019 at 12:54 AM Jernej Škrabec
>> wrote:
>>> Dne sreda, 11. september 2019 ob 18:23:59 CEST je Neil Armstrong napisal(a):
On 11/09/2019 10:26, Cheng-Yi Chiang wrote:
> From: Yakir
The `cs_change_delay` backwards compatibility value could be moved outside
of the switch statement.
The only reason to do it, is to make the next patches easier to diff.
Signed-off-by: Alexandru Ardelean
---
drivers/spi/spi.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
The Spreadtrum SPI driver is the only user of the `word_delay` field in
the `spi_transfer` struct.
This change converts the field to use the `spi_delay` struct. This also
enforces the users to specify the delay unit to be `SPI_DELAY_UNIT_SCK`.
Signed-off-by: Alexandru Ardelean
---
The `word_delay` field had it's type changed to `struct spi_delay`.
This allows users to specify nano-second or clock-cycle delays (if needed).
Converting to use `word_delay` is straightforward: it's just assigning the
value to `word_delay.value` and hard-coding the `word_delay.unit` to
The tegra114 driver has a weird/separate `tegra_spi_transfer_delay()`
function that does 2 delays: one mdelay() and one udelay().
This was introduced via commit f4fade12d506e14867a2b0a5e2f7aaf227297d8b
("spi/tegra114: Correct support for cs_change").
There doesn't seem to be a mention in that
This change replaces the use of the `delay_usecs` field with the new
`delay` field. The code/test still uses micro-seconds, but they are now
configured and used via the `struct spi_delay` format of the `delay` field.
Signed-off-by: Alexandru Ardelean
---
drivers/spi/spi-loopback-test.c | 12
This change does a conversion from the `word_delay_usecs` -> `word_delay`
for the `spi_device` struct.
This allows users to specify inter-word delays in other unit types
(nano-seconds or clock cycles), depending on how users want.
The Atmel SPI driver is the only current user of the
Initially, I started this patchset thinking: "we need a new delay for
something-something" (in case someone is curios, we need a CS-hold-time for
the first transfer, because the CS wakes a chip from sleep-mode).
Then I added the delay, and felt a bit dirty-inside about adding a new one
(just like
The `delay` field has type `struct spi_delay`.
This allows users to specify nano-second or clock-cycle delays (if needed).
Converting to use `delay` is straightforward: it's just assigning the
value to `delay.value` and hard-coding the `delay.unit` to
`SPI_DELAY_UNIT_USECS`.
This keeps the uapi
The change introduces the `delay` field to the `spi_transfer` struct as an
`struct spi_delay` type.
This intends to eventually replace `delay_usecs`.
But, since there are many users of `delay_usecs`, this needs some
intermediate work.
A helper called `spi_transfer_delay()` is also added, which
There are plenty of delays that have been introduced in SPI core. Most of
them are in micro-seconds, some need to be in nano-seconds, and some in
clock-cycles.
For some of these delays (related to transfers & CS timing) it may make
sense to have a `spi_delay` struct that abstracts these a bit.
The initial version of `spi_set_cs_timing()` was implemented with
consideration only for clock-cycles as delay.
For cases like `CS setup` time, it's sometimes needed that micro-seconds
(or nano-seconds) are required, or sometimes even longer delays, for cases
where the device needs a little
This change implements CS control for setup, hold & inactive delays.
The `cs_setup` delay is completely new, and can help with cases where
asserting the CS, also brings the device out of power-sleep, where there
needs to be a longer (than usual), before transferring data.
The `cs_hold` time can
On 12.09.2019 16:18, Matt Redfearn wrote:
>
> On 12/09/2019 14:21, Andrzej Hajda wrote:
>> On 12.09.2019 04:38, John Stultz wrote:
>>> On Wed, Sep 4, 2019 at 3:26 AM Andrzej Hajda wrote:
On 03.09.2019 18:18, John Stultz wrote:
> On Mon, Sep 2, 2019 at 6:22 AM Andrzej Hajda wrote:
>>
The ADIS library is one of the few users of the new `cs_change_delay`
parameter for an spi_transfer.
The introduction of the `spi_delay` struct, requires that the users of of
`cs_change_delay` get an update. This change updates the ADIS library.
Signed-off-by: Alexandru Ardelean
---
For many places in the spi drivers, using the new `spi_transfer_delay`
helper is straightforward.
It's just replacing:
```
if (t->delay_usecs)
udelay(t->delay_usecs);
```
with `spi_transfer_delay(t)` which handles both `delay_usecs` and the new
`delay` field.
This change replaces in all
The `word_delay` field had it's type changed to `struct spi_delay`.
This allows users to specify nano-second or clock-cycle delays (if needed).
Converting to use `word_delay` is straightforward: it just uses the new
`spi_delay_exec()` routine, that handles the `unit` part.
Signed-off-by:
Am 13.09.19 um 10:09 schrieb Matthias Brugger:
>
> On 12/09/2019 21:32, Stefan Wahren wrote:
>> Am 12.09.19 um 19:18 schrieb Matthias Brugger:
>>> On 10/09/2019 11:27, Matthias Brugger wrote:
On 09/09/2019 21:33, Stefan Wahren wrote:
> Hi Nicolas,
>
> Am 09.09.19 um 11:58 schrieb
On Fri, Sep 13, 2019 at 02:12:45PM +0530, Anshuman Khandual wrote:
>
>
> On 09/13/2019 12:41 PM, Christophe Leroy wrote:
> >
> >
> > Le 13/09/2019 à 09:03, Christophe Leroy a écrit :
> >>
> >>
> >> Le 13/09/2019 à 08:58, Anshuman Khandual a écrit :
> >>> On 09/13/2019 11:53 AM, Christophe
On 13/09/2019 09.22, Borislav Petkov wrote:
>
> Instead of calling memset:
>
> 8100cd8d: e8 0e 15 7a 00 callq 817ae2a0
> <__memset>
>
> and having a JMP inside it depending on the feature supported, let's simply
> have the REP; STOSB directly in the code:
>
>
Discussion reference:
https://lore.kernel.org/lkml/20190913114550.956-1-alexandru.ardel...@analog.com/
This changeset introduces an `spi_delay` struct/data-type and makes the
IIO ADIS driver library the first user of this.
The patchset base is Jonathan's `iio/togreg` branch, but it also
There are plenty of delays that have been introduced in SPI core. Most of
them are in micro-seconds, some need to be in nano-seconds, and some in
clock-cycles.
For some of these delays (related to transfers & CS timing) it may make
sense to have a `spi_delay` struct that abstracts these a bit.
Since the logic for `spi_delay` struct + `spi_delay_exec()` has been copied
from the `cs_change_delay` logic, it's natural to make this delay, the
first user.
The `cs_change_delay` logic requires that the default remain 10 uS, in case
it is unspecified/unconfigured. So, there is some special
The `cs_change_delay` backwards compatibility value could be moved outside
of the switch statement.
The only reason to do it, is to make the next patches easier to diff.
Signed-off-by: Alexandru Ardelean
---
drivers/spi/spi.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
The ADIS library is one of the few users of the new `cs_change_delay`
parameter for an spi_transfer.
The introduction of the `spi_delay` struct, requires that the users of of
`cs_change_delay` get an update. This change updates the ADIS library.
Signed-off-by: Alexandru Ardelean
---
On Fri, Sep 13, 2019 at 8:22 AM Borislav Petkov wrote:
>
> since the merge window is closing in and y'all are on a conference, I
> thought I should take another stab at it. It being something which Ingo,
> Linus and Peter have suggested in the past at least once.
>
> Instead of calling memset:
>
On 09/12/2019 10:44 PM, Christophe Leroy wrote:
>
>
> Le 12/09/2019 à 08:02, Anshuman Khandual a écrit :
>> This adds a test module which will validate architecture page table helpers
>> and accessors regarding compliance with generic MM semantics expectations.
>> This will help various
The pull request you sent on Thu, 12 Sep 2019 14:11:50 -0700:
> git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup.git for-5.3-fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/a7f89616b7376495424f682b6086e0c391a89a1d
Thank you!
--
Deet-doot-dot, I am a
On 13/09/19 01:52, Sean Christopherson wrote:
>>>
>> Perhaps you could also add a comment like the one Paolo added when he
>> made the same change in kvm_read_guest_virt?
>> See commit 353c0956a618 ("KVM: x86: work around leak of uninitialized
>> stack contents (CVE-2019-7222)").
> I have a better
On Wed, Sep 11, 2019 at 03:52:36PM +0200, Christian Brauner wrote:
> On Wed, Sep 11, 2019 at 06:48:52AM -0700, Andrew Morton wrote:
> > On Tue, 10 Sep 2019 18:58:52 +0100 Eugene Syromiatnikov
> > wrote:
> >
> > > Previously, higher 32 bits of exit_signal fields were lost when
> > > copied to
From: Colin Ian King
There is a spelling mistake in a DP_VERBOSE debug message. Fix it.
(Using American English spelling as this is the most common way
to spell this in the kernel).
Signed-off-by: Colin Ian King
---
drivers/net/ethernet/qlogic/qed/qed_vf.c | 2 +-
1 file changed, 1
Le 13/09/2019 à 04:00, Aneesh Kumar K.V a écrit :
On 9/13/19 12:56 AM, Laurent Dufour wrote:
Le 12/09/2019 à 16:44, Aneesh Kumar K.V a écrit :
Laurent Dufour writes:
+
+ idx = 2;
+ while (idx < len) {
+ unsigned int block_size = local_buffer[idx++];
+ unsigned int
On 13/09/19 03:56, Sean Christopherson wrote:
> Use master abort semantics, i.e. reads return all ones and writes are
> dropped, to handle unexpected MMIO accesses when reading guest memory
> instead of returning X86EMUL_IO_NEEDED, which in turn gets interpreted
> as a guest page fault.
>
>
Hi,
On Thu, Sep 12, 2019 at 10:43:28PM +0200, Jernej Škrabec wrote:
> Dne četrtek, 12. september 2019 ob 22:26:47 CEST je Maxime Ripard napisal(a):
> > > + clk_set_rate(dev->mod_clk, 3);
I just realized I missed this too. If you really need the rate to be
fixed, and if the controller
On Fri, Sep 13, 2019 at 02:32:04PM +0530, Anshuman Khandual wrote:
>
> On 09/12/2019 10:44 PM, Christophe Leroy wrote:
> >
> >
> > Le 12/09/2019 à 08:02, Anshuman Khandual a écrit :
> >> This adds a test module which will validate architecture page table helpers
> >> and accessors regarding
On 13/09/2019 11.00, Linus Torvalds wrote:
> On Fri, Sep 13, 2019 at 8:22 AM Borislav Petkov wrote:
>>
>> since the merge window is closing in and y'all are on a conference, I
>> thought I should take another stab at it. It being something which Ingo,
>> Linus and Peter have suggested in the past
Adding fully unmapped pages into deferred split queue is not productive:
these pages are about to be freed or they are pinned and cannot be split
anyway.
Signed-off-by: Kirill A. Shutemov
---
mm/rmap.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/mm/rmap.c
On 9/12/2019 6:49 PM, Gustavo Pimentel wrote:
On Thu, Sep 12, 2019 at 10:23:31, Dilip Kota
wrote:
Quoting Andrew Murray:
Quoting Gustavo Pimentel:
On 9/12/2019 4:25 PM, Andrew Murray wrote:
[...]
+static void intel_pcie_max_link_width_setup(struct intel_pcie_port *lpp)
+{
+ u32
On Thu, Aug 22, 2019 at 3:54 AM Guillaume La Roque
wrote:
>
> Amlogic G12A and G12B SoCs integrate two thermal sensors
> with the same design.
> One is located close to the DDR controller and the other one is
> located close to the PLLs (between the CPU and GPU).
Merge into one paragraph?
> The
From: Colin Ian King
There is a spelling mistake in a NS_ERR error message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/mtd/nand/raw/nandsim.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c
index
On 13/09/2019 10:50, Stefan Wahren wrote:
> Am 13.09.19 um 10:09 schrieb Matthias Brugger:
>>
>> On 12/09/2019 21:32, Stefan Wahren wrote:
>>> Am 12.09.19 um 19:18 schrieb Matthias Brugger:
On 10/09/2019 11:27, Matthias Brugger wrote:
> On 09/09/2019 21:33, Stefan Wahren wrote:
>>
On Thu, Sep 12, 2019 at 08:22:38PM -0700, Dmitry Torokhov wrote:
> devm_fwnode_get_index_gpiod_from_child() is too long, besides the fwnode
> in question does not have to be a child of device node. Let's rename it
> to devm_fwnode_gpiod_get_index() and keep the old name for compatibility
> for
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