On Thu 03 Dec 15:51 CST 2020, Alex Elder wrote:
> When the coherent memory is freed in gsi_trans_pool_exit_dma(), we
> are mistakenly passing the size of a single element in the pool
> rather than the actual allocated size. Fix this bug.
>
> Fixes: 9dd441e4ed575 ("soc: qcom: ipa: GSI
On Thu, Dec 03, 2020 at 02:49:00PM -0800, Yang Shi wrote:
> On Thu, Dec 3, 2020 at 12:07 PM Roman Gushchin wrote:
> >
> > On Thu, Dec 03, 2020 at 10:03:44AM -0800, Yang Shi wrote:
> > > On Wed, Dec 2, 2020 at 8:54 PM Yang Shi wrote:
> > > >
> > > > On Wed, Dec 2, 2020 at 7:06 PM Roman Gushchin
On Wed, Dec 02, 2020 at 01:37:09AM -0800, Song Liu wrote:
> Introduce perf-stat -b option, which counts events for BPF programs, like:
>
> [root@localhost ~]# ~/perf stat -e ref-cycles,cycles -b 254 -I 1000
> 1.487903822115,200 ref-cycles
> 1.487903822
On Wed, Dec 02, 2020 at 01:37:08AM -0800, Song Liu wrote:
> BPF programs are useful in perf to profile BPF programs. BPF skeleton is
> by far the easiest way to write BPF tools. Enable building BPF skeletons
> in util/bpf_skel. A dummy bpf skeleton is added. More bpf skeletons will
> be added for
On Thu 03 Dec 01:12 CST 2020, Vinod Koul wrote:
> Add PM8350 and PM8350C compatibles for these PMICs found in some
> Qualcomm platforms.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
> ---
> .../devicetree/bindings/regulator/qcom,rpmh-regulator.txt | 4
> 1 file
On Thu, Dec 03 2020 at 18:38, Corentin Labbe wrote:
> On Wed, Dec 02, 2020 at 09:59:36PM +0100, Thomas Gleixner wrote:
>> On Wed, Dec 02 2020 at 20:55, Corentin Labbe wrote:
>> > On Tue, Dec 01, 2020 at 04:15:08PM +0100, Thomas Gleixner wrote:
>> >
>> > The result could be seen at
On 04/12/2020 00:42, Huang, Joseph wrote:
>> From: Huang, Joseph
>> Sent: Thursday, December 3, 2020 4:53 PM
>> To: Nikolay Aleksandrov ; Jakub Kicinski
>>
>> Cc: Roopa Prabhu ; David S. Miller
>> ; bri...@lists.linux-foundation.org;
>> net...@vger.kernel.org; linux-kernel@vger.kernel.org; Linus
debugfs nodes were created in genpd_debug_init alled in late_initcall
preventing power domains registered though loadable modules to have
a debugfs entry.
Create/remove debugfs nodes when the power domain is added/removed
to/from the internal gpd_list.
Signed-off-by: Thierry Strudel
---
On Thu, 3 Dec 2020 08:29:43 +0200 Mike Rapoport wrote:
> From: Mike Rapoport
>
> On arm64, set_direct_map_*() functions may return 0 without actually
> changing the linear map. This behaviour can be controlled using kernel
> parameters, so we need a way to determine at runtime whether calls
On Thu, 3 Dec 2020 08:29:48 +0200 Mike Rapoport wrote:
> From: Mike Rapoport
>
> Wire up memfd_secret system call on architectures that define
> ARCH_HAS_SET_DIRECT_MAP, namely arm64, risc-v and x86.
>
> ...
>
> --- a/include/uapi/asm-generic/unistd.h
> +++
On Thu, Dec 03 2020 at 20:23, Daniel Lezcano wrote:
> The following changes since commit b996544916429946bf4934c1c01a306d1690972c:
>
> tick: Get rid of tick_period (2020-11-19 10:48:29 +0100)
>
> are available in the Git repository at:
>
>
Hi Uwe,
First off, thanks for the review!
On 29.11.20 at 19:10, Uwe Kleine-König wrote:
>
> Changelog between review rounds go to below the tripple-dash below.
>
Right, will do so in the next patch version.
>
> You're storing an unsigned long long (i.e. 64 bits) in an u32. If
> you are sure
Hi Mathieu,
On 12/2/20 3:13 PM, Mathieu Poirier wrote:
> On Wed, Dec 02, 2020 at 01:53:36PM -0700, Mathieu Poirier wrote:
>> On Tue, Dec 01, 2020 at 03:54:36PM -0700, Mathieu Poirier wrote:
>>> Hi Grzeg,
>>>
>>> I have started to review this set - comments will come over the next few
>>> days.
On Thu 03 Dec 01:12 CST 2020, Vinod Koul wrote:
> Add support from RPMH regulators found in PM8350 and PM8350c PMICs
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
> ---
> drivers/regulator/qcom-rpmh-regulator.c | 62 +
> 1 file changed, 62 insertions(+)
On 12/3/2020 3:45 PM, Hemant Kumar wrote:
This MHI client driver allows userspace clients to transfer
raw data between MHI device and host using standard file operations.
Driver instantiates UCI device object which is associated to device
file node. UCI device object instantiates UCI channel
Hi
2020. december 3., csütörtök 22:21 keltezéssel, Elia Devito írta:
> [...]
> diff --git a/drivers/platform/x86/intel-hid.c
> b/drivers/platform/x86/intel-hid.c
> index 86261970bd8f..fed24d4f28b8 100644
> --- a/drivers/platform/x86/intel-hid.c
> +++ b/drivers/platform/x86/intel-hid.c
> @@
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 5bd7cb29eceb52e4b108917786fdbf2a2c2048ef
Gitweb:
https://git.kernel.org/tip/5bd7cb29eceb52e4b108917786fdbf2a2c2048ef
Author:Daniel Lezcano
AuthorDate:Wed, 25 Nov 2020 11:23:45 +01:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: b7c0fed5ccf2c5cb4bb43ddc6b1625f042a83d0a
Gitweb:
https://git.kernel.org/tip/b7c0fed5ccf2c5cb4bb43ddc6b1625f042a83d0a
Author:Geert Uytterhoeven
AuthorDate:Tue, 10 Nov 2020 17:20:14 +01:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: db08e6c0e2513d1341369ec6a4f1774ee20b290b
Gitweb:
https://git.kernel.org/tip/db08e6c0e2513d1341369ec6a4f1774ee20b290b
Author:Marian-Cristian Rotariu
AuthorDate:Tue, 10 Nov 2020 17:20:13
The following commit has been merged into the timers/core branch of tip:
Commit-ID: eee422c46e6840a81c9db18a497b74387a557b29
Gitweb:
https://git.kernel.org/tip/eee422c46e6840a81c9db18a497b74387a557b29
Author:Yu Kuai
AuthorDate:Mon, 16 Nov 2020 21:51:23 +08:00
Committer:
The following commit has been merged into the timers/core branch of tip:
Commit-ID: ab3105446f1ec4e98fadfc998ee24feec271c16c
Gitweb:
https://git.kernel.org/tip/ab3105446f1ec4e98fadfc998ee24feec271c16c
Author:Kefeng Wang
AuthorDate:Wed, 28 Oct 2020 21:12:30 +08:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: fef92cd2bc04c64bb3743d40c0b4be47aedf9e23
Gitweb:
https://git.kernel.org/tip/fef92cd2bc04c64bb3743d40c0b4be47aedf9e23
Author:Thomas Gleixner
AuthorDate:Fri, 04 Dec 2020 00:39:45 +01:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 19f7ce8e36c09f4a2491b065dabd9162018309b6
Gitweb:
https://git.kernel.org/tip/19f7ce8e36c09f4a2491b065dabd9162018309b6
Author:Kefeng Wang
AuthorDate:Thu, 29 Oct 2020 20:33:17 +08:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: dca54f8ce1c3c979caf06cfdcdf8eab05a00f5ff
Gitweb:
https://git.kernel.org/tip/dca54f8ce1c3c979caf06cfdcdf8eab05a00f5ff
Author:Kefeng Wang
AuthorDate:Thu, 29 Oct 2020 20:33:16 +08:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: c1e6cad00aa2f17845e7270e38ff3cc82c7b022a
Gitweb:
https://git.kernel.org/tip/c1e6cad00aa2f17845e7270e38ff3cc82c7b022a
Author:Yang Yingliang
AuthorDate:Wed, 11 Nov 2020 14:47:06 +08:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: b6ea209ef124dad4045772a759e2aecd191534c0
Gitweb:
https://git.kernel.org/tip/b6ea209ef124dad4045772a759e2aecd191534c0
Author:Vineet Gupta
AuthorDate:Thu, 05 Nov 2020 13:22:08 -08:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 3c0a4b185f6c82c06025720b00a490c719a6f0ff
Gitweb:
https://git.kernel.org/tip/3c0a4b185f6c82c06025720b00a490c719a6f0ff
Author:Zhen Lei
AuthorDate:Wed, 21 Oct 2020 09:22:59 +08:00
Committer:
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 3c07bf0fc3558f680374f8ac6d148b0082aa08c6
Gitweb:
https://git.kernel.org/tip/3c07bf0fc3558f680374f8ac6d148b0082aa08c6
Author:Kefeng Wang
AuthorDate:Thu, 29 Oct 2020 20:33:14 +08:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 9d4965eb438f0c9f93e91ce6bfec72bbb8def988
Gitweb:
https://git.kernel.org/tip/9d4965eb438f0c9f93e91ce6bfec72bbb8def988
Author:Kefeng Wang
AuthorDate:Thu, 29 Oct 2020 20:33:15 +08:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 0fce2e02a29ca5420472f03d3f2858eedded3fe7
Gitweb:
https://git.kernel.org/tip/0fce2e02a29ca5420472f03d3f2858eedded3fe7
Author:周琰杰 (Zhou Yanjie)
AuthorDate:Mon, 26 Oct 2020 23:58:42 +08:00
On Thu 03 Dec 01:08 CST 2020, Vinod Koul wrote:
> Add device tree binding Documentation details for Qualcomm SM8350
> pinctrl driver.
>
> Signed-off-by: Vinod Koul
> ---
> .../pinctrl/qcom,sdm8350-pinctrl.yaml | 151 ++
> 1 file changed, 151 insertions(+)
> create mode
On 12/3/20 12:35 AM, Muchun Song wrote:
> On Mon, Nov 30, 2020 at 11:19 PM Muchun Song wrote:
>>
>> Hi all,
>>
>> This patch series will free some vmemmap pages(struct page structures)
>> associated with each hugetlbpage when preallocated to save memory.
>
> Hi Mike,
>
> What's your opinion on
On Fri, 13 Nov 2020 18:52:02 +0100
Eric Auger wrote:
> In case an error occurs in vfio_pci_enable() before the call to
> vfio_pci_probe_mmaps(), vfio_pci_disable() will try to iterate
> on an uninitialized list and cause a kernel panic.
>
> Lets move to the initialization to vfio_pci_probe()
2020. december 4., péntek 0:45 keltezéssel, Barnabás Pőcze írta:
> Hi
>
> [...]
Oh well, I replied to the wrong email, apologies. :-(
On Thu 03 Dec 01:09 CST 2020, Vinod Koul wrote:
> diff --git a/drivers/pinctrl/qcom/pinctrl-sm8350.c
> b/drivers/pinctrl/qcom/pinctrl-sm8350.c
[..]
> +static const int sm8350_reserved_gpios[] = {
> + 52, 53, 54, 55, 56, 57, 58, 59, -1
> +};
Reserving these gpios here instead of in the DT
On Thu 03 Dec 01:02 CST 2020, Vinod Koul wrote:
> Add bindings and update documentation for clock rpmh driver on SM8350.
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
>
On Thu 03 Dec 01:02 CST 2020, Vinod Koul wrote:
> This adds the RPMH clocks present in SM8350 SoC
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/clk/qcom/clk-rpmh.c | 34 +++
>
On Thu, 3 Dec 2020 19:29:17 +0800
Chiqijun wrote:
> On 2020/12/3 1:46, Alex Williamson wrote:
> > On Wed, 2 Dec 2020 17:18:12 +0800
> > Chiqijun wrote:
> >
> >> On 2020/11/30 23:46, Alex Williamson wrote:
> >>> On Sat, 28 Nov 2020 17:29:19 -0600
> >>> Bjorn Helgaas wrote:
> >>>
>
On Tue, Nov 17, 2020 at 12:15:26PM -0500, Theodore Y. Ts'o wrote:
> What is the expected use case for Direct I/O using fscrypt? This
> isn't a problem which is unique to fscrypt, but one of the really
> unfortunate aspects of the DIO interface is the silent fallback to
> buffered I/O. We've
On Thu, Dec 03, 2020 at 12:51:40AM +, Kelley, Sean V wrote:
> > On Dec 2, 2020, at 3:44 PM, Bjorn Helgaas wrote:
> > On Fri, Nov 20, 2020 at 04:10:33PM -0800, Sean V Kelley wrote:
> >> From: Qiuxu Zhuo
> >>
> >> When attempting error recovery for an RCiEP associated with an RCEC device,
>
> -Original Message-
> From: Muchun Song [mailto:songmuc...@bytedance.com]
> Sent: Tuesday, December 1, 2020 4:19 AM
> To: cor...@lwn.net; mike.krav...@oracle.com; t...@linutronix.de;
> mi...@redhat.com; b...@alien8.de; x...@kernel.org; h...@zytor.com;
> dave.han...@linux.intel.com;
Quoting Arnd Bergmann (2020-12-03 15:11:40)
> From: Arnd Bergmann
>
> Functions that are annotated __exit are discarded for built-in drivers,
> but the .remove callback in a device driver must still be kept around
> to allow bind/unbind operations.
>
> There is now a linker warning for the
On Thu 03 Dec 01:02 CST 2020, Vinod Koul wrote:
> diff --git a/drivers/clk/qcom/gcc-sm8350.c b/drivers/clk/qcom/gcc-sm8350.c
[..]
> +static int gcc_sm8350_probe(struct platform_device *pdev)
> +{
> + struct regmap *regmap;
> + int ret;
> +
> + regmap = qcom_cc_map(pdev, _sm8350_desc);
The pid_revalidate() function requires dropping from RCU into REF lookup
mode. When many threads are resolving paths within /proc in parallel,
this can result in heavy spinlock contention as each thread tries to
grab a reference to the /proc dentry lock (and drop it shortly
thereafter).
Allow the
On Thu, Dec 03, 2020 at 02:39:41PM +0800, Leo Yan wrote:
> Hi Will,
>
> [ + Mathieu ]
>
> On Tue, Dec 01, 2020 at 11:09:36PM +, Will Deacon wrote:
> > On Tue, Dec 01, 2020 at 12:10:40PM +0800, Leo Yan wrote:
> > > On Mon, Nov 30, 2020 at 04:46:51PM +, Will Deacon wrote:
> > > > On Mon,
On Wed 02 Dec 10:34 CST 2020, Srinivas Kandagatla wrote:
> Add initial pinctrl driver to support pin configuration for
> LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
> on SM8250.
>
> This IP is an additional pin control block for Audio Pins on top the
> existing SoC Top level
Quoting Doug Anderson (2020-12-03 12:06:10)
> On Wed, Dec 2, 2020 at 4:47 PM Stephen Boyd wrote:
> >
> > And that is wrong. With even more investigation and Doug's eagle eyes it
> > seems that the cros-ec driver is overriding the spi::mode to clear out
> > the SPI_CS_HIGH bit that the spi core
Il 03/12/20 12:14, Manivannan Sadhasivam ha scritto:
Hi,
On Mon, Nov 30, 2020 at 10:23:05AM -0700, Rob Herring wrote:
On Thu, 26 Nov 2020 19:45:57 +0100, AngeloGioacchino Del Regno wrote:
Convert the qcom-cpufreq-hw documentation to YAML binding as
qcom,cpufreq-hw.yaml.
Signed-off-by:
Hi,
The use case I am struggling with is the use of a Windows program
running in wine that is sending and receiving UDP packets.
This particular windows program uses SO_REUSEADDR socket option and
opens two sockets. Lets call the first one socket A, and the second
one Socket B.
The SO_REUSEADDR
On Thu, 3 Dec 2020 10:45:48 -0600
Tom Lendacky wrote:
> On 12/3/20 6:48 AM, Borislav Petkov wrote:
> > So it ended up like this:
> >
> > ---
> > From 5014e4e902778d63ce392f864b3654baa4b72384 Mon Sep 17 00:00:00 2001
> > From: Masami Hiramatsu
> > Date: Thu, 3 Dec 2020 13:50:37 +0900
> >
On Thu, Dec 3, 2020 at 2:56 PM Nick Desaulniers wrote:
>
> On Tue, Nov 3, 2020 at 4:17 PM Arvind Sankar wrote:
> >
> > On Tue, Nov 03, 2020 at 04:05:36PM -0800, Nick Desaulniers wrote:
> > > On Tue, Nov 3, 2020 at 4:00 PM Arvind Sankar
> > > wrote:
> > > >
> > > > On Wed, Oct 21, 2020 at
On Thu, 3 Dec 2020 13:37:57 +0100
Borislav Petkov wrote:
> On Thu, Dec 03, 2020 at 01:50:37PM +0900, Masami Hiramatsu wrote:
> > Since the insn.prefixes.nbytes can be bigger than the size of
> > insn.prefixes.bytes[] when a same prefix is repeated, we have to
> > check whether the
On Tue, Dec 1, 2020 at 11:55 PM Peter Zijlstra wrote:
>
> Then disallow sharing a task cookie when the tasks are in different
> cgroups or disallow cgroup movement when they share a cookie.
Yes, we could restrict task cookie sharing to tasks that are in the
same cgroup. Then the cookie easily
On 12/2/20 11:17 AM, Sowjanya Komatineni wrote:
On 12/2/20 9:27 AM, Mark Brown wrote:
On Tue, Dec 01, 2020 at 01:12:44PM -0800, Sowjanya Komatineni wrote:
Tegra SoC has a Quad SPI controller starting from Tegra210.
This patch adds support for Tegra210 QSPI controller.
This looks pretty
][ T650] CPU: 127 PID: 650 Comm: migration/127 Tainted: G
L5.10.0-rc6-next-20201203+ #5
[20372.270152][ T650] Hardware name: HPE Apollo 70 /C01_APACHE_MB
, BIOS L50_5.13_1.16 07/29/2020
[20372.280579][ T650] Stopper: multi_cpu_stop+0x0/0x390 <-
On Thu, Dec 3, 2020 at 3:31 PM Roman Gushchin wrote:
>
> On Thu, Dec 03, 2020 at 02:49:00PM -0800, Yang Shi wrote:
> > On Thu, Dec 3, 2020 at 12:07 PM Roman Gushchin wrote:
> > >
> > > On Thu, Dec 03, 2020 at 10:03:44AM -0800, Yang Shi wrote:
> > > > On Wed, Dec 2, 2020 at 8:54 PM Yang Shi
Switching this function to AE_CTRL_TERMINATE broke the documented
behaviour of acpi_dev_get_resources() - AE_CTRL_TERMINATE does not, in
fact, terminate the resource walk because acpi_walk_resource_buffer()
ignores it (specifically converting it to AE_OK), referring to that
value as "an OK
On 11/5/20 1:22 PM, Vineet Gupta wrote:
> NPS platform has been removed from ARC port and there are no in-tree
> users of it now. So RIP !
>
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc Zyngier
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Vineet Gupta
Ping !
> ---
>
Hi,
This looks good.
I haven't checked all the differences between the SoCs, but found some
minor problems in the code for the port configuration.
On 12/3/20 11:03 PM, Aleksander Jan Bajkowski wrote:
From: Aleksander Jan Bajkowski
This patch allows you to use all phs on GRX300 and
Hi Chao,
On Thu, Dec 03, 2020 at 11:32:34AM -0800, Eric Biggers wrote:
...
>
> What is the use case for storing the compression level on-disk?
>
> Keep in mind that compression levels are an implementation detail; the exact
> compressed data that is produced by a particular algorithm at a
On Wed, Nov 25, 2020 at 01:05:39AM +, Will McVicker wrote:
> Hi All,
>
> I have updated the patchset to:
>
> *) Include Documentation.
> *) Use a consistent output pattern for the SCM version.
>
> In my debugging, I found that the vermagic reported by modinfo can actually
> vary based on
On Wed, 2020-12-02 at 13:59 +, Mark Rutland wrote:
> External Email
>
> ---
> ---
> Hi Alex,
>
> On Mon, Nov 23, 2020 at 05:58:06PM +, Alex Belits wrote:
> > In do_notify_resume(), call
> >
On Wed, 2020-12-02 at 14:02 +, Mark Rutland wrote:
> On Tue, Nov 24, 2020 at 05:40:49PM +, Alex Belits wrote:
> >
> > > I am having problems applying the patchset to today's linux-next.
> > >
> > > Which kernel should I be using ?
> >
> > The patches are against Linus' tree, in
--
Good-Day Friend,
I know that this letter will come to you as surprise, I got your
contact address while am searching for foreign partner to assist me in
this business transaction that is present in our favor, My name is Mr.
KARIM ZAKARI, I am the Bill and Exchange (assistant) Manager
On Thu, Dec 03, 2020, Rick Edgecombe wrote:
> In the TDP MMU, use shadow_phys_bits to dermine the maximum possible GFN
> mapped in the guest for zapping operations. boot_cpu_data.x86_phys_bits
> may be reduced in the case of HW features that steal HPA bits for other
> purposes. However, this
On Thu, Dec 03, 2020 at 04:36:26PM +0100, Christian Eggers wrote:
> Should ptp_sysfs be extended with a "pulse" attribute with calls
> enable() with only PTP_PEROUT_DUTY_CYCLE set?
Yes, that would make sense. It would bring sysfs back to feature
parity with the ioctls.
Thanks,
Richard
On Wed, 2020-12-02 at 14:18 +, Mark Rutland wrote:
> External Email
>
> ---
> ---
> On Mon, Nov 23, 2020 at 05:57:42PM +, Alex Belits wrote:
> > Some drivers don't call functions that call
> > task_isolation_kernel_enter()
On Sunday 29 November 2020 12:17:27 Gregory CLEMENT wrote:
> Hi Vladimir,
>
> > This adds support for ESPRESSObin-Ultra from Globalscale.
> >
> > Specifications are similar to the base ESPRESSObin board, with main
> > difference being being WAN port with PoE capability and 2 additional
> >
On Wed, Dec 2, 2020 at 12:02 AM Peter Zijlstra wrote:
>
> On Tue, Dec 01, 2020 at 10:18:00PM -0800, Josh Don wrote:
> > Hey Peter,
> >
> > On Wed, Nov 25, 2020 at 5:43 AM Peter Zijlstra wrote:
> > >
> > > Why can't the above work by setting 'tag' (that's a terrible name, why
> > > does that
On Wed, 2020-12-02 at 14:20 +, Mark Rutland wrote:
> External Email
>
> ---
> ---
> On Mon, Nov 23, 2020 at 05:58:22PM +, Alex Belits wrote:
> > From: Yuri Norov
> >
> > For nohz_full CPUs the desirable behavior is to
On Thu, 3 Dec 2020 12:49:46 -0600
Tom Lendacky wrote:
> On 12/3/20 12:17 PM, Borislav Petkov wrote:
> > On Thu, Dec 03, 2020 at 12:10:10PM -0600, Tom Lendacky wrote:
> >> Since that struct is used in multiple places, I think basing it on the
> >> array
> >> size is the best way to go. The main
From: Daeho Jeong
I found out f2fs_free_dic() is invoked in a wrong timing, but
f2fs_verify_bio() still needed the dic info and it triggered the
below kernel panic. It has been caused by the race condition of
pending_pages value between decompression and verity logic, when
the same compression
On Thu, Dec 03, 2020 at 04:45:56PM -0800, Richard Cochran wrote:
> On Thu, Dec 03, 2020 at 04:36:26PM +0100, Christian Eggers wrote:
> > Should ptp_sysfs be extended with a "pulse" attribute with calls
> > enable() with only PTP_PEROUT_DUTY_CYCLE set?
>
> Yes, that would make sense. It would
On 3/12/2020 下午11:48, Guenter Roeck wrote:
On Thu, Dec 03, 2020 at 08:34:32PM +0800, Charles wrote:
[ ... ]
It's really weird. I sent a mail to myself, and it looks good.
@@ -220,6 +220,15 @@ config SENSORS_MP2975
This driver can also be built as a module. If so, the module will
On Thu, Dec 03, 2020 at 09:50:04PM +0300, Maksim Kiselev wrote:
> In any case, I would like to add functionality for using GPIO as CS.
> Because I have a board which actually uses this.
I have absolutely nothing to object to that.
But the patches should still be as clean as possible, though.
On Thu, 3 Dec 2020 10:20:16 -0500 min.li...@renesas.com wrote:
> From: Min Li
>
> SM_RESET device only when loading full configuration and check
> for BOOT_STATUS. Also remove polling for write trigger done in
> _idtcm_settime().
>
> Signed-off-by: Min Li
Please fix the checkpatch warnings:
Modifies CONFIG_DEBUG_INFO_DWARF4 to be a member of a choice. Adds an
explicit CONFIG_DEBUG_INFO_DWARF2, which is the default. Does so in a
way that's forward compatible with existing configs, and makes adding
future versions more straightforward.
Suggested-by: Fangrui Song
Suggested-by:
Avoid endless loop if synci_step was zero read by rdhwr instruction.
Most platforms do not need to do synci instruction operations when
synci_step is 0. But for example, the synci implementation on Loongson64
platform has some changes. On the one hand, it ensures that the memory
access
DWARF v5 is the latest standard of the DWARF debug info format.
Feature detection of DWARF5 is onerous, especially given that we've
removed $(AS), so we must query $(CC) for DWARF5 assembler directive
support. GNU `as` only recently gained support for specifying
-gdwarf-5.
The DWARF version of
sigh...I ran a broken script to send the series which doesn't cc folks properly.
+ lkml, linux-kbuild
(Might just resend, properly)
On Thu, Dec 3, 2020 at 5:11 PM Nick Desaulniers wrote:
>
> DWARF v5 is the latest standard of the DWARF debug info format.
>
> DWARF5 wins significantly in terms of
Hi Moritz,
I manually fixed some line breaks. Not sure why outlook is not doing it
properly.
Let me know if it still looks bad to you.
Please see my reply below.
>
>
> Max,
>
> On Thu, Dec 03, 2020 at 03:38:26AM +, Max Zhen wrote:
> > [...cut...]
> >
> > > > > > +xclbin over the User
On 2020/12/4 3:32, Eric Biggers wrote:
On Thu, Dec 03, 2020 at 02:17:15PM +0800, Chao Yu wrote:
+config F2FS_FS_LZ4HC
+ bool "LZ4HC compression support"
+ depends on F2FS_FS_COMPRESSION
+ depends on F2FS_FS_LZ4
+ select LZ4HC_COMPRESS
+ default y
+ help
+
(minus Chengbin due to bounces)
On Thu, Dec 3, 2020 at 5:11 PM Nick Desaulniers wrote:
>
> Modifies CONFIG_DEBUG_INFO_DWARF4 to be a member of a choice. Adds an
> explicit CONFIG_DEBUG_INFO_DWARF2, which is the default. Does so in a
> way that's forward compatible with existing configs, and
On Fri, Dec 04, 2020 at 03:00:50AM +0200, Vladimir Oltean wrote:
> On Thu, Dec 03, 2020 at 04:45:56PM -0800, Richard Cochran wrote:
> > Yes, that would make sense. It would bring sysfs back to feature
> > parity with the ioctls.
>
> Which is a good thing?
Yes, of course it is. I'm sorry I
Hello:
This patch was applied to netdev/net-next.git (refs/heads/master):
On Fri, 4 Dec 2020 00:12:59 +0100 you wrote:
> From: Arnd Bergmann
>
> When IPv6 is disabled, the flow steering code causes a build failure:
>
> drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c:55:14: error:
> This patch introduce new Cadence USBSS DRD driver to linux kernel.
>
> The Cadence USBSS DRD Controller is a highly configurable IP Core which can
> be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only
> (XHCI)configurations.
>
> The current driver has been validated with
On 2020/12/3 17:42, Mel Gorman wrote:
> On Thu, Dec 03, 2020 at 02:47:14PM +0800, Yunfeng Ye wrote:
>> The schedstat include runqueue-specific stats and domain-specific stats,
>> so split it into two functions, show_rqstat() and show_domainstat().
>>
>> No functional changes.
>>
>>
Using drmm_mode_config_init() sets up managed release of modesetting
resources.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
linux/rational.h is included more than once, Remove the one that isn't
necessary.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c
b/drivers/gpu/drm/msm/dp/dp_catalog.c
index b15b4ce..105fa65
patch #1 add a new file to implements i2c adapters, #2 read the
resolution from the edid, if that fails, set the resolution to fixed.
patch #3 update the destroy callback function to release the i2c adapters.
Tian Tao (3):
drm/hisilicon: Support i2c driver algorithms for bit-shift adapters
Function dev_err() after platform_get_irq() is redundant because
platform_get_irq() already prints an error.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
Replace alloc and copy with vmemdup_user()
Signed-off-by: Tian Tao
---
drivers/gpu/drm/nouveau/nouveau_gem.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c
b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 787d05e..df986d9
The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.
Signed-off-by: Tian Tao
---
drivers/gpu/ipu-v3/ipu-image-convert.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-image-convert.c
fixed the coccicheck:
drivers/gpu/drm/nouveau/include/nvfw/hs.h:26:5-9: WARNING use
flexible-array member instead.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/nouveau/include/nvfw/hs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/include/nvfw/hs.h
patch #1 add a new file to implements i2c adapters, #2 read the
resolution from the edid, if that fails, set the resolution to fixed.
and update the destroy callback function to release the i2c adapters
Changes since v1:
-merge patch #3 into patch #2.
-add new function to_hibmc_drm_private,
A client can attempt to unprepare certain channels for transfer even
after the execution environment they are supposed to run in has changed.
In the event that happens, the device need not be notified of the reset
and the host can proceed with clean up for the channel context and
memory allocated
The mhi_prepare_for_transfer() and mhi_unprepare_from_transfer()
APIs could use better explanation, especially with the addition
of two new APIs to start and stop the transfers on channels. Add
better set of information for those APIs.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Hemant Kumar
---
If a channel was explicitly stopped but not reset, allow it to
move to a disabled state so that the channel context can be
cleaned up after a driver remove is issued. Since the channel
remained in stopped state, its context on the device is not
cleared. Allow this move if a client driver module is
Some MHI client drivers may want to request a pause or halt of
data transfer activity on their channels. Support for this does
not exist and must be introduced, wherein the channel context is
not reset or cleared but only the STOP channel command is issued.
This would need to be paired with an API
MHI specification shows a state machine with support for STOP channel command
and the validity of certain state transitions. MHI host currently does not
provide any mechanism to stop a channel and restart it without resetting it.
There are also times when the device moves on to a different
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