Hi Axel,
My apologies for the delay in responding to this one.
On Monday 09 July 2012 04:31 PM, Axel Lin wrote:
於 一,2012-07-09 於 11:22 +0800,Axel Lin 提到:
In twl6030ldo_set_voltage, current code use below formula to calculate vsel:
vsel = (min_uV/1000 - 1000)/100 + 1;
This is worng
Copying Graeme and linux-omap list.
On Saturday 14 July 2012 11:07 AM, Axel Lin wrote:
The voltage selection logic is supposed to find the samllest voltage falls
within specified range. When using equation to calculate vsel, we need to
ensure the requested min_uV meet the range of using the
Thanks for the patch.
Tested-by: Rajendra Nayak rna...@ti.com
---
drivers/regulator/twl-regulator.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/regulator/twl-regulator.c
b/drivers/regulator/twl-regulator.c
index de99b78
Sorry, I seemed to have messed up with the underlining.
On Monday 16 July 2012 05:38 PM, Rajendra Nayak wrote:
[0.337341] V1V8: 1800 mV normal standby
[0.338531] V2V1: 2100 mV normal standby
[0.339813] VMMC: 1200 -- 3000 mV at 3100 mV normal standby
I
Rob, Mike,
On Tuesday 17 July 2012 07:38 AM, Rob Herring wrote:
On 07/16/2012 07:12 PM, Mike Turquette wrote:
On 20120716-16:46, Rob Herring wrote:
From: Rob Herringrob.herr...@calxeda.com
With commit 766e6a4ec602d0c107 (clk: add DT clock binding support),
compiling with OF !COMMON_CLK is
On Tuesday 17 July 2012 06:49 PM, Rajendra Nayak wrote:
struct clk *clk_get(struct device *dev, const char *con_id)
{
const char *dev_id = dev ? dev_name(dev) : NULL;
struct clk *clk;
if (dev) {
Any reason why this isn't
if (dev-of_node
On Tuesday 17 July 2012 07:16 PM, Rob Herring wrote:
So how is this expected to work on platforms (like OMAP) which have
CONFIG_OF enabled but not CONFIG_COMMON_CLK?
As I mentioned in my other reply, this really belongs with Shawn's patch
that changes the return value checking from NULL to
Hi Tony,
On Thursday 04 April 2013 05:12 AM, Tony Lindgren wrote:
Hi,
[]..
@@ -1663,6 +1664,40 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, cpufreq_ck, dpll_mpu_ck, CK_443X),
};
+static struct clk *scrm_clks[] = {
+auxclk0_ck,
+auxclk1_ck,
+
[]..
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index 0274ff7..23f2064 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -158,7 +158,7 @@ DT_MACHINE_START(OMAP4_DT, Generic OMAP4 (Flattened
Device
On Thursday 21 March 2013 07:24 PM, Roger Quadros wrote:
On 03/21/2013 03:08 PM, Rajendra Nayak wrote:
[]..
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index 0274ff7..23f2064 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach
[]...
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt
b/Documentation/devicetree/bindings/usb/omap-usb.txt
index 29a043e..4688265 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -15,6 +15,7 @@ OMAP
On Monday 30 July 2012 05:42 AM, NeilBrown wrote:
1/ if regulator_get fails, return an error. This is important
if it failed with EPROBE_DEFER, as the probe needs to be
deferred.
2/ Don't set .set_power until the regulator has been found, or
the deferred probe will not bother
.
This is all prior to the probing of the device.
So no: once set_power is set, it stays set.
Thanks for the explanation, makes sense.
Acked-by: Rajendra Nayak rna...@ti.com
Btw, is the support for re-probe/deferred probe already merged
now? or are you testing this with some out of tree patches
. This patch changes the fixed one to be VINTANA1.
Thanks for the fix, the commit does seem to have mixed up things.
Acked-by: Rajendra Nayak rna...@ti.com
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diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt
b/Documentation/devicetree/bindings/usb/omap-usb.txt
new file mode 100644
index 000..80a28c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -0,0 +1,16 @@
+OMAP USB PHY
+
+OMAP USB2 PHY
+
+Required
On Thursday 28 June 2012 05:21 PM, Kishon Vijay Abraham I wrote:
Add device tree support for twl6030 usb driver.
Update the Documentation with device tree binding information.
Signed-off-by: Kishon Vijay Abraham Ikis...@ti.com
---
.../devicetree/bindings/usb/twl-usb.txt| 18
On Thursday 28 June 2012 05:21 PM, Kishon Vijay Abraham I wrote:
Add device tree support for twl6030 usb driver.
twl4030?
Update the Documentation with device tree binding information.
Signed-off-by: Kishon Vijay Abraham Ikis...@ti.com
---
.../devicetree/bindings/usb/twl-usb.txt
On Thursday 28 June 2012 05:21 PM, Kishon Vijay Abraham I wrote:
Add twl4030-usb data node in twl4030 device tree file.
Signed-off-by: Kishon Vijay Abraham Ikis...@ti.com
---
arch/arm/boot/dts/twl4030.dtsi | 21 +
1 files changed, 21 insertions(+), 0 deletions(-)
diff
On Thursday 28 June 2012 05:21 PM, Kishon Vijay Abraham I wrote:
Add usb otg data node in omap4/omap3 device tree file. Also update
the node with board specific setting in omapx-board.dts file.
Signed-off-by: Kishon Vijay Abraham Ikis...@ti.com
---
arch/arm/boot/dts/omap3-beagle.dts |6
On Thursday 28 June 2012 05:21 PM, Kishon Vijay Abraham I wrote:
All the unnessary functions in omap-phy-internal is removed.
These functionality are now handled by omap-usb2 phy driver.
Cc: Felipe Balbiba...@ti.com
Signed-off-by: Kishon Vijay Abraham Ikis...@ti.com
Acked-by: Tony
On Tuesday 10 July 2012 11:58 AM, ABRAHAM, KISHON VIJAY wrote:
Hi,
On Tue, Jul 10, 2012 at 11:28 AM, Rajendra Nayakrna...@ti.com wrote:
On Thursday 28 June 2012 05:21 PM, Kishon Vijay Abraham I wrote:
Add device tree support for twl6030 usb driver.
Update the Documentation with device tree
+
+static int __devinit omap_usb2_probe(struct platform_device *pdev)
+{
+ struct omap_usb *phy;
+ struct usb_otg *otg;
+ struct resource *res;
+
+ phy = devm_kzalloc(pdev-dev, sizeof(*phy), GFP_KERNEL);
+ if (!phy)
On Tuesday 10 July 2012 12:22 PM, ABRAHAM, KISHON VIJAY wrote:
+TWL4030 USB PHY AND COMPARATOR
+ - compatible : Should be ti,twl4030-usb
+ - interrupts : The interrupt numbers to the cpu should be specified.
First
+ interrupt number is the otg interrupt number that raises ID interrupts
On Tuesday 10 July 2012 12:18 PM, ABRAHAM, KISHON VIJAY wrote:
Hi,
On Tue, Jul 10, 2012 at 11:33 AM, Venu Byravarasu
vbyravar...@nvidia.com wrote:
+
+#ifdef CONFIG_PM
Should it not be CONFIG_PM_SLEEP instead of just CONFIG_PM?
Why? I think we should have CONFIG_PM_SLEEP only when we have
On Tuesday 10 July 2012 01:43 PM, ABRAHAM, KISHON VIJAY wrote:
Hi,
On Tue, Jul 10, 2012 at 11:57 AM, Rajendra Nayakrna...@ti.com wrote:
On Thursday 28 June 2012 05:21 PM, Kishon Vijay Abraham I wrote:
Add usb otg data node in omap4/omap3 device tree file. Also update
the node with board
On Tuesday 10 July 2012 01:46 PM, ABRAHAM, KISHON VIJAY wrote:
Hi,
On Tue, Jul 10, 2012 at 11:59 AM, Rajendra Nayakrna...@ti.com wrote:
On Thursday 28 June 2012 05:21 PM, Kishon Vijay Abraham I wrote:
All the unnessary functions in omap-phy-internal is removed.
These functionality are now
On Monday 10 December 2012 03:50 PM, Roger Quadros wrote:
clk_set_parent is expected to fail on OMAP3 platforms. We don't
consider that as fatal so don't spam console.
And what if it fails on a non-OMAP3 platform?
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c
On Thursday 22 August 2013 05:03 PM, Sricharan R wrote:
maps crossbar number- to interrupt number and
calls request_irq(int_no, crossbar_handler,..)
So will this mapping happen based on some data passed from DT or
just based on whats available when the device does a request_irq()?
If its
On Friday 23 August 2013 11:41 AM, Sricharan R wrote:
Hi,
On Friday 23 August 2013 10:17 AM, Rajendra Nayak wrote:
On Thursday 22 August 2013 05:03 PM, Sricharan R wrote:
maps crossbar number- to interrupt number and
calls request_irq(int_no, crossbar_handler,..)
So will this mapping
the same if the i2c dev interface have no
consistent numbering. Provide alias to allow ordering the i2c devices
correctly.
This looks good Nishanth. Shouldn't we just go ahead and fix these for
all OMAPs/AMxx devices which would have the same problem as OMAP5 ;)
Acked-by: Rajendra Nayak rna
i2c is defined.
Thanks Nishanth.
Acked-by: Rajendra Nayak rna...@ti.com
V1: https://patchwork.kernel.org/patch/3046671/
Nishanth Menon (2):
ARM: dts: OMAP3+: Add i2c aliases
ARM: dts: AM33xx+: Add i2c aliases
arch/arm/boot/dts/am33xx.dtsi |3 +++
arch/arm/boot/dts/am4372.dtsi
On Tuesday 05 November 2013 06:44 PM, Sricharan R wrote:
Enable the crossbar IP support for DRA7xx soc.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/mach-omap2
On Wednesday 24 April 2013 09:58 PM, Mike Turquette wrote:
Quoting Nishanth Menon (2013-04-14 14:19:17)
Overall strategy introduced here is simple: a clock node described in
device tree blob is used to identify the exact clock provided in the
SoC specific data. This is then linked back using
in drivers/regulator/core.c.
Ensure the description is more inline with the original intent.
Cc: Rajendra Nayak rna...@ti.com
Reported-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
Ref: my confusion in http://marc.info/?t=13814022884r=1w=2
[]..
+
+#define pr_fmt(fmt) %s: fmt, __func__
+
+#ifdef DEBUG
+#define prn(num) printk(#num =%d\n, num)
+#define prx(num) printk(#num =%x\n, num)
+#else
+#define prn(num) do { } while (0)
+#define prx(num) do { } while (0)
+#endif
+
+#include linux/err.h
+#include linux/module.h
On Wednesday 18 June 2014 01:32 PM, Roger Quadros wrote:
On 04/23/2014 08:35 PM, Roger Quadros wrote:
From: Nikhil Devshatwar nikhil...@ti.com
Add hwmods for ocp2scp3 and sata modules.
From what I see this is actually adding the ocp2scp3 data and fixing up some
of the sata data which is
On Wednesday 18 June 2014 05:46 PM, Roger Quadros wrote:
This module is needed for the SATA and PCIe PHYs.
Signed-off-by: Roger Quadros rog...@ti.com
Tested-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 25 +
1 file changed, 25
...@ti.com
Tested-by: Kishon Vijay Abraham I kis...@ti.com
---
Changes from v1:
* changed the clock domain to pcie_clkdm
* Added PCIe as a slave port for l3_main.
Looks good to me,
Reviewed-by: Rajendra Nayak rna...@ti.com
Boot log for dra7xx can be found at http://paste.ubuntu.com/7769402
...@arm.linux.org.uk
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Tested-by: Kishon Vijay Abraham I kis...@ti.com
Looks good to me, feel free to add
Reviewed-by: Rajendra Nayak rna...@ti.com
---
Please find the bootlog with these hwmod patches
http
On Wednesday 25 June 2014 11:32 PM, Kishon Vijay Abraham I wrote:
Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC.
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kishon Vijay Abraham I
On Thursday 19 June 2014 01:20 AM, Roger Quadros wrote:
This module is needed for the SATA and PCIe PHYs.
Signed-off-by: Roger Quadros rog...@ti.com
Tested-by: Roger Quadros rog...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
---
v2:
- added .main_clk to hwmod.
- moved interface
.mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
is passed as the second memory resource in the device tree.
Signed-off-by: Roger Quadros rog...@ti.com
Tested-by: Roger Quadros rog...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 6
On 03/25/2015 06:49 PM, Stephane Viau wrote:
Add the GDSC instances that exist as part of apq8084 MMCC block.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/mmcc-apq8084.c | 56
[]..
+Example:
+
+ qfprom: qfprom@0070 {
+ compatible = qcom,qfprom;
+ reg = 0x0070 0x8000;
+ ...
+ /* Data cells */
+ tsens_calibration: calib@404 {
+ reg = 0x4404 0x10;
+
Export symbol pm_genpd_init so it can be used in loadable
kernel modules
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Reported-by: Stephen Rothwell s...@canb.auug.org.au
---
drivers/base/power/domain.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/base/power/domain.c b
On 08/13/2015 11:41 PM, Stephen Boyd wrote:
On 08/13, Rajendra Nayak wrote:
Export symbol pm_genpd_init so it can be used in loadable
kernel modules
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Reported-by: Stephen Rothwell s...@canb.auug.org.au
---
I'd like to take this through
material, AFAIK there are more than 3
drivers
depending on this framework which are wating since last 2 merge windows.
I have been testing these with the qcom tsens driver, and did test v9
as well, so feel free to add my tested by for the entire series,
Tested-by: Rajendra Nayak rna
On 11/13/2015 11:44 AM, Stephen Boyd wrote:
> On 11/13, Rajendra Nayak wrote:
>>
>> On 10/07/2015 01:02 AM, Stephen Boyd wrote:
>>> On 10/01, Stephen Boyd wrote:
>>>> The oxili_cx GDSC is inside the power domain of the oxili GDSC.
>>>> Add the dep
On 10/07/2015 01:02 AM, Stephen Boyd wrote:
> On 10/01, Stephen Boyd wrote:
>> The oxili_cx GDSC is inside the power domain of the oxili GDSC.
>> Add the dependency so that the CX domain can properly power up.
>>
>> Reported-by: Rob Clark <robdcl...@gmail.c
On 09/24/2015 12:39 AM, Stephen Boyd wrote:
The oxili_cx GDSC is inside the power domain of the oxili GDSC.
Add the dependency so that the CX domain can properly power up.
Reported-by: Rob Clark <robdcl...@gmail.com>
Cc: Rajendra Nayak <rna...@codeaurora.org>
Signed-off-by: Step
[]...
>>> It would also be nicer if this parent/child relationship can
>>> somehow be represented in data (struct gdsc) that gets passed to
>>> the gdsc driver which then sets it up, instead of individual
>>> clock drivers doing it.
>>
>> Agreed. I'd rather that we do nothing besides register
On 12/02/2015 02:59 AM, Bryan Huntsman wrote:
> On 12/01/2015 08:11 AM, Rajendra Nayak wrote:
>> Add new dtsi and dts files for the apq8096 dragonboards with just
>> a serial device used as debug console
>>
>> While at it, also rearrange the Makefile so we
Stephen,
On 12/01/2015 07:01 AM, Stephen Boyd wrote:
> Add support for the global clock controller found on MSM8996
> based devices. This should allow most non-multimedia device
> drivers to probe and control their clocks.
On my 8096 board I see the following orphan clocks,
With gdsc driver capable of handling hierarchical power domains,
specify oxili_gdsc as parent of oxilicx_gdsc.
Remove all direct calls to genpd from the mmcc clock driver. The
adding and removing of subdomains is now handled from within
the gdsc driver.
Signed-off-by: Rajendra Nayak <
not yet add support for gpu gdscs which are part
of mmcc.
Tested on apq8096 dragonboards to make sure all modelled gdscs can
be turned on/off successfully.
[1] https://lkml.org/lkml/2015/11/17/949
Rajendra Nayak (6):
clk: qcom: gdsc: Add support for hierarchical power domains
clk: qcom: gdsc
Add new dtsi and dts files for the apq8096 dragonboards with just
a serial device used as debug console
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
Patch applies on top of Stephens' patches to add msm8996 dtsi
https://lkml.org/lkml/2015/11/17/955
arch/arm64/boot/dts/qcom/Ma
Add all gdsc data which are part of mmcc on msm8996 family
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 1 +
drivers/clk/qcom/mmcc-msm8996.c | 154 ++
include/dt-bindings/clock/qcom,mmcc-m
On 12/01/2015 07:23 AM, Stephen Boyd wrote:
> On 11/26, Rajendra Nayak wrote:
>> Some gdscs might be controlled via voting registers and might not
>> really disable when the kernel intends to disable them (due to other
>> votes keeping them enabled)
>> Mark these
On 12/01/2015 05:18 AM, Stephen Boyd wrote:
> On 11/26, Rajendra Nayak wrote:
>> Add new dtsi and dts files for the apq8096 dragonboards with just
>> a serial device used as debug console
>>
>> Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
>>
On 12/01/2015 07:52 AM, Stephen Boyd wrote:
> On 11/26, Rajendra Nayak wrote:
>> @@ -58,30 +58,34 @@ static int gdsc_toggle_logic(struct gdsc *sc, bool en)
>> {
>> int ret;
>> u32 val = en ? 0 : SW_COLLAPSE_MASK;
>> -u32 check = en ? PWR_ON_MASK :
[]..
>> >> return -ETIMEDOUT;
>> >> }
>> >>
>> >> @@ -165,6 +169,7 @@ static int gdsc_init(struct gdsc *sc)
>> >> {
>> >> u32 mask, val;
>> >> int on, ret;
>> >> + unsigned int reg;
>> >>
>> >> /*
>> >>* Disable HW trigger: collapse/restore occur based on registers
>> writes.
>> >>
Add new dtsi and dts files for the apq8096 dragonboards with just
a serial device used as debug console
While at it, also rearrange the Makefile so we have one dtb per line
so as to be consistent with whats done on other platforms.
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
at boot, if these GDSCs are found to be ON, we make sure we
vote for them before we inform the genpd framework about their
status. If genpd gets no users, it then disables (removes the vote)
them as part of genpd_poweroff_unused()
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drive
Some qcom SoCs' can have hierarchical power domains. Let the gdsc structs
specify the parents (if any) and the driver add genpd subdomains for them.
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/common.c | 14 +-
drivers/clk/qcom/gdsc.c
Add all data for the GDSCs which are part of msm8996 GCC block
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi| 1 +
drivers/clk/qcom/gcc-msm8996.c | 92
include/dt-bindings/clock/qcom,gcc-m
gdscs can
be turned on/off successfully
Rajendra Nayak (6):
clk: qcom: gdsc: Add support for hierarchical power domains
clk: qcom: gdsc: Add support for gdscs with gds hw controller
clk: qcom: gdsc: Add support for votable gdscs
clk: qcom: gdsc: Add GDSCs in msm8996 GCC
clk: qcom: gdsc: Add
With gdsc driver capable of handling hierarchical power domains,
specify oxili_gdsc as parent of oxilicx_gdsc.
Remove all direct calls to genpd from the mmcc clock driver. The
adding and removing of subdomains is now handled from within
the gdsc driver.
Signed-off-by: Rajendra Nayak <
ktime APIs
instead for busy looping on status bits.
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/gdsc.c | 44 +++-
drivers/clk/qcom/gdsc.h | 2 ++
2 files changed, 29 insertions(+), 17 deletions(-)
diff --git a/drive
Add all gdsc data which are part of mmcc on msm8996 family
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 1 +
drivers/clk/qcom/mmcc-msm8996.c | 157 ++
include/dt-bindings/clock/qcom,mmcc-m
-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/gcc-msm8996.c | 4
drivers/clk/qcom/gdsc.c | 4
drivers/clk/qcom/gdsc.h | 15 ---
drivers/clk/qcom/mmcc-msm8996.c | 3 +++
4 files changed, 19 insertions(+), 7 deletions(-)
diff
MMU operations
or pending bus transactions before the power domain is turned off.
In gdscs with gds_hw_controller block, its necessary to check the
gds_hw_ctrl status bits instead of the ones in gdscr, to determine
the state of the powerdomain.
Signed-off-by: Rajendra Nayak <rna...@codeaurora.
Add all data for the GDSCs which are part of msm8996 GCC block
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi| 1 +
drivers/clk/qcom/gcc-msm8996.c | 88
include/dt-bindings/clock/qcom,gcc-m
Some qcom SoCs' can have hierarchical power domains. Let the gdsc structs
specify the parents (if any) and the driver add genpd subdomains for them.
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/common.c | 14 +-
drivers/clk/qcom/gdsc.c
On 11/18/2015 06:42 AM, Stephen Boyd wrote:
> Add initial device tree support for the Qualcomm MSM8996 SoC and
> MTP8996 evaluation board.
>
> Signed-off-by: Stephen Boyd
> ---
[]...
> +
> + spmi_bus: qcom,spmi@400f000 {
> + compatible =
is still pending, mostly adding GDSCs and configuring the
I have the GDSC support patches done on top. Will post once I
get some reasonable testing done.
> multimedia PLLs for FSM voting mode vs. manually enabling and
> disabling them. So a v2 is probably going to come out after
> some
On 02/12/2016 06:03 AM, Stephen Boyd wrote:
> On 12/01, Rajendra Nayak wrote:
>> With gdsc driver capable of handling hierarchical power domains,
>> specify oxili_gdsc as parent of oxilicx_gdsc.
>>
>> Remove all direct calls to genpd from the mmcc clock driver.
[]...
> static int spmi_regulator_select_voltage_same_range(struct spmi_regulator
> *vreg,
> - int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel,
> - unsigned *selector)
> + int min_uV, int max_uV)
> {
> const struct spmi_voltage_range *range;
>
Add thermal zones, tsens and qfprom nodes
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 119
1 file changed, 119 insertions(+)
diff --git a/arch/
TSENS is part of GCC, hence add TSENS properties as part of GCC node.
Also add thermal zones and qfprom nodes.
Update GCC bindings doc to mention the possibility of optional TSENS
properties that can be part of GCC node.
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Ra
Add thermal zones, tsens and qfprom nodes
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 119
1 file changed, 119 insertions(+)
diff --git a/arch/
Add thermal zones and tsens nodes
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 108 ++
1 file changed, 108 insertions(+)
diff --git a/arch/arm64/b
is available as
suggested by Eduardo.
regards,
Rajendra
[1] https://www.spinics.net/lists/arm-kernel/msg515721.html
Rajendra Nayak (5):
arm: dts: msm8974: Add thermal zones, tsens and qfprom nodes
arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes
arm: dts: apq8084: Add thermal zones
Add thermal zones, tsens and qfprom nodes
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 72 +++
1 file changed, 72 insertions(+)
diff --git a/arch/ar
be merged in in 4.9 as well)
Changes from v1:
- Fixed the warings seen when compiled with W=1 as suggested by Rob
[1] https://www.spinics.net/lists/arm-kernel/msg515721.html
Rajendra Nayak (5):
arm: dts: msm8974: Add thermal zones, tsens and qfprom nodes
arm: dts: apq8064: Add thermal zones, tsens
Add thermal zones, tsens and qfprom nodes
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/ar
TSENS is part of GCC, hence add TSENS properties as part of GCC node.
Also add thermal zones and qfprom nodes.
Update GCC bindings doc to mention the possibility of optional TSENS
properties that can be part of GCC node.
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Ra
Add thermal zones, tsens and qfprom nodes
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 92 +++
1 file changed, 92 insertions(+)
diff --git a/arch/ar
Add thermal zones, tsens and qfprom nodes
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 103
1 file changed, 103 insertions(+)
diff --git a/arch/
Add thermal zones, tsens and qfprom nodes
Acked-by: Eduardo Valentin <edubez...@gmail.com>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 103
1 file changed, 103 insertions(+)
diff --git a/arch/
index is of type u8 in all places except in clk_hw_get_parent_by_index()
and return value of all round_rate functions is long except for
clk_hw_round_rate(). Make them consistent with the rest of the places
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk
Hi,
This series adds some additional support to the clk-alpha-pll and the
clk-pll drivers in preperation to add the CPU clock driver support
on msm8996
Changes in v2:
* Patch 1 to 6 are same as v1 post, added patches 7 to 10
Rajendra Nayak (8):
clk: Fix inconsistencies in usage of data types
From: Taniya Das <t...@codeaurora.org>
Move all
'# define XYZ'
to
'#define XYZ'
Signed-off-by: Taniya Das <t...@codeaurora.org>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/clk-alpha-pll.c | 32
1 file changed, 16
mented by clk_alpha_pll_dynamic_update() in the patch).
They also need the PLL_HW_LOGIC_BYPASS bit set at init.
Signed-off-by: Taniya Das <t...@codeaurora.org>
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/clk-alpha-pll.c | 48
drivers/clk/qcom/cl
The votable alpha PLLs need to have the fsm mode enabled as part
of the initialization. The sequence seems to be the same as used
by clk-pll, so move the function which does this into a common
place and reuse it for the clk-alpha-pll
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
thereafter.
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/clk-pll.c | 106 +
drivers/clk/qcom/clk-pll.h | 9 +++-
2 files changed, 114 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-pll.c b/drive
Some PLLs can have an additional early output (apart from
the main and aux outputs). Add support for the PLL driver
so it can be used to initialize/configure the early output
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/clk-pll.c | 2 ++
drivers/clk/qcom/clk
This would be useful in subsequent patches when the .set_rate operation
would need to identify if the PLL is actually enabled
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/clk-alpha-pll.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/d
Add a function to do initial configuration of the alpha plls
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/clk-alpha-pll.c | 23 +++
drivers/clk/qcom/clk-alpha-pll.h | 13 +
2 files changed, 36 insertions(+)
diff --git a/drive
-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/clk-pll.c | 8 ++--
drivers/clk/qcom/clk-pll.h | 2 ++
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/clk-pll.c b/drivers/clk/qcom/clk-pll.c
index 5b940d6..08d2fa2 100644
--- a/drivers/clk/qcom/clk-pll.c
Add support to enable/disable the alpha pll using hwfsm
Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
drivers/clk/qcom/clk-alpha-pll.c | 109 ++-
drivers/clk/qcom/clk-alpha-pll.h | 1 +
2 files changed, 98 insertions(+), 12 deletions(-)
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