Re: [PATCH v1] mfd: intel-lpss: Add Intel Comet Lake PCI IDs

2019-04-30 Thread Jarkko Nikula 

On 4/16/19 10:55 AM, Andy Shevchenko wrote:

On Tue, Apr 16, 2019 at 6:10 AM Evan Green  wrote:

On Tue, Apr 9, 2019 at 11:11 PM Andy Shevchenko
 wrote:


Intel Comet Lake has the same LPSS than Intel Cannon Lake.
Add the new IDs to the list of supported devices.



  static const struct pci_device_id intel_lpss_pci_ids[] = {
+   /* CML */
+   { PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)_uart_info },
+   { PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)_uart_info },
+   { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)_info },
+   { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)_info },
+   { PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)_i2c_info },
+   { PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)_i2c_info },


How come it's not cnl_i2c_info?


This is a good question, that's why Jarkko asked Lee to hold on until
we have confirmation about i2c timings.

I got confirmation I2C uses the same input clock than Cannon Lake and 
matches with my measurements.


Andy: please do s/bxt_i2c_info/cnl_i2c_info/ in your patch.

--
Jarkko

Re: [PATCH v1] mfd: intel-lpss: Add Intel Comet Lake PCI IDs

2019-04-16 Thread Andy Shevchenko 
On Tue, Apr 16, 2019 at 6:10 AM Evan Green  wrote:
> On Tue, Apr 9, 2019 at 11:11 PM Andy Shevchenko
>  wrote:
> >
> > Intel Comet Lake has the same LPSS than Intel Cannon Lake.
> > Add the new IDs to the list of supported devices.

> >  static const struct pci_device_id intel_lpss_pci_ids[] = {
> > +   /* CML */
> > +   { PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)_uart_info },
> > +   { PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)_uart_info },
> > +   { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)_info },
> > +   { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)_info },
> > +   { PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)_i2c_info },
> > +   { PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)_i2c_info },
>
> How come it's not cnl_i2c_info?

This is a good question, that's why Jarkko asked Lee to hold on until
we have confirmation about i2c timings.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1] mfd: intel-lpss: Add Intel Comet Lake PCI IDs

2019-04-15 Thread Evan Green 
On Tue, Apr 9, 2019 at 11:11 PM Andy Shevchenko
 wrote:
>
> Intel Comet Lake has the same LPSS than Intel Cannon Lake.
> Add the new IDs to the list of supported devices.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  drivers/mfd/intel-lpss-pci.c | 13 +
>  1 file changed, 13 insertions(+)
>
> diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
> index a67f67c90ec4..50a907f93da9 100644
> --- a/drivers/mfd/intel-lpss-pci.c
> +++ b/drivers/mfd/intel-lpss-pci.c
> @@ -129,6 +129,19 @@ static const struct intel_lpss_platform_info 
> cnl_i2c_info = {
>  };
>
>  static const struct pci_device_id intel_lpss_pci_ids[] = {
> +   /* CML */
> +   { PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)_uart_info },
> +   { PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)_uart_info },
> +   { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)_info },
> +   { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)_info },
> +   { PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)_i2c_info },
> +   { PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)_i2c_info },

How come it's not cnl_i2c_info?

Re: [PATCH v1] mfd: intel-lpss: Add Intel Comet Lake PCI IDs

2019-04-10 Thread Jarkko Nikula 

On 4/9/19 6:11 PM, Andy Shevchenko wrote:

Intel Comet Lake has the same LPSS than Intel Cannon Lake.
Add the new IDs to the list of supported devices.

Signed-off-by: Andy Shevchenko 
---
  drivers/mfd/intel-lpss-pci.c | 13 +
  1 file changed, 13 insertions(+)

diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
index a67f67c90ec4..50a907f93da9 100644
--- a/drivers/mfd/intel-lpss-pci.c
+++ b/drivers/mfd/intel-lpss-pci.c
@@ -129,6 +129,19 @@ static const struct intel_lpss_platform_info cnl_i2c_info 
= {
  };
  
  static const struct pci_device_id intel_lpss_pci_ids[] = {

+   /* CML */
+   { PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)_uart_info },
+   { PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)_uart_info },
+   { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)_info },
+   { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)_info },
+   { PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)_i2c_info },
+   { PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)_i2c_info },
+   { PCI_VDEVICE(INTEL, 0x02c7), (kernel_ulong_t)_uart_info },
+   { PCI_VDEVICE(INTEL, 0x02e8), (kernel_ulong_t)_i2c_info },
+   { PCI_VDEVICE(INTEL, 0x02e9), (kernel_ulong_t)_i2c_info },
+   { PCI_VDEVICE(INTEL, 0x02ea), (kernel_ulong_t)_i2c_info },
+   { PCI_VDEVICE(INTEL, 0x02eb), (kernel_ulong_t)_i2c_info },
+   { PCI_VDEVICE(INTEL, 0x02fb), (kernel_ulong_t)_info },
/* BXT A-Step */
{ PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)_i2c_info },


Let's hold a bit. I'd like to double check does the I2C controller use 
Skylake or Broxton derived input clocks.


--
Jarkko