On Mon, Sep 08, 2014 at 09:51:17AM -0700, Tony Lindgren wrote:
* Markus Pargmann m...@pengutronix.de [140907 10:20]:
This patch adds a function to get the MACIDs from the am33xx SoC
control module registers which hold unique vendor MACIDs. This is only
used if of_get_mac_address() fails to
On 09/08/2014 07:55 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140908 10:41]:
* Sebastian Andrzej Siewior bige...@linutronix.de [140905 12:03]:
This is my complete queue fo the omap serial driver based on the 8250 core
code. I played with it on beagle bone, am335x-evm and
On 09/09/2014 02:30 AM, Tony Lindgren wrote:
* Jyri Sarha jsa...@ti.com [140818 14:49]:
Add external clock provider for am33xx devices.
Please send all the .dts and defconfig changes separately
so I can pick them up and we don't get pointless merge
conflicts.
Moreover, this patch is
Hi,
On 09/08/2014 07:40 PM, Sergei Shtylyov wrote:
Hello.
On 9/8/2014 6:10 PM, Roger Quadros wrote:
The SoC supports 2 DCAN nodes. Add them.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 30 ++
1 file changed, 30
On 09/08/2014 05:35 PM, Ezequiel Garcia wrote:
On 08 Sep 02:57 PM, Roger Quadros wrote:
Hi Ezequiel,
On 09/08/2014 02:27 PM, Ezequiel Garcia wrote:
Usage of pr_err is frowned upon, so replace it with dev_err.
Aditionally, the message on nand_bch_init() error is redundant,
since proper error
On 09/09/2014 10:30 AM, Roger Quadros wrote:
+compatible = bosch,d_can;
+ti,hwmods = dcan1;
+reg = 0x4ae3c000 0x2000,
+ 0x558 0x4; /* index to RAMINIT reg within syscon */
+raminit-syscon = dra7_ctrl_core;
+
Ezequiel,
On 09/08/2014 02:27 PM, Ezequiel Garcia wrote:
This commit adds a new platform-data boolean property that enables use
of a flash-based bad block table. This can also be enabled by setting
the 'nand-on-flash-bbt' devicetree property.
I'm not much aware of how on-flash-BBT works
Hi Marc,
On 09/09/2014 11:34 AM, Marc Kleine-Budde wrote:
On 09/09/2014 10:30 AM, Roger Quadros wrote:
+compatible = bosch,d_can;
+ti,hwmods = dcan1;
+reg = 0x4ae3c000 0x2000,
+ 0x558 0x4; /* index to RAMINIT reg within syscon */
+
On Tuesday 09 September 2014 01:02 AM, Nishanth Menon wrote:
A) There is no OFF mode on DRA7. in sleep state use mode 15 (gated).
B) when using this for wakeup - use pinctrl wakeup handling to do the
wakeup.
Will drop this patch and use mode 15 in sleep mode and submit v2 patch
series
Regards
On Tue, Sep 9, 2014 at 1:30 AM, Kevin Hilman khil...@linaro.org wrote:
To me, it's not terribly clear how you made the split between this PM
core code an the remoteproc code. In the changelog for the remoteproc
patch, it states it's to load the firmware for and boot the wkup_m3.
But, while
Clearing obj-y, obj-m, obj-n, obj- in each Makefile is
a useless habit.
They are non-exported variables; therefore they are always empty
whenever descending into each subdirectory.
(Moreorver, obj-y and obj-m are also set to empty at the beginning
of scripts/Makefile.build)
Signed-off-by:
Masahiro Yamada (3):
kbuild: remove unnecessary obj- := dummy.o trick
kbuild: remove unnecessary variable initializaions
kbuild: remove obj-n and lib-n handling
arch/arm/mach-at91/Makefile | 3 ---
arch/arm/mach-ebsa110/Makefile| 3 ---
arch/arm/mach-ep93xx/Makefile | 3
On Tuesday 09 September 2014 01:04 AM, Nishanth Menon wrote:
On 00:49-20140909, Mugunthan V N wrote:
Adding device tree entry for CPSW to make it work in Dual EMAC mode.
These patches were tested with DRA7 hwmod patches on top of linux-next.
The patches were already reviewed [1] and has
On 09/09/2014 12:26, Masahiro Yamada :
Clearing obj-y, obj-m, obj-n, obj- in each Makefile is
a useless habit.
They are non-exported variables; therefore they are always empty
whenever descending into each subdirectory.
(Moreorver, obj-y and obj-m are also set to empty at the beginning
of
On Tue, Sep 9, 2014 at 6:29 AM, Mugunthan V N mugunthan...@ti.com wrote:
Sorry this is now blocked inside TI. could you explain the testing done
for sleep state? did you attempt sleep mode before testing this?
I have not tested sleep mode, just tested boot and ping test.
I must NAK then for
On Tuesday 09 September 2014 05:45 PM, Nishanth Menon wrote:
On Tue, Sep 9, 2014 at 6:29 AM, Mugunthan V N mugunthan...@ti.com wrote:
Sorry this is now blocked inside TI. could you explain the testing done
for sleep state? did you attempt sleep mode before testing this?
I have not tested
On 09/09/2014 07:56 AM, Mugunthan V N wrote:
On Tuesday 09 September 2014 05:45 PM, Nishanth Menon wrote:
On Tue, Sep 9, 2014 at 6:29 AM, Mugunthan V N mugunthan...@ti.com wrote:
Sorry this is now blocked inside TI. could you explain the testing done
for sleep state? did you attempt sleep
On 09 Sep 11:35 AM, Roger Quadros wrote:
Ezequiel,
On 09/08/2014 02:27 PM, Ezequiel Garcia wrote:
This commit adds a new platform-data boolean property that enables use
of a flash-based bad block table. This can also be enabled by setting
the 'nand-on-flash-bbt' devicetree property.
On 09/09/2014 04:27 PM, Ezequiel Garcia wrote:
On 09 Sep 11:35 AM, Roger Quadros wrote:
Ezequiel,
On 09/08/2014 02:27 PM, Ezequiel Garcia wrote:
This commit adds a new platform-data boolean property that enables use
of a flash-based bad block table. This can also be enabled by setting
the
Hi Tony,
Please pull this series was posted[1] and based on the previous pulls
[2] [3], updating the dts to enable the relevant feature.
NOTE: I have dropped patch #1 of the series based on [4].
These could go to your branch omap-for-v3.18/dt
The following changes since commit
Hi,
Some hardware (TI am43xx) has a buggy RAMINIT DONE mechanism and it might
not always set the DONE bit. This will result in a lockup in
c_can_hw_raminit_wait_ti(),
so patch 1 adds a timeout mechanism there.
There is a non compliancy within TI platforms with respect to the
layout of the
Pass the correct 'mask' and 'value' bits to c_can_hw_raminit_wait_ti().
They seem to have been swapped in the usage instances.
TI's RAMINIT DONE mechanism is buggy and may not always be
set after the START bit is set. So add a timeout mechanism to
c_can_hw_raminit_wait_ti().
Signed-off-by: Roger
Some TI SoCs like DRA7 have a RAMINIT register specification
different from the other AMxx SoCs and as expected by the
existing driver.
To add more insanity, this register is shared with other
IPs like DSS, PCIe and PWM.
Provides a more generic mechanism to specify the RAMINIT
register location
Some SoCs e.g. (TI DRA7xx) need a START pulse to start the
RAMINIT sequence i.e. START bit must be set and cleared before
checking for the DONE bit status. Add a new DT property raminit-pulse
to specify if this mechanism must be used for RAMINIT.
Signed-off-by: Roger Quadros rog...@ti.com
---
On 09/09/2014 09:31 AM, Roger Quadros wrote:
Pass the correct 'mask' and 'value' bits to c_can_hw_raminit_wait_ti().
They seem to have been swapped in the usage instances.
TI's RAMINIT DONE mechanism is buggy and may not always be
set after the START bit is set. So add a timeout mechanism to
On 09/09/2014 04:31 PM, Roger Quadros wrote:
Pass the correct 'mask' and 'value' bits to c_can_hw_raminit_wait_ti().
They seem to have been swapped in the usage instances.
Can you split this fix into a seperate patch, please.
TI's RAMINIT DONE mechanism is buggy and may not always be
set
+linux-omap, tony
-Balaji
On 09/09/2014 09:38 AM, Mauro Carvalho Chehab wrote:
We want to be able to COMPILE_TEST the omap1_camera driver.
It compiles fine, but it fails linkediting:
ERROR: omap_stop_dma [drivers/media/platform/soc_camera/omap1_camera.ko]
undefined!
ERROR: omap_start_dma
On 09/09/2014 05:34 PM, Marc Kleine-Budde wrote:
On 09/09/2014 04:31 PM, Roger Quadros wrote:
Pass the correct 'mask' and 'value' bits to c_can_hw_raminit_wait_ti().
They seem to have been swapped in the usage instances.
Can you split this fix into a seperate patch, please.
OK.
TI's
On 09/09/2014 05:34 PM, Nishanth Menon wrote:
On 09/09/2014 09:31 AM, Roger Quadros wrote:
Pass the correct 'mask' and 'value' bits to c_can_hw_raminit_wait_ti().
They seem to have been swapped in the usage instances.
TI's RAMINIT DONE mechanism is buggy and may not always be
set after the
* Markus Pargmann m...@pengutronix.de [140908 23:05]:
On Mon, Sep 08, 2014 at 09:51:17AM -0700, Tony Lindgren wrote:
* Markus Pargmann m...@pengutronix.de [140907 10:20]:
This patch adds a function to get the MACIDs from the am33xx SoC
control module registers which hold unique vendor
On 09/09/2014 09:45 AM, Roger Quadros wrote:
[...]
/* We look only at the bits of our instance. */
val = mask;
- while ((readl(priv-raminit_ctrlreg) mask) != val)
+ while ((readl(priv-raminit_ctrlreg) mask) != val) {
udelay(1);
+ timeout++;
+
+
From: Afzal Mohammed af...@ti.com
Add dcan nodes.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Signed-off-by: George Cherian george.cher...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
From: Mugunthan V N mugunthan...@ti.com
Add DCAN support for AM437x GP EVM with both DCAN instances.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Signed-off-by: George Cherian george.cher...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
The board has 2 CAN ports but only the first one can be used.
Enable the first CAN port.
The second one cannot be used without hardware modification
so we don't enable the second port.
Signed-off-by: Roger Quadros rog...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
---
The d_can driver expects appropriately named aliases for
the d_can nodes for the RAMINIT control register access.
Provide those, otherwise RAMINIT register won't be configured.
Get's rid of the following messages during boot.
[ 16.419354] c_can_platform 481cc000.can: control memory is not used
From: Dave Gerlach d-gerl...@ti.com
Define pinctrl sleep states for both dcan0 and dcan1 to place pull downs
on the lines to optimize power savings during suspend.
Signed-off-by: Dave Gerlach d-gerl...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
The SoC supports 2 DCAN nodes. Add them.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 370009e..09d5739 100644
---
The board has 2 CAN ports but only the first one can be used.
Enable the first CAN port.
The second one cannot be used without hardware modification
so we don't enable the second port.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts | 23 +++
1
Display and DCAN drivers use syscon regmap to access some registers
in the CORE control area. Add the syscon regmap node for this
area.
Cc: Tomi Valkeinen tomi.valkei...@ti.com
Cc: Nishanth Menon n...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 5 +
1
Add RAMINIT specific bits into the DCAN nodes.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index d38a0ed..847f41b 100644
Hi,
These patches add DCAN support for am43xx and dra7xx platforms.
We also update the am33xx DCAN nodes to support the driver changes
in the RAMINIT mechanism.
These patches must go in together with [1] (or its revisions)
Patches are available along with dependency [1] patches at
Add RAMINIT specific bits into the DCAN nodes.
Also rename can nodes from d_can to can to be compliant
with the ePAPR specs.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git
Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
On 09/09/2014 05:51 PM, Nishanth Menon wrote:
On 09/09/2014 09:45 AM, Roger Quadros wrote:
[...]
/* We look only at the bits of our instance. */
val = mask;
- while ((readl(priv-raminit_ctrlreg) mask) != val)
+ while ((readl(priv-raminit_ctrlreg) mask) != val) {
* Nishanth Menon n...@ti.com [140909 07:40]:
+linux-omap, tony
-Balaji
On 09/09/2014 09:38 AM, Mauro Carvalho Chehab wrote:
We want to be able to COMPILE_TEST the omap1_camera driver.
It compiles fine, but it fails linkediting:
ERROR: omap_stop_dma
On 09/09/2014 04:55 PM, Roger Quadros wrote:
The SoC supports 2 DCAN nodes. Add them.
I think you should put the device-tree ml for DT related patches on Cc.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 30 ++
1 file changed, 30
On 09/09/2014 05:04 PM, Marc Kleine-Budde wrote:
On 09/09/2014 04:55 PM, Roger Quadros wrote:
The SoC supports 2 DCAN nodes. Add them.
I think you should put the device-tree ml for DT related patches on Cc.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 30
On 09/09/2014 04:55 PM, Roger Quadros wrote:
The d_can driver expects appropriately named aliases for
the d_can nodes for the RAMINIT control register access.
Provide those, otherwise RAMINIT register won't be configured.
Get's rid of the following messages during boot.
With your patch set
On 09/09/2014 04:55 PM, Roger Quadros wrote:
From: Afzal Mohammed af...@ti.com
Add dcan nodes.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Signed-off-by: George Cherian george.cher...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Em Tue, 9 Sep 2014 15:41:58 +0100
Russell King - ARM Linux li...@arm.linux.org.uk escreveu:
On Tue, Sep 09, 2014 at 11:38:17AM -0300, Mauro Carvalho Chehab wrote:
We want to be able to COMPILE_TEST the omap1_camera driver.
It compiles fine, but it fails linkediting:
ERROR: omap_stop_dma
The OMAP IOMMU driver supports both the OMAP1 and OMAP2+ IOMMU variants
by splitting the driver into a core module and a thin arch-specific
operations module.
(In practice only the OMAP2+ module omap-iommu2 is implemented, but
let's not denigrate the effort.)
The arch-specific operations module
Hello,
Those two patches clean up the OMAP IOMMU driver. Please see individual commit
messages for more information.
Laurent Pinchart (2):
iommu/omap: Reverse dependency between omap-iommu and omap-iommu2
iommu/omap: Remove omap_iommu unused owner field
drivers/iommu/omap-iommu-debug.c |
The owner field is never set. Remove it.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
drivers/iommu/omap-iommu.c | 11 ---
drivers/iommu/omap-iommu.h | 1 -
2 files changed, 12 deletions(-)
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
Hi Tony,
On 09/08/2014 09:52 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140908 16:21]:
* Suman Anna s-a...@ti.com [140729 17:37]:
Hi,
This is an updated version of the OMAP Mailbox framework adoption
DT support series, refreshed to work with the v9 version of the mailbox
On Tue, Sep 9, 2014 at 6:26 AM, Masahiro Yamada
yamad...@jp.panasonic.com wrote:
Clearing obj-y, obj-m, obj-n, obj- in each Makefile is
a useless habit.
They are non-exported variables; therefore they are always empty
whenever descending into each subdirectory.
(Moreorver, obj-y and obj-m
OMAP4, OMAP5 and DRA7 share a lot of common logic and data structures.
These have been enabled in the previous patches, however, this also
means that OMAP5 or DRA7 only builds also need to build OMAP4 logic.
Update to reuse OMAP4 logic.
This fixes the 'undefined reference to
Em Tue, 09 Sep 2014 12:36:54 -0300
Mauro Carvalho Chehab m.che...@samsung.com escreveu:
Em Tue, 9 Sep 2014 15:41:58 +0100
Russell King - ARM Linux li...@arm.linux.org.uk escreveu:
On Tue, Sep 09, 2014 at 11:38:17AM -0300, Mauro Carvalho Chehab wrote:
We want to be able to COMPILE_TEST
On 09/08/2014 08:33 PM, Frans Klaver wrote:
Thanks. I'll give it a spin on Wednesday.
Could you please pull the upcoming v9 first?
git://git.breakpoint.cc/bigeasy/linux.git uart_v9_pre1
This solves a few of my am335x related issues.
The problem that the uart freezes on beagle board xm is
Hi Ohad,
On 09/09/2014 05:31 AM, Ohad Ben-Cohen wrote:
On Tue, Sep 9, 2014 at 1:30 AM, Kevin Hilman khil...@linaro.org wrote:
To me, it's not terribly clear how you made the split between this PM
core code an the remoteproc code. In the changelog for the remoteproc
patch, it states it's to
Kevin/Ohad,
On 09/09/2014 02:59 PM, Suman Anna wrote:
Hi Ohad,
On 09/09/2014 05:31 AM, Ohad Ben-Cohen wrote:
On Tue, Sep 9, 2014 at 1:30 AM, Kevin Hilman khil...@linaro.org wrote:
To me, it's not terribly clear how you made the split between this PM
core code an the remoteproc code. In the
Dave Gerlach d-gerl...@ti.com writes:
Kevin/Ohad,
On 09/09/2014 02:59 PM, Suman Anna wrote:
Hi Ohad,
On 09/09/2014 05:31 AM, Ohad Ben-Cohen wrote:
On Tue, Sep 9, 2014 at 1:30 AM, Kevin Hilman khil...@linaro.org wrote:
To me, it's not terribly clear how you made the split between this PM
Hi Laurent,
On 09/09/2014 10:45 AM, Laurent Pinchart wrote:
The OMAP IOMMU driver supports both the OMAP1 and OMAP2+ IOMMU variants
by splitting the driver into a core module and a thin arch-specific
operations module.
(In practice only the OMAP2+ module omap-iommu2 is implemented, but
Hi Laurent,
On 09/09/2014 10:45 AM, Laurent Pinchart wrote:
The owner field is never set. Remove it.
Thanks, this seems to have been dead code since the days OMAP IOMMU has
been converted from building as modules to built-in as part of the IOMMU
API adoption. So,
Acked-by: Suman Anna
Hi Suman,
On Tuesday 09 September 2014 16:33:11 Suman Anna wrote:
On 09/09/2014 10:45 AM, Laurent Pinchart wrote:
The OMAP IOMMU driver supports both the OMAP1 and OMAP2+ IOMMU variants
by splitting the driver into a core module and a thin arch-specific
operations module.
(In practice
Quoting Jyri Sarha (2014-09-05 05:21:34)
The added gpio-gate-clock is a basic clock that can be enabled and
disabled trough a gpio output. The DT binding document for the clock
is also added. For EPROBE_DEFER handling the registering of the clock
has to be delayed until of_clk_get() call time.
Hi Laurent,
On Tuesday 09 September 2014 16:33:11 Suman Anna wrote:
On 09/09/2014 10:45 AM, Laurent Pinchart wrote:
The OMAP IOMMU driver supports both the OMAP1 and OMAP2+ IOMMU variants
by splitting the driver into a core module and a thin arch-specific
operations module.
(In practice
* Nishanth Menon n...@ti.com [140909 17:16]:
OMAP4, OMAP5 and DRA7 share a lot of common logic and data structures.
These have been enabled in the previous patches, however, this also
means that OMAP5 or DRA7 only builds also need to build OMAP4 logic.
Update to reuse OMAP4 logic.
This
* Nishanth Menon n...@ti.com [140909 14:00]:
Hi Tony,
Please pull this series was posted[1] and based on the previous pulls
[2] [3], updating the dts to enable the relevant feature.
NOTE: I have dropped patch #1 of the series based on [4].
These could go to your branch
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